1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
V
CC
4B
4A
4Y
G
3Y
3A
3B
D PACKAGE
(TOP VIEW)
AM26LV32E-EP
www.ti.com
............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH ± 15-kV IEC ESD PROTECTION
1
FEATURES SUPPORTS DEFENSE, AEROSPACE,
• Meets or Exceeds Standard TIA/EIA-422-B and
ITU Recommendation V.11
• Operates From a Single 3.3-V Power Supply
• ESD Protection for RS422 Bus Pins
– ± 15-kV Human-Body Model (HBM)
– ± 8-kV IEC61000-4-2, Contact Discharge
– ± 15-kV IEC61000-4-2, Air-Gap Discharge
• Switching Rates up to 32 MHz
• Low Power Dissipation: 27 mW Typ
• Open-Circuit, Short-Circuit, and Terminated
Fail-Safe
• ± 7-V Common-Mode Input Voltage Range With
± 200-mV Sensitivity
• Accepts 5-V Logic Inputs With 3.3-V Supply
(Enable Inputs)
• Input Hysteresis: 35 mV Typ
• Pin-to-Pin Compatible With AM26C32,
AM26LS32
• I
Supports Partial-Power-Down Mode
off
Operation
AND MEDICAL APPLICATIONS
• Controlled Baseline
• One Assembly/Test Site
• One Fabrication Site
• Available in Military ( – 55 ° C/125 ° C)
Temperature Range
• Extended Product Life Cycle
• Extended Product-Change Notification
• Product Traceability
(1) Additional temperature ranges are available – contact factory
(1)
DESCRIPTION/ORDERING INFORMATION
The AM26LV32E consists of quadruple differential line receivers with 3-state outputs. These differential receivers
have ± 15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ± 8-kV ESD (IEC61000-4-2, Contact
Discharge) protection for RS422 bus pins.
This device is designed to meet TIA/EIA-422-B and ITU recommendation V.11 drivers with reduced supply
voltage. The device is optimized for balanced bus transmission at switching rates up to 32 MHz. The 3-state
outputs permit connection directly to a bus-organized system.
The AM26LV32E has an internal fail-safe circuitry that prevents the device from putting an unknown voltage
signal at the receiver outputs. In the open fail-safe, shorted fail-safe, and terminated fail-safe, a high state is
produced at the respective output.
This device is supported for partial-power-down applications using I
preventing damaging current backflow through the device when it is powered down.
The AM26LV32EM is characterized for operation from – 55 ° C to 125 ° C.
1
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
. I
off
circuitry disables the outputs,
off
Copyright © 2008, Texas Instruments Incorporated
4Y
3Y
2Y
1Y
13
11
5
3
4B
4A
3B
3A
2B
2A
1B
1A
G
G
15
14
9
10
7
6
1
2
12
4
AM26LV32E-EP
SLLS948 – NOVEMBER 2008 ............................................................................................................................................................................................
www.ti.com
ORDERING INFORMATION
T
A
– 55 ° C to 125 ° C SOIC – D Tape and reel AM26LV32EMDREP A26LV32EMP
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
PACKAGE
(1) (2)
FUNCTION TABLE
ORDERABLE PART NUMBER TOP-SIDE MARKING
(1)
(each receiver)
DIFFERENTIAL
INPUT
VID≥ 0.2 V
– 0.2 V < VID< 0.2 V
VID≤ – 0.2 V
Open, shorted, or
terminated
X L H Z
(1) H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
ENABLES
G G
H X H
X L H
H X ?
X L ?
H X L
X L L
H X H
X L H
OUTPUT
LOGIC DIAGRAM (POSITIVE LOGIC)
2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): AM26LV32E-EP
Enable
G, G
EQUIVALENT OF EACH
ENABLE INPUT (G, G)
V
CC
GND
EQUIVALENT OF EACH INPUT (A, B)
TYPICAL OF EACH RECEIVER OUTPUT
Output
V
CC
GND
GND
V
or
GND(B)
CC(A)
A, B
2.4 kΩ
2.4 kΩ
1.5 kΩ
1.5 kΩ
5 kΩ
200 kΩ
7 kΩ
V
CC
AM26LV32E-EP
www.ti.com
............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
SCHEMATIC
All resistor values are nominal.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
V
V
V
V
I
I
l
T
θ
T
T
(1) Stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. These are stress ratings
(2) This device is designed to meet TIA/EIA-422-B and ITU.
(3) All voltage values except differential input voltage are with respect to the network GND.
(4) Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
(5) Maximum power dissipation is a function of T
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
Supply voltage range
CC
Input voltage range
I
Differential input voltage
ID
Output voltage range – 0.5 6 V
O
Input clamp current range VI< 0 – 20 mA
IK
Output clamp current range VO< 0 – 20 mA
OK
Maximum output current ± 20 mA
O
Operating virtual junction temperature 150 ° C
J
Package thermal impedance
JA
Operating free-air temperature range – 55 125 ° C
A
Storage temperature range – 65 150 ° C
stg
only, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operating
conditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
temperature is PD= (T
(1) (2)
(3)
A or B inputs – 14 14 V
Enable Inputs – 0.5 6 V
(4)
(5) (6)
– TA)/ θJA. Selecting the maximum of 150 ° C can affect reliability.
J(max)
, θJA, and TA. The maximum allowable power dissipation at any allowable ambient
J(max)
MIN MAX UNIT
– 0.5 6 V
– 14 14 V
73 ° C/W
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): AM26LV32E-EP
AM26LV32E-EP
SLLS948 – NOVEMBER 2008 ............................................................................................................................................................................................
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
V
CC
V
IH
V
IL
V
IC
V
ID
I
OH
I
OL
T
A
Supply voltage 3 3.3 3.6 V
Enable high-level input voltage 2 5.5 V
Enable low-level input voltage 0 0.8 V
Common-mode input voltage – 7 7 mA
Differential input voltage – 7 7 mA
High-level output current – 5 mA
Low-level output current 5 mA
Operating free-air temperature – 55 125 ° C
ELECTRICAL CHARACTERISTICS
over recommended ranges of common-mode input, supply voltage, and operating free-air temperature (unless otherwise
noted)
PARAMETER TEST CONDITIONS MIN TYP
V
V
V
V
V
V
I
I
I
I
r
I
C
(1) All typical values are at V
(2) C
Positive-going input threshold voltage,
IT+
differential input
Negative-going input threshold voltage,
IT –
differential input
Input hysteresis (V
hys
Input clamp voltage, G and G II= – 18 mA – 1.5 V
IK
– V
IT+
) 35 mV
IT –
– 0.2 V
VID= 200 mV, IOH= – 5 mA 2.4 3.2
High-level output voltage V
OH
Low-level output voltage V
OL
High-impedance state output current VO= V
OZ
Output current with power off V
off
Line input current Other input at 0 V mA
I
Enable input current, G and G VI= V
I
Input resistance VIC= – 7 V to 7 V, Other input at 0 V 4 17 k Ω
i
Supply current (total package) G, G = V
CC
Power dissipation capacitance
pd
determines the no-load dynamic current consumption: IS= C
pd
CC
(2)
= 3.3 V, TA= 25 ° C.
VID= 200 mV, IOH= – 100 µ A
VID= – 200 mV, IOL= 5 mA 0.17 0.5
VID= – 200 mV, IOL= 100 µ A 0.1
or GND ± 50 µ A
CC
= 0 V, VO= 0 or 5.5 V ± 100 µ A
CC
VI= 10 V 1.5
VI= – 10 V – 2.5
or GND ± 1 µ A
CC
or GND, No load, Line inputs open 8 17 mA
CC
One channel 150 pF
× V
pd
× f + I
CC
CC
V
–
CC
0.1
www.ti.com
(1)
MAX UNIT
0.2 V
4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): AM26LV32E-EP
AM26LV32E-EP
www.ti.com
............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
(1)
MAX UNIT
4 6 ns
4 6 ns
6 9 ns
t
PLH
t
PHL
t
t
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(p)
t
sk(o)
t
sk(pp)
f
(max)
Propagation delay time, low- to high-level output 8 16 26 ns
Propagation delay time, high- to low-level output 8 16 26 ns
Transition time See Figure 1 5 ns
Output-enable time to high level See Figure 2 17 40 ns
Output-enable time to low level See Figure 3 10 40 ns
Output-disable time from high level See Figure 2 20 40 ns
Output-disable time from low level See Figure 3 16 40 ns
Pulse skew See Figure 1
Pulse skew See Figure 1
Pulse skew (device to device) See Figure 1
Maximum operating frequency See Figure 1 32 MHz
(1) All typical values are at V
(2) t
(3) t
(4) t
is |t
– t
sk(p)
pLH
is the maximum difference in propagation delay times between any two channels of same device switching in the same direction.
sk(o)
is the maximum difference in propagation delay times between any two channels of any two devices switching in the same
sk(pp)
direction.
| of each channel of same device.
pHL
PARAMETER TEST CONDITIONS MIN TYP
See Figure 1
(2)
(3)
(4)
= 3.3 V, TA= 25 ° C.
CC
ESD PROTECTION
PARAMETER TEST CONDITIONS TYP UNIT
HBM ± 15
Receiver input IEC61000-4-2, Air-Gap Discharge ± 15 kV
IEC61000-4-2, Contact Discharge ± 8
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): AM26LV32E-EP
50 Ω50 Ω
Generator
(see Note B)
V
CC
CL= 15 pF
(see Note A)
t
PLH
t
PHL
90% 90%
50% 50%
10% 10%
t
r
t
f
A
B
Input
Output
2 V
1 V
V
OH
V
OL
A
B
Y
V
O
G G
(see Note C)
50%
Input
t
PZH
t
PHZ
V
OH
50%
V
off
≈ 0
0 V
V
CC
Output
Generator
(see Note B)
50 Ω
RL= 2 kΩ
C
L
= 15 pF
(see Note A)
V
CC
(see Note C)
V
ID
= 1 V
A
B
Y
V
O
G
G
VOH- 0.3 V
AM26LV32E-EP
SLLS948 – NOVEMBER 2008 ............................................................................................................................................................................................
PARAMETER MEASUREMENT INFORMATION
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 10 MHz, duty cycle = 50%,
tr= tf≤ 2ns.
C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 1. Test Circuit and Voltage Waveforms, t
and t
PLH
www.ti.com
PHL
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 10 MHz, duty cycle = 50%,
tr= tf≤ 2ns.
C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 2. Test Circuit and Voltage Waveforms, t
6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): AM26LV32E-EP
and t
PZH
PHZ
50%
Input
t
PZL
t
PLZ
50%
V
OL
0 V
V
CC
Output
Generator
(see Note B)
50 Ω
RL= 2 kΩ
C
L
= 15 pF
(see Note A)
V
CC
(see Note C)
V
ID
= 1 V
V
CC
V
off
≈ V
CC
A
B
Y
G
G
V
O
VOL+ 0.3 V
AM26LV32E-EP
www.ti.com
............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
PARAMETER MEASUREMENT INFORMATION (continued)
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 10 MHz, duty cycle = 50%,
tr= tf≤ 2ns.
C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 3. Test Circuit and Voltage Waveforms, t
and t
PZL
PLZ
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): AM26LV32E-EP
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2008
PACKAGING INFORMATION
Orderable Device Status
AM26LV32EMDREP ACTIVE SOIC D 16 2500 Green (RoHS &
V62/09602-01XE ACTIVE SOIC D 16 2500 Green (RoHS &
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
no Sb/Br)
no Sb/Br)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26LV32E-EP :
Catalog: AM26LV32E
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
IMPORTANT NOTICE
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