Texas Instruments AFE7681, AFE7683, AFE7684, AFE7685, AFE7686 Datasheet
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
AFE76xx Quad/dual-channel, RF sampling analog front-end
with 14-bit 9GSPS DACs and 14-bit 3GSPS ADCs
1 Device Overview
1.1 Features
1
• 14-Bit resolution
• Sample rate:
– DAC: 9GSPS
– ADC: 3GSPS
• RF Frequency range: up to 5.2 GHz
• Maximum RF signal bandwidth
– Quad-channel mode (4T4R): 800 MHz (single-
band); 300 MHz (dual-band)
– Dual-channel mode (2T2R): 1200 MHz
(TX)/1000 MHz (RX) (single-band);
800MHz(dual-band)
• On-chip dual selectable DSAs per RX channel
• Integrated TX DSA functionality
• Digital:
– Dual band digital up-converters (DUCs)
– Dual Band digital down-converters (DDCs)
AFE7681, AFE7683, AFE7684, AFE7685, AFE7686
SLASEQ7E –MAY 2018–REVISED MARCH 2019
– 32-Bit NCOs for DUCs/DDCs
– Interpolation ratio: 6x, 8x, 9x, 12x, 16x, 18x,
24x, 36x
– Decimation ratio: /2, /3, /4, /6, /8, /9, /12, /16,
/18, /24, /32
– RX/FB Dynamic switching for TDD
• Interface:
– 8 SerDes Transceivers up to 15Gbps
– 16-Bit and 12-bit JESD204B transport layer
formatting with 8b/10b encoding
– Subclass 1 multi-device synchronization
• Clock:
– Internal PLL/VCO to generate DAC and ADC
clocks
• Package: 17mm x 17mm FC BGA, 0.8mm pitch
• Power supplies: 1.85 V, 1.15 V, 1.0 V, –1.8 V
1.2 Applications
• Cellular base stations
• Wideband communications
• Microwave backhaul
• Distributed antenna systems (DAS)
1.3 Description
The AFE76xx is a family of high performance, quad/dual channel, 14-bit, integrated RF sampling analog
front ends (AFEs) with 9 GSPS DACs and 3 GSPS ADCs, capable of synthesizing and digitizing wideband
signals. High dynamic range allows the AFE76xx to generate and digitize 3G/4G signals for wireless base
stations. In TDD mode, the receiver channel can be configured to dynamically switching between traffic
receiver (TDD RX) status and wideband feedback receiver (TDD FB) status to assist DPD (Digital PreDistortion) of the Power Amplifier (PA) on the transmitter path.
The AFE76xx family has integrated DSA on the receiver channels and also supports DSA equivalent
functionality on the transmitter channels. Each receiver channel has one analog RF peak power detector
and various digital power detectors to assist AGC control for receiver channels, and two RF overload
detectors for device reliability protection. The AFE76xx family has 8 of JESD204B compatible SerDes
transceivers running up to 15 Gbps. The devices have up to two DUCs per TX channel and two DDCs per
RX channel, with multiple interpolation/decimation rates and digital quadrature modulators/demodulators
with independent, frequency flexible NCOs. The devices support more than 1000 MHz (800 MHz as
4T4R) RF signal bandwidth in single-band mode, and up to 800 MHz (300 MHz as 4T4R) RF signal
bandwidth per band in dual-band mode. A low jitter PLL/VCO simplifies the sampling clock generation by
allowing use of a lower frequency reference clock.
Device Information
PART NUMBER PACKAGE BODY SIZE
AFE7685 FC-BGA 17.00 mm x 17.00 mm
AFE7686 FC-BGA 17.00 mm x 17.00 mm
(1)
(1) For all available packages, see the orderable addendum at the end of the data sheet.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
RXBDSA1P/M
RXBDSA2P/M
Buffer
SHA
RXADSA1P/M
ADC
DSA
DSA
RXADSA2P/M
ADC
Buffer
SHA
ADC
DSA
DSA
ADC
NCO NCO
DDC
DDC
NCO NCO
TXCP/M
NCO
TXBP/M
DAC
DAC
NCO
DUC
DUC
NCO NCO
ADC
DSA
DSA
DSA
DSA
NCO NCO
DDC
DDC
NCO NCO
Buffer SHA
Buffer SHA
ADC
RXDDSA1P/M
RXDDSA2P/M
RXCDSA1P/M
RXCDSA2P/M
NCO NCO
DUC
DUC
NCO NCO
DAC
DAC
Low jitter PLL
Divider
/2, /3, /4
SerDes
Traffic Controller
TXDP/M
TXAP/M
SYSREFP/M
CLKP/M
JTAG
SRX1P/M
STX4P/M
SYNCBOUT0P/M
SYNCBINP/M
STX1P/M
SRX4P/M
STX8P/M
STX5P/M
SYNCBIN1P/M
SYNCBOUT1P/M
SRX5P/M
SRX8P/M
TXD DSA
TXC DSA
TXB DSA
TXA DSA
SPIBSEN
SPIBSCLK
SPIBSDIO
SPIBSDO
TXTDD2
RXTDD2
RXFBSW2
FBBANDSEL2
RXCDSA1PD
RXCDSA2PD
RXDDSA1PD
RXDDSA2PD
RXCPD2H
RXCPD2L
RXDPD2H
RXDPD2L
RXCDSAFAST
RXDDSAFAST
TX2ENABLE
ALARMTX2
SLEEPMODE
PLLCLKLD
PLLREFLD
RESET
TX1ENABLE
RXBDSAFAST
RXADSAFAST
RXBPD2L
RXBPD2H
RXAPD2L
RXAPD2H
RXBDSA2PD
RXBDSA1PD
RXADSA2PD
RXADSA1PD
FBBANDSEL1
RXFBSW1
RXTDD1
TXTDD1
SPIASDO
SPIASDIO
SPIASCLK
SPIASEN
ALARMTX1
TCLK
TCLK
TDI
TDO
TRSTB
Temp Sensor
VDDAPLL18
VDDAVCO18
VDDAPLL
VDDCLK
VDDATX18
VDDATX
VDDCLK
VDDGPIO18
VEE18AB
VDDL1AB
VDDL2AB
VDDTX18CD
VDDTXCD
VEE18CD
VDDL2CD
VDDL1CD
FSPICLKD
FSPIDD
DVDD
VDDTX18AB
VDDTXAB
DVDD
DVDD
VDDT
VDDR
VDDA
DVDD
RX1P8V
RX1P2V
SYNCB2CMOS
SYNCB3CMOS
SYNCB1CMOS
SYNCB0CMOS
RXDSASW
TXDSASW
FSPICLKA
FSPIDA
FSPICLKB
FSPIDB
FSPICLKC
FSPIDC
RX1P8V
RX1P2V
DVDD
CLKOUTP/M
MUX MUX
MUX
MUX
AFE7681, AFE7683, AFE7684, AFE7685, AFE7686
SLASEQ7E –MAY 2018–REVISED MARCH 2019
www.ti.com
Device Information
(1)
(continued)
PART NUMBER PACKAGE BODY SIZE
AFE7684 FC-BGA 17.00 mm x 17.00 mm
AFE7683 FC-BGA 17.00 mm x 17.00 mm
AFE7681 FC-BGA 17.00 mm x 17.00 mm
1.4 Functional Block Diagram
Figure 1-1. Functional Block Diagram of AFE7685/AFE7686
2
Device Overview Copyright © 2018–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: AFE7681 AFE7683 AFE7684 AFE7685 AFE7686
RXBDSA1P/M
RXBDSA2P/M
Buffer
SHA
RXADSA1P/M
ADC
DSA
DSA
RXADSA2P/M
ADC
Buffer
SHA
ADC
DSA
DSA
ADC
NCO NCO
DDC
DDC
NCO NCO
TXCP/M
NCO
DAC
NCO
DUC
NCO NCO
ADC
DSA
DSA
DSA
DSA
NCO NCO
DDC
DDC
NCO NCO
Buffer SHA
Buffer SHA
ADC
RXDDSA1P/M
RXDDSA2P/M
RXCDSA1P/M
RXCDSA2P/M
NCO NCO
DUC
NCO NCO
DAC
Low jitter PLL
Divider
/2, /3, /4
SerDes
Traffic Controller
TXAP/M
SYSREFP/M
CLKP/M
JTAG
SRX1P/M
STX4P/M
SYNCBOUT0P/M
SYNCBINP/M
STX1P/M
SRX4P/M
STX8P/M
STX5P/M
SYNCBIN1P/M
SYNCBOUT1P/M
SRX5P/M
SRX8P/M
TXC DSA
TXA DSA
SPIBSEN
SPIBSCLK
SPIBSDIO
SPIBSDO
TXTDD2
RXTDD2
RXFBSW2
FBBANDSEL2
RXCDSA1PD
RXCDSA2PD
RXDDSA1PD
RXDDSA2PD
RXCPD2H
RXCPD2L
RXDPD2H
RXDPD2L
RXCDSAFAST
RXDDSAFAST
TX2ENABLE
ALARMTX2
SLEEPMODE
PLLCLKLD
PLLREFLD
RESET
TX1ENABLE
RXBDSAFAST
RXADSAFAST
RXBPD2L
RXBPD2H
RXAPD2L
RXAPD2H
RXBDSA2PD
RXBDSA1PD
RXADSA2PD
RXADSA1PD
FBBANDSEL1
RXFBSW1
RXTDD1
TXTDD1
SPIASDO
SPIASDIO
SPIASCLK
SPIASEN
ALARMTX1
TCLK
TCLK
TDI
TDO
TRSTB
Temp Sensor
VDDAPLL18
VDDAVCO18
VDDAPLL
VDDCLK
VDDATX18
VDDATX
VDDCLK
VDDGPIO18
VEE18AB
VDDL1AB
VDDL2AB
VDDTX18CD
VDDTXCD
VEE18CD
VDDL2CD
VDDL1CD
FSPICLKD
FSPIDD
DVDD
VDDTX18AB
VDDTXAB
DVDD
DVDD
VDDT
VDDR
VDDA
DVDD
RX1P8V
RX1P2V
SYNCB2CMOS
SYNCB3CMOS
SYNCB1CMOS
SYNCB0CMOS
RXDSASW
TXDSASW
FSPICLKA
FSPIDA
FSPICLKB
FSPIDB
FSPICLKC
FSPIDC
RX1P8V
RX1P2V
DVDD
CLKOUTP/M
MUX MUX
MUX
MUX
www.ti.com
AFE7681, AFE7683, AFE7684, AFE7685, AFE7686
SLASEQ7E –MAY 2018–REVISED MARCH 2019
Figure 1-2. Functional Block Diagram of AFE7684
2 Revision History
Changes from Revision D (December 2018) to Revision E Page
• Changed AFE7681 from Advance Information to Production Data ............................................................ 1
Changes from Revision C (October 2018) to Revision D Page
• Added AFE7681 as Advance Information and AFE7683 as Production Data................................................ 1
Changes from Revision B (September 2018) to Revision C Page
• Changed AFE7684 from Advance Information to Production Data ............................................................ 1
Changes from Revision A (July 2018) to Revision B Page
• Changed AFE7686 from Advance Information to Production Data ............................................................ 1
Revision HistoryCopyright © 2018–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: AFE7681 AFE7683 AFE7684 AFE7685 AFE7686
3
AFE7681, AFE7683, AFE7684, AFE7685, AFE7686
SLASEQ7E –MAY 2018–REVISED MARCH 2019
Changes from Original (May 2018) to Revision A Page
• Changed AFE7684 from Product Preview to Advance Information, AFE7685 from Product Preview to Production
Data..................................................................................................................................... 1
• Deleted AFE7683 from data manual .............................................................................................. 1
www.ti.com
4
Revision History Copyright © 2018–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: AFE7681 AFE7683 AFE7684 AFE7685 AFE7686
www.ti.com
3 Device Comparison
AFE7681, AFE7683, AFE7684, AFE7685, AFE7686
SLASEQ7E –MAY 2018–REVISED MARCH 2019
Table 3-1. Device Features Comparison
DEVICE # of TXs/RXs # of DUCs/TX # of DDCs/RX
AFE7685 4T4R 1 1 750
AFE7686 4T4R 2 2 1500
AFE7684 2T4R 2 2 1500
AFE7683 2T4R 1 1 750
AFE7681 4T2R 1 1 750
MAX INPUT/OUTPUT
DATA RATE (MSPS)
Submit Documentation Feedback
Product Folder Links: AFE7681 AFE7683 AFE7684 AFE7685 AFE7686
Device ComparisonCopyright © 2018–2019, Texas Instruments Incorporated
5
Loading...