ADS831
8-Bit, 80MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
● HIGH SNR: 49dB
● INTERNAL OR EXTERNAL REFERENCE
OPTION
● SINGLE-ENDED OR
DIFFERENTIAL ANALOG INPUT
● PROGRAMMABLE INPUT RANGE:
1Vp-p/2Vp-p
● LOW POWER: 275mW
● LOW DNL: 0.35LSB
● SINGLE +5V SUPPLY OPERATION
● SSOP-20 PACKAGE
APPLICATIONS
● MEDICAL IMAGING
● VIDEO DIGITIZING
● COMPUTER SCANNERS
● COMMUNICATIONS
● DISK-DRIVE CONTROL
ADS831
TM
¤
SBAS087A – MAY 2001
DESCRIPTION
The ADS831 is a pipeline, CMOS Analog-to-Digital (A/D) converter that operates from a single +5V power supply. This converter provides excellent performance with a single-ended input
and can be operated with a differential input
for added spurious performance. This high performance converter
includes an 8-bit quantizer, high bandwidth
track/hold, and a high accuracy internal reference. It also allows for
the user to disable the internal reference and utilize external
references. This external reference option provides excellent gain
and offset matching when used in multi-channel applications or in
applications where DC full scale range adjustment is required.
The ADS831 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin
needed for medical imaging, communications, video, and test
instrumentation.
The ADS831 is specified at a maximum sampling frequency of
80MHz and a single-ended input range of 1.5V to 3.5V. The
ADS831 is available in an SSOP-20 package and is pin-for-pin
compatible with the 8-bit, 60MHz ADS830.
+V
S
CLK VDRV
IN
(Opt)
INV
IN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
ADS831
T/H
8-Bit
Pipelined
A/D Core
Optional External
Reference
www.ti.com
Timing
Circuitry
Int/Ext
Error
Correction
Logic
Internal
Reference
3-State
Outputs
D0
•
•
•
D7
Copyright © 1998, Texas Instruments Incorporated
ABSOLUTE MAXIMUM RATINGS
+VS.......................................................................................................+6V
Analog Input ............................................................. –0.3V to (+V
Logic Input ............................................................... –0.3V to (+V
Case Temperature ......................................................................... +100°C
Junction Temperature .................................................................... +150°C
Storage Temperature..................................................................... +150°C
S
S
+ 0.3V)
+ 0.3V)
This integrated circuit can be damaged by ESD. Texas Instruments
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
ELECTROSTATIC
DISCHARGE SENSITIVITY
installation procedures can cause damage.
DEMO BOARD ORDERING INFORMATION
PRODUCT DEMO BOARD
ADS831 DEM-ADS831E
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER
ADS831E SSOP-20 (QSOP) 349 –40°C to +85°C ADS831E ADS831E Rails
" " " " " ADS831E/1K Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces
of “ADS831E/1K” will get a single 1000-piece Tape and Reel.
(1)
RANGE MARKING NUMBER MEDIA
ELECTRICAL CHARACTERISTICS
At TA = full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 80MHz, and external reference, unless otherwise noted.
ADS831E
PARAMETER CONDITIONS MIN TYP MAX UNITS
RESOLUTION 8 Guaranteed Bits
SPECIFIED TEMPERATURE RANGE Ambient Air –40 to +85 °C
ANALOG INPUT
Standard Single-Ended Input Range 2Vp-p 1.5 3.5 V
Optional Single-Ended Input Range 1Vp-p 2 3 V
Common-Mode Voltage 2.5 V
Optional Differential Input Range 2Vp-p 2 3 V
Analog Input Bias Current 1 µA
Input Impedance 1.25 || 5 MΩ || pF
Track-Mode Input Bandwidth –3dBFS 300 MHz
CONVERSION CHARACTERISTICS
Sample Rate 10k 80M Samples/s
Data Latency 4 Clk Cyc
DYNAMIC CHARACTERISTICS
Differential Linearity Error (largest code error)
f = 1MHz ±0.25 ±1.0 LSB
f = 10MHz ±0.35 LSB
No Missing Codes Guaranteed
Integral Nonlinearity Error, f = 1MHz ±0.5 ±2.0 LSBs
Spurious Free Dynamic Range
f = 1MHz (–1dB input) 67 dBFS
f = 10MHz (–1dB input) 50 65 dBFS
Two-Tone Intermodulation Distortion
f = 9.5MHz and 9.9MHz (–7dB each tone) –57 dBc
Signal-to-Noise Ratio (SNR) Referred to Full Scale
f = 1MHz 49 dB
f = 10MHz 46 49 dB
Signal-to-(Noise + Distortion) (SINAD) Referred to Full Scale
f = 1MHz 48.5 dB
f = 10MHz 44 48.5 dB
Effective Number of Bits
Output Noise Input Tied to Common-Mode 0.2 LSBs rms
Aperture Delay Time 3ns
Aperture Jitter 1.2 ps rms
Overvoltage Recovery Time 2ns
Full-Scale Step Acquisition Time 2.5 ns
(1)
(3)
(4)
, f = 1MHz 7.8 Bits
(2)
2
ADS831
SBAS087A
ELECTRICAL CHARACTERISTICS (Cont.)
At TA = full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 80MHz, and external reference, unless otherwise noted.
ADS831E
PARAMETER CONDITIONS MIN TYP MAX UNITS
DIGITAL INPUTS
Logic Family
Convert Command Start Conversion
High Level Input Current
Low Level Input Current (V
High Level Input Voltage +3.5 V
(5)
(VIN = 5V) 100 µA
= 0V) 10 µA
IN
Low Level Input Voltage +1.0 V
Input Capacitance 5pF
DIGITAL OUTPUTS
Logic Family
Logic Coding
Low Output Voltage (I
Low Output Voltage, (I
High Output Voltage, (I
High Output Voltage, (I
Low Output Voltage, (I
High Output Voltage, (I
Output Capacitance 5pF
ACCURACY
(Internal Reference, 2Vp-p, Unless Otherwise Noted)
= 50µA) VDRV = 5V +0.1 V
OL
= 1.6mA) +0.2 V
OL
= 50µA) +4.9 V
OH
= 0.5mA) +4.8 V
OH
= 50µA) VDRV = 3V +0.1 V
OL
= 50µA) +2.8 V
OH
fS = 2.5MHz
Zero Error (Referred to –FS) at 25°C –2.5 ±0.5 +2.5 %FS
Zero Error Drift (Referred to –FS) ±53 ppm/°C
Gain Error
Gain Error Drift
(6)
(6)
at 25°C –2.5 ±0.5 +2.5 %FS
Power Supply Rejection of Gain ∆ VS = ±5% 55 dB
Internal REFT Tolerance Deviation from Ideal 3.0V ±10 ±100 mV
Internal REFB Tolerance Deviation from Ideal 2.0V ±10 ±100 mV
External REFT Voltage Range REFB + 0.8 3.0 V
External REFB Voltage Range 1.25 2.0 REFT – 0.8 V
Reference Input Resistance REFT to REFB 800 Ω
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
Supply Current: +I
Power Dissipation: VDRV = 5V External Reference 290 350 mW
S
S
Operating +4.75 +5.0 +5.25 V
Operating 58 70 mA
VDRV = 3V External Reference 275 mW
VDRV = 5V Internal Reference 310 mW
VDRV = 3V Internal Reference 285 mW
Thermal Resistance,
SSOP-20 115 °C/W
θ
JA
NOTES: (1) Spurious Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to Full Scale. (3) Two-tone
intermodulation distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the two-tone fundamental
envelope. (4) Effective number of bits (ENOB) is defined by (SINAD – 1.76) /6.02. (5) A 50kΩ pull-down resistor is inserted internally. (6) Excludes internal
reference.
CMOS Compatible
Rising Edge of Convert Clock
CMOS/TTL Compatible
Straight Offset Binary
±75 ppm/°C
– 1.25 V
S
ADS831
SBAS087A
3
PIN CONFIGURATION
Top View SSOP
GND
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8 (LSB)
CLK
1
2
3
4
5
ADS831
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDRV
+V
S
GND
IN
IN
CM
REFT
REFB
INT/EXT
RSEL
TIMING DIAGRAM
PIN DESCRIPTIONS
PIN DESIGNATOR DESCRIPTION
1 GND Ground
2 Bit 1 Data Bit 1 (D7) (MSB)
3 Bit 2 Data Bit 2 (D6)
4 Bit 3 Data Bit 3 (D5)
5 Bit 4 Data Bit 4 (D4)
6 Bit 5 Data Bit 5 (D3)
7 Bit 6 Data Bit 6 (D2)
8 Bit 7 Data Bit 7 (D1)
9 Bit 8 Data Bit 8 (D0) (LSB)
10 CLK Convert Clock
11 RSEL Input Range Select: HI = 2V; LO = 1V
12 INT/EXT Reference Select: HI = External; LO = Internal
13 REFB Bottom Reference
14 REFT Top Reference
15 CM Common-Mode Voltage Output
16 IN Complementary Input
17 IN Analog Input
18 GND Ground
19 +V
20 VDRV Output Logic Driver Supply Voltage
S
+5V Supply
t
CONV
N+2
N+3
tLt
N+4
N+5
H
N+6
Analog In
N+1
N
t
D
Clock
Data Out
4 Clock Cycles
N–4N–3N–2N–1 N N+1 N+2 N+3
Data Invalid
t
2
t
1
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
CONV
t
L
t
H
t
D
t
1
t
2
Convert Clock Period 12.5 100µsns
Clock Pulse Low 5.8 6.25 ns
Clock Pulse High 5.8 6.25 ns
Aperture Delay 3 ns
Data Hold Time, CL = 0pF 3.9 ns
New Data Delay Time, CL = 15pF max 5.9 12 ns
N+7
4
ADS831
SBAS087A