TEXAS INSTRUMENTS ADS7842 Technical data

ADS7842

A

D

S

7

8

4

2

SBAS103B – SEPTEMBER 2000 – REVISED MAY 2002

12-Bit, 4-Channel Parallel Output Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● SINGLE SUPPLY: 2.7V to 5V

● 4-CHANNEL INPUT MULTIPLEXER

● UP TO 200kHz SAMPLING RATE

● FULL 12-BIT PARALLEL INTERFACE

● ±1LSB INL AND DNL

● NO MISSING CODES

● 72dB SINAD

● LOW POWER: 2mW

● SSOP-28 PACKAGE

APPLICATIONS

● DATA ACQUISITION

● TEST AND MEASUREMENT

● INDUSTRIAL PROCESS CONTROL

● MEDICAL INSTRUMENTS

● LABORATORY EQUIPMENT

DESCRIPTION

The ADS7842 is a complete, 4-channel, 12-bit Analog-to­Digital Converter (ADC). It contains a 12-bit, capacitor­based, Successive Approximation Register (SAR) ADC with
a sample-and-hold amplifier, interface for microprocessor
use, and parallel, 3-state output drivers. The ADS7842 is
specified at a 200kHz sampling rate while dissipating only
2mW of power. The reference voltage can be varied from
100mV to V
24µV to 1.22mV. The ADS7842 is tested down to 2.7V
operation.

Low power, high speed, and an onboard multiplexer make
the ADS7842 ideal for battery-operated systems such as
portable, multi-channel dataloggers and measurement equip­ment. The ADS7842 is available in an SSOP-28 package
and is tested over the –40°C to +85°C temperature range.

with a corresponding LSB resolution from

CC

A1

A0

AIN0

AIN1

AIN2

AIN3

V

REF

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

4-Channel

MUX

CDAC

SAR

ADS7842

Comparator

www.ti.com

3-State
Parallel

Output

Latches

and
3-State
Drivers

Copyright © 2000, Texas Instruments Incorporated

Data Bus

CLK
BUSY
WR
CS
RD

PACKAGE/ORDERING INFORMATION

MINIMUM

RELATIVE SPECIFIED

PRODUCT (LSB) (dB) PACKAGE-LEAD DESIGNATOR

ACCURACY SINAD PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT

ADS7842E ±2 68 SSOP-28 DB –40°C to +85°C ADS7842E ADS7842E Rails, 48

"""""""ADS7842E/1K Tape and Reel, 1000

ADS7842EB ±1 70 SSOP-28 DB –40°C to +85°C ADS7842EB ADS7842EB Rails, 48

"""""""ADS7842EB/1K Tape and Reel, 1000

NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.

(1)

RANGE MARKING NUMBER MEDIA, QUANTITY

ABSOLUTE MAXIMUM RATINGS

+V

to GND ........................................................................–0.3V to +6V

CC

Analog Inputs to GND ............................................ –0.3V to +V

Digital Inputs to GND ........................................................... –0.3V to +6V

Power Dissipation .......................................................................... 250mW

Maximum Junction Temperature................................................... +150°C

Operating Temperature Range ........................................ –40°C to +85°C

Storage Temperature Range ......................................... –65°C to +150°C

Lead Temperature (soldering, 10s)............................................... +300°C

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.

(1)

+ 0.3V

CC

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instru­ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

PIN CONFIGURATION

Top View SSOP

AIN0
AIN1
AIN2
AIN3

V

REF

AGND

DB11
DB10

DB9
DB8
DB7
DB6
DB5

DGND

1
2
3
4
5
6
7

ADS7842E

8

8
10
11
12
13
14

V

28

ANA

27

V

DIG

26

A1

25

A0

24

CLK

23

BUSY

22

WR

21

CS

20

RD

19

DB0

18

DB1

17

DB2

16

DB3

15

DB4

PIN DESCRIPTIONS

PIN NAME DESCRIPTION

1 AIN0 Analog Input Channel 0
2 AIN1 Analog Input Channel 1
3 AIN2 Analog Input Channel 2
4 AIN3 Analog Input Channel 3
5V

6 AGND Analog Ground
7 DB11 Data Bit 11 (MSB)
8 DB10 Data Bit 10

9 DB9 Data Bit 9
10 DB8 Data Bit 8
11 DB7 Data Bit 7
12 DB6 Data Bit 6
13 DB5 Data Bit 5
14 DGND Digital Ground
15 DB4 Data Bit 4
16 DB3 Data Bit 3
17 DB2 Data Bit 2
18 DB1 Data Bit 1
19 DB0 Data Bit 0 (LSB)
20 RD Read Input. Active LOW. Reads the data outputs in

21 CS Chip Select Input. Active LOW. The combination of

22 WR Write Input. Active LOW. Starts a new conversion

23 BUSY BUSY goes LOW and stays LOW during a

24 CLK External Clock Input. The clock speed determines the

25, 26 A0, A1 Address Inputs. Selects one of four analog input

27 V
28 V

Voltage Reference Input. See Electrical Characteris-

REF

tics Tables for ranges.

combination with CS.

CS taken LOW and WR taken LOW initiates a new
conversion and places the outputs in the tri-state
mode.

and selects an analog channel via address inputs A0
and A1, in combination with CS.

conversion. BUSY rises when a conversion is
complete and enables the parallel outputs.

conversion rate by the equation f

channels in combination with CS and WR. The
address inputs are latched on the rising edge of
either RD or WR.

A1 A0 Channel Selected

0 0 AIN0
0 1 AIN1
1 0 AIN2
1 1 AIN3

Digital Supply Input. Nominally +5V.

DIG

Analog Supply Input. Nominally +5V.

ANA

CLK

= 16 • f

SAMPLE

.

2

www.ti.com

ADS7842

SBAS103B

ELECTRICAL CHARACTERISTICS: +5V

At TA = –40°C to +85°C, +VCC = +5V, V

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
RESOLUTION 12 ✻ Bits

ANALOG INPUT

Full-Scale Input Span 0 V
Capacitance 25 ✻ pF
Leakage Current ±1 ✻ µA

SYSTEM PERFORMANCE

No Missing Codes 12 ✻ Bits
Integral Linearity Error ±2 ±1 LSB
Differential Linearity Error ±0.8 ±0.5 ±1LSB
Offset Error ±3 ✻ LSB
Offset Error Match 0.15 1.0 ✻✻ LSB
Gain Error ±4 ±3LSB
Gain Error Match 0.1 1.0 ✻✻ LSB
Noise 30 ✻ µVrms
Power-Supply Rejection 70 ✻ dB

SAMPLING DYNAMICS

Conversion Time 12 ✻ Clk Cycles
Acquisition Time 3 ✻ Clk Cycles
Throughput Rate 200 ✻ kHz
Multiplexer Settling Time 500 ✻ ns
Aperture Delay 30 ✻ ns
Aperture Jitter 100 ✻ ps

DYNAMIC CHARACTERISTICS

Total Harmonic Distortion

(2)

Signal-to-(Noise + Distortion) V
Spurious-Free Dynamic Range V
Channel-to-Channel Isolation V

REFERENCE INPUT

Range 0.1 +V
Resistance DCLK Static 5 ✻ GΩ
Input Current 40 100 ✻✻ µA

DIGITAL INPUT/OUTPUT

Logic Family CMOS ✻
Logic Levels

V

IH

V

IL

V

OH

V

OL

Data Format Straight Binary ✻
External Clock 0.2 3.2 ✻✻MHz

POWER-SUPPLY REQUIREMENTS

+V

CC

Quiescent Current 550 900 ✻✻ µA

Power Dissipation 4.5 ✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻°C

REF

= +5V, f

= 200kHz, and f

SAMPLE

CLK

= 16 • f

= 3.2MHz, unless otherwise noted.

SAMPLE

ADS7842E ADS7842EB

REF

✻✻V

VIN = 5Vp-p at 10kHz –78 –72 –80 –76 dB

= 5Vp-p at 10kHz 68 71 70 72 dB

IN

= 5Vp-p at 10kHz 72 79 76 81 dB

IN

= 5Vp-p at 50kHz 120 ✻ dB

IN

CC

f

= 12.5kHz 2.5 ✻ µA

SAMPLE

DCLK Static 0.001 3 ✻✻ µA

✻✻V

| IIH | ≤ +5µA 3.0 5.5 ✻✻V
| IIL | ≤ +5µA –0.3 +0.8 ✻✻V

IOH = –250µA 3.5 ✻ V

IOL = 250µA 0.4 ✻ V

Specified Performance 4.75 5.25 ✻✻V

f

= 12.5kHz 300 ✻ µA

SAMPLE

Power-Down Mode

(3)

, CS = +V

CC

3 ✻ µA

(1)

✻ Same specifications as ADS7842E.
NOTES: (1) LSB means Least Significant Bit. With V

at end of conversion when WR, CS, and BUSY conditions have all been met. Refer to Table III of this data sheet.

equal to +5.0V, one LSB is 1.22mV. (2) First five harmonics of the test frequency. (3) Power-down mode

REF

ADS7842

SBAS103B

www.ti.com

3

ELECTRICAL CHARACTERISTICS: +2.7V

At TA = –40°C to +85°C, +VCC = +2.7V, V

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
RESOLUTION 12 ✻ Bits

ANALOG INPUT

Full-Scale Input Span 0 V
Capacitance 25 ✻ pF
Leakage Current ±1 ✻ µA

SYSTEM PERFORMANCE

No Missing Codes 12 ✻ Bits
Integral Linearity Error ±2 ±1 LSB
Differential Linearity Error ±0.8 ±0.5 ±1LSB
Offset Error ±5 ✻ LSB
Offset Error Match 0.15 1.0 ✻✻ LSB
Gain Error ±4 ±3LSB
Gain Error Match 0.1 1.0 ✻✻ LSB
Noise 30 ✻ µVrms
Power-Supply Rejection 70 ✻ dB

SAMPLING DYNAMICS

Conversion Time 12 ✻ Clk Cycles
Acquisition Time 3 ✻ Clk Cycles
Throughput Rate 125 ✻ kHz
Multiplexer Settling Time 500 ✻ ns
Aperture Delay 30 ✻ ns
Aperture Jitter 100 ✻ ps

DYNAMIC CHARACTERISTICS

Total Harmonic Distortion

(2)

Signal-to-(Noise + Distortion) V
Spurious-Free Dynamic Range V
Channel-to-Channel Isolation V

REFERENCE INPUT

Range 0.1 +V
Resistance DCLK Static 5 ✻ GΩ
Input Current 13 40 ✻✻ µA

DIGITAL INPUT/OUTPUT

Logic Family CMOS ✻
Logic Levels

V

IH

V

IL

V

OH

V

OL

Data Format Straight Binary ✻
External Clock 0.2 2 ✻✻MHz

POWER-SUPPLY REQUIREMENTS

+V

CC

Quiescent Current 280 650 ✻✻ µA

Power Dissipation 1.8 ✻ mW

TEMPERATURE RANGE

Specified Performance –40 +85 ✻✻°C

= +2.5V, f

REF

= 125kHz, and f

SAMPLE

CLK

= 16 • f

= 2MHz, unless otherwise noted.

SAMPLE

ADS7842E ADS7842EB

REF

✻✻V

VIN = 2.5Vp-p at 10kHz –77 –70 –79 –74 dB

= 2.5Vp-p at 10kHz 68 71 70 72 dB

IN

= 2.5Vp-p at 10kHz 72 78 76 80 dB

IN

= 2.5Vp-p at 50kHz 100 ✻ dB

IN

CC

f

= 12.5kHz 2.5 ✻ µA

SAMPLE

DCLK Static 0.001 3 ✻✻ µA

| I

| ≤ +5µA+V

IH

| I

| ≤ +5µA –0.3 +0.8 ✻✻V

IL

IOH = –250µA+V

IOL = 250µA 0.4 ✻ V

• 0.7 5.5 ✻✻V

CC

• 0.8 ✻ V

CC

✻✻V

Specified Performance 2.7 3.6 ✻✻V

f

= 12.5kHz 220 ✻ µA

SAMPLE

Power-Down Mode

(3)

, CS = +V

CC

3 ✻ µA

(1)

✻ Same specifications as ADS7842E.
NOTES: (1) LSB means Least Significant Bit. With V

at end of conversion when WR, CS, and BUSY conditions have all been met. Refer to Table III of this data sheet.

4

equal to +2.5V, one LSB is 610mV. (2) First five harmonics of the test frequency. (3) Power-down mode

REF

www.ti.com

ADS7842

SBAS103B

TYPICAL CHARACTERISTICS: +5V

0

–20

–40

–60

–80

–100

–120

FREQUENCY SPECTRUM

(4096 Point FFT; f

IN

= 10.3kHz, –0.2dB)

0 10025 7550

Frequency (kHz)

Amplitude (dB)

At TA = +25°C, +VCC = +5V, V

(4096 Point FFT; f

0

–20

–40

–60

–80

Amplitude (dB)

–100

–120

0 10025 7550

= +5V, f

REF

FREQUENCY SPECTRUM

IN

Frequency (kHz)

= 200kHz, and f

SAMPLE

= 1,123Hz, –0.2dB)

CLK

= 16 • f

SAMPLE

= 3.2MHz, unless otherwise noted.

SIGNAL-TO-NOISE RATIO AND SIGNAL-TO-

74

73

72

71

70

SNR and SINAD (dB)

69

68

12.0

11.8

11.6

11.4

Effective Number of Bits

11.2

11.0

(NOISE + DISTORTION) vs INPUT FREQUENCY

SNR

SINAD

101 100

Input Frequency (kHz)

EFFECTIVE NUMBER OF BITS

vs INPUT FREQUENCY

101 100

Input Frequency (kHz)

SFDR (dB)

–0.2

Delta from +25°C (dB)

–0.4

–0.6

SPURIOUS-FREE DYNAMIC RANGE AND TOTAL
HARMONIC DISTORTION vs INPUT FREQUENCY

85

SFDR

80

75

70

65

Input Frequency (kHz)

CHANGE IN SIGNAL-TO-(NOISE + DISTORTION)

0.6

0.4

0.2

0.0

fIN = 10kHz, –0.2dB

–20–40 100

vs TEMPERATURE

0 20 40 60 80

Temperature (°C)

THD

101100

–85

–80

–75

THD (dB)

–70

–65

ADS7842

SBAS103B

www.ti.com

5