Texas Instruments ADS5411, ADS5423 EVM, ADS5424 EVM, ADS5433 EVM, ADS5411 EVM User Manual
ADS5423/24/33 and ADS5411 EVM
User Guide
User's Guide
February 2006
SLWU020B
2 SLWU020B – February 2005 – Revised February 2006
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Contents
1 Overview ................................................................................................................... 5
1.1 Purpose .............................................................................................................. 5
1.2 EVM Basic Functions............................................................................................... 5
1.3 Power Requirements ............................................................................................... 5
1.3.1 Voltage Limits .............................................................................................. 5
1.4 EVM Operational Procedure ...................................................................................... 5
2 Circuit Description ..................................................................................................... 7
2.1 Schematic Diagram ................................................................................................. 7
2.2 Circuit Function ..................................................................................................... 7
2.2.1 Analog Inputs .............................................................................................. 7
2.2.2 Power ........................................................................................................ 7
2.2.3 Outputs ...................................................................................................... 7
3 Parts List .................................................................................................................. 9
4 Physical Description ................................................................................................. 11
4.1 PCB Layout ........................................................................................................ 11
4.2 Schematics ......................................................................................................... 17
SLWU020B – February 2005 – Revised February 2006 Contents 3
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List of Figures
4-1 Top Layer .................................................................................................................... 11
4-2 Layer 2, Ground Plane .................................................................................................... 12
4-3 Layer 3, Power Plane #1 .................................................................................................. 13
4-4 Layer 4, Power Plane #2 .................................................................................................. 14
4-5 Layer 5, Ground Plane .................................................................................................... 15
4-6 Layer 6, Bottom Layer .................................................................................................... 16
List of Tables
1-1 Three Pin Jumper List Table ............................................................................................... 6
2-1 Output Connector J9 ........................................................................................................ 8
2-2 Test Point Description ....................................................................................................... 8
3-1 Bill of Materials for EVM .................................................................................................... 9
4 List of Figures SLWU020B – February 2005 – Revised February 2006
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1.1 Purpose
1.2 EVM Basic Functions
Chapter 1
SLWU020B – February 2005 – Revised February 2006
Overview
This User’s Guide document gives a general overview of the ADS5423/24/33 and ADS5411 evaluation
module (EVM) and provides a general description of the features and functions to be considered while
using this module.
The EVM provides a platform for evaluating the ADS5423/24/33 14-bit analog-to-digital converter (ADC)
under various signals, references, and supply conditions. This evaluation module also allows the
evaluation of the ADS5411, an 11-bit analog-to-digital converter. This document should be used in
combination with the EVM schematic diagram supplied.
Analog input to the ADC is provided via external SMA connectors. The single-ended input the user
provides is converted into a differential signal at the input of the device. One input path uses a differential
amplifier, while the other input is transformer coupled.
The EVM provides an external SMA connector for input of the ADC clock. The single-ended input the user
provides is converted into a differential signal at the input of the device.
Digital output from the EVM is via a 40-pin connector. The digital outputs from the ADC are buffered
before going to the connector.
Power connections to the EVM are via banana jack sockets. Separate sockets are provided for the ADC
analog and digital supplies, the external buffer supply, and the differential amplifier supply.
1.3 Power Requirements
The EVM can be powered directly with only two supplies: a 3.3-V supply for the ADC digital driver supply
and external buffer supply, and 5 V for the ADC analog supply if using the EVM with transformer coupled
analog inputs. If using the differential amplifier analog inputs, ±5 V is required. Provision has also been
made to allow the EVM to be powered with independent 3.3-V supplies to provide higher performance.
1.3.1 Voltage Limits
Exceeding the maximum input voltages can damage EVM components. Under voltage may cause
improper operation of some or all of the EVM components.
1.4 EVM Operational Procedure
The EVM provides a flexible means of evaluating the ADS5423/24/33 or ADS5411 in a number of modes
of operation. A basic setup procedure that can be used as a board confidence check is as follows:
1. Verify all jumper settings against the schematic jumper list in Table 1-1 .
SLWU020B – February 2005 – Revised February 2006 Overview 5
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captured max code * captured min code
2
N
, where N is the number of bits.
EVM Operational Procedure
Table 1-1. Three Pin Jumper List Table
JUMPER FUNCTION LOCATION: PINS 1–2 LOCATION: PINS 2–3 DEFAULT
SJP3 Provides AIN+ source to ADC Source provided from T2 Source provided from Diff Amp 1–2
device
SJP4 Provides AIN– source to ADC Source provided from Diff Amp Source provided from T2 2-3
device
2. Connect supplies to the EVM as follows:
+5 V (4.75 V–5.25 V) ADC analog supply to J3 and return to J2.
+3.3 V (3 V–3.6 V) digital buffer supply to J4 and J1 and return to J6
3. Switch power supplies on.
4. Use a function generator with 50- Ω output to input a 105-MHz, 0-V offset, 1-Vrms sine-wave signal into
J5. The frequency of the clock must be within the specification for the device speed grade.
5. Supply an input signal by using a frequency generator with a 50- Ω output to provide a 15.5 MHz, 0-V
offset, –1-dBFS amplitude sine-wave signal into J11. A full-scale input tone into the ADC device is a
differential 2.2 Vpp and dBFS can be calculated by using the following formula:
6. The digital pattern on the output connector J9 should now represent a 2's compliment sine wave and
can be monitored using a logic analyzer.
6 Overview SLWU020B – February 2005 – Revised February 2006
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2.1 Schematic Diagram
The schematic diagram for the EVM is attached at the end of this document.
2.2 Circuit Function
The following paragraphs describe the function of EVM circuits. See the relevant data sheet for the device
operating characteristics.
2.2.1 Analog Inputs
The EVM can be configured to provide the ADC with either transformer-coupled or differential amplifier
inputs from a single-ended source. The default configuration uses the transformer configuration for which
the layout has been optimized to give the best performance. The inputs are provided via SMA connectors
J11 for transformer coupled input and J10 for differential amplifier input. To setup for one of these options,
the EVM must be configured as follows:
1. For a 1:1 transformer coupled input to the ADC, a single ended source is connected to J11. SJP3 has
2. For a differential input into the amplifier, the input source is connected to J10. SJP3 has pins 2 and 3
Chapter 2
SLWU020B – February 2005 – Revised February 2006
Circuit Description
pins 1 and 2 shorted and SJP4 has pins 2 and 3 shorted. This is the default configuration for the EVM.
shorted and SJP4 has pins 1 and 2 shorted. ±5VDC must be connected to the board to provide power
to U3 and U4 for this configuration.
2.2.2 Power
Power is supplied to the EVM via banana jack sockets. A separate connection is provided for a +3.3V
digital buffer supply (J1 and J2), 5-V analog supply (J3 and J2), ±5-V amplifier supply (J7, J8, and J12),
and 3.3-V external buffer supply (J4 and J6). A single 3.3-V buffer supply could be used by installing L6.
In this case, connect the 3.3 V to J1 and the return to J2.
2.2.3 Outputs
The data outputs from the ADC are buffered using a Texas Instruments SN74AVC16244. Output data
header J9 is a standard 40-pin header on a 100-mil grid, and allows easy connection to a logic analyzer.
The connector pinout is listed in Table 2-1 . Furthermore, two test points are provided and can be
monitored using a multimeter. Description of the test points is listed in Table 2-2 .
SLWU020B – February 2005 – Revised February 2006 Circuit Description 7
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Circuit Function
Table 2-1. Output Connector J9
J9 PIN DESCRIPTION J9 PIN DESCRIPTION
1 CLK 21 DATA BIT 6
2 GND 22 GND
3 NC 23 DATA BIT 7
4 GND 24 GND
5 NC 25 DATA BIT 8
6 GND 26 GND
7 NC 27 DATA BIT 9
8 GND 28 GND
9 DATA BIT 0 (LSB) 29 DATA BIT 10
10 GND 30 GND
11 DATA BIT 1 31 DATA BIT 11
12 GND 32 GND
13 DATA BIT 2 33 DATA BIT 12
14 GND 34 GND
15 DATA BIT 3 35 DATA BIT 13 (MSB)
16 GND 36 GND
17 DATA BIT 4 37 OVERFLOW
18 GND 38 GND
19 DATA BIT 5 39 DRV
20 GND 40 GND
DD
Table 2-2. Test Point Description
TEST POINT FUNCTION
J14 Monitor Vref (AVDD/2)
J17 Monitor DMID (DVDD/2)
Circuit Description8 SLWU020B – February 2005 – Revised February 2006
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