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Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING
DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to
be fit for commercial use. As such, the goods being provided may not be complete in terms
of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety measures typically found in the end product incorporating the
goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may not meet the technical
requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide,
the kit may be returned within 30 days from the date of delivery for a full refund. THE
FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO
BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR
STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods.
Further, the user indemnifies TI from all claims arising from the handling or use of the
goods. Please be aware that the products received may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is
the user’s responsibility to take any and all appropriate precautions with regard to
electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER
PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement
with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design,software performance, or infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM W arnings and Restrictions
notice in the EVM User’s Guide prior to handling the product. This notice contains
important safety information about temperatures and voltages. For further safety
concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory
practice standards.
No license is granted under any patent right or other intellectual property right of TI
covering or relating to any machine, process, or combination in which such TI products
or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 0 V to 5 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
40°C. The EVM is designed to operate properly with certain components above 40°C as long
as the input and output ranges are maintained. These components include but are not limited
to linear regulators, switching transistors, pass transistors, and current sense resistors. These
types of devices can be identified using the EVM schematic located in the EVM User’s Guide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
About This Manual
This user’s guide is to assist the user with the operation of the EVM using the
ADS5410 devices.
How to Use This Manual
Information About Cautions and Warnings
Preface
Read This First
This document contains the following chapters:
- Chapter 1—Overview
- Chapter 2—Physical Description
- Chapter 3—Circuit Description
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you
.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.
v
Contents
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
This user’s guide gives a general overview of the ADS5410 evaluation module
(EVM) and provides a general description of the features and functions to be
considered while using this module.
The ADS5410 EVM provides a platform for evaluating the ADS5410
analog-to-digital converter (ADC) under various signal, reference, and supply
conditions. Use this document in combination with the EVM schematic
diagram supplied.
1.2EVM Basic Functions
Analog input to the ADC is provided via two external SMA connectors. The
single-ended input the user provides is converted into a differential signal at
the input of the device. One input uses a differential amplifier , while the other
input is transformer coupled.
The EVM provides an external SMA connection for input of the ADC clock. The
user can send this clock to the output connector with the digital data or provide
a second clock source to be sent in place of the ADC clock. This allows the user
to provide the required setup and hold times of the output data with respect to
the output clock. See the Clock Inputs section for the proper configuration and
operation.
Digital output from the EVM is via a 40-pin connector. The digital lines from the
ADC are buffered before going to this connector. More information on this
connector can be found in the ADC output section.
Power connections to the EVM are via banana jack sockets. Separate sockets
are provided for the analog and digital supply.
1.3Power Requirements
The EVM can be powered directly with only a 1.8-V and 3.3-V supply if using
the module with a transformer coupled input and an internal reference source.
A voltage of ±5 V is required if using the differential amplifier input. Provision
has also been made to allow the EVM to be powered with independent analog,
digital, and I/O supplies to provide higher performance.
Voltage Limits
Exceeding the maximum input voltages can damage EVM
components. Undervoltage may cause improper operation of
some or all of the EVM components.
1-2
ADS5410 EVM Operational Procedure
1.4ADS5410 EVM Operational Procedure
The ADS5410 EVM provides a flexible means of evaluating the ADS5410 in
a number of modes of operation. A basic setup procedure that can be used as
a board confidence check is as follows:
1) Verify all jumper settings against the schematic jumper list in Table 1–1
and Table 1–2:
Table 1–1.Two Pin Jumper List
JumperFunctionInstalledRemovedDefault
W10N/ARemoved
W11N/ARemoved
R37Positive analog inputTransformer coupledNo connectionInstalled
R39Negative analog inputTransformer coupledNo connectionInstalled
R36Positive analog inputDifferential amplifierNo connectionRemoved
R38Negative analog inputDifferential amplifierNo connectionRemoved
R43, R44Output clock optionADC clock at output connectorBuff clock at output
connector
R62Optional output clock
parallel termination
R40Single-ended clock optionSingle-ended clock to ADCDifferential clock input
The EVM is constructed on a 4-layer, 104 mm (4.1 inch) x 114 mm (4.5 inch)
x 1,57 mm (0.062 inch) thick PCB using FR–4 material. Figure 2–1 through
Figure 2–4 show the individual layers.
2-2
Figure 2–2.Inner Layer 1, Ground Plane
PCB Layout
Physical Description
2-3
PCB Layout
Figure 2–3.Inner Layer 2, Power Plane
2-4
Figure 2–4.Bottom Layer
PCB Layout
Physical Description
2-5
Bill of Materials
2.2Bill of Materials
Table 2–1 lists the parts used in constructing the EVM.
1K Pot03296Y–102BournsR27, R28, R29
Transformer1ADT1–1WTT1
Transformer0T1–6T–KK81Mini-CircuitsT2
SMA connectors6713–4339
(901–144–8RFX)
Black test point35011KKeystoneTP10, TP11, TP12
Red test point15000KKeystoneTP1TP7, TP8, TP9
2POS header0TSW–150–07–L–SSamtecW10, W11
3POS header3TSW–150–07–L–SSamtecW1, W3, W6
2-circuit jumpers3863–3285Allied
40-pin header1TSW–120–07–L–DSamtecJ15
Red banana jacks5ST–351AAlliedJ6, J7, J9, J11, J13
Black banana jacks4ST351BAlliedJ5, J8, J10, J14
ADS54101ADS5410PFBTIU2
TPS792250TPS79225DBVRTIU4
100-Ω R-pack2742C163101JCTBournsRP1, RP2
SN74AVC16244DGG1SN74AVC16244DGG TIU5
THS45031THS4503IDTIU1
OPA4227UA0OPA4227UATIU3
Stand off hex (1/4” x 1”)4219–2063Allied
AlliedJ1, J2, J3, J4, J12,
J16
(molex)
R43, R44, R45,
R62
Physical Description
2-7
2-8
Chapter 3
Circuit Description
This chapter describes the circuit function and shows the schematic for the
EVM.
The following paragraphs describe the function of the individual circuits. See
data sheet for device operating characteristics.
3.1.1Analog Inputs
The ADC has either transformer-coupled inputs or differential-amplifier inputs
from a single-ended source. The inputs are provided via the SMA connectors
J1 and J2 on the EVM, which must be configured as follows:
- For a 1:1 transformer coupled input to the ADC, a single ended source is
- For a differential amplifier input to the ADC, a single ended source is
3.1.2Clock Inputs
connected to J2. R36 and R38 must be removed, and R37 and R39 must
be installed. The input is ac-coupled and has a 50-Ω terminator. This is the
EVM initial configuration.
connected to J1. R36 and R38 must be installed, and R37 and R39 must
be removed. The input has a 50-Ω terminator.
The EVM provides separate inputs for the ADC clock and output buffer clock.
This allows the user to send a modified version of the ADC clock (inverted,
delayed, etc.) with the output data to generate the required setup and hold
times for the user interface.
3.1.2.1Differential ADC Clock
The initial configuration of this EVM converts a single-ended input clock into
a differential clock using transformer T2. To provide a true differential ADC
clock, configure the board as follows:
1) Install J3, J16, R40, and R45.
2) Remove T2 and R42.
3) Connect the positive clock input to J3 and the negative clock input to J16.
3.1.2.2Single-Ended ADC Clock
To provide a single-ended ADC clock, configure the EVM as follows:
1) Install J3, R40, and C80.
2) Remove T2, R42, and R45.
3) Apply the clock input to the SMA connector J3.
3-2
The following paragraphs describe the function of the individual circuits. See data sheet for device operating characteristics.
3.1.2.3Buffer Clock
To provide a clock to the output buffer, apply a clock input to J4. To provided
the single-ended ADC clock to the output buffer do the following:
1) Insert R43 and R44.
2) Remove R41.
3) Install R62 if a pull-up resistor is desired.
Since the input clock will now be terminated at both loads, the clock signal am-
plitude should be adjusted to provide the appropriate levels at the loads.
3.1.3Control Inputs
The ADC has one discrete input to control the operation of the device.
3.1.3.1Power Down
With jumper W6 installed between pins 1 and 2, the ADC is in power-down
mode. The device is in operate mode with jumper W6 installed between pin 2
and pin32.
3.1.4Power
3.1.5Outputs
Power is supplied to the EVM via banana jack sockets. A separate connection
is provided for a 3.3-V analog supply (J6 and J5), a 1.8-V digital supply (J9 and
J10), a 1.8/3.3-V digital driver supply (J13 and J14), and a ±5-V analog supply
(J7, J8, and J11).
The data outputs from the ADC are buffered using a SN74AVC16244 before
going to header J15. The ADC and output buffer can provide 1.8-V or 3.3-V
output levels. The voltage placed at the driver power inputs (J13 and J14)
selects this. J15 is a standard 40-pin header on a 100-mil grid, and allows easy
connection to a logic analyzer. The connector pin out is listed in Table 3–1.
Circuit Description
3-3
Schematic Diagram
Table 3–1.Output Connector J15
J15 PinDescriptionJ15 PinDescription
1Data bit 0 (LSB)21Data bit 10
2GND22GND
3Data bit 123Data bit 11
4GND24GND
5Data bit 225NC
6GND26GND
7Data bit 327NC
8GND28GND
9Data bit 429Output clock
10GND30GND
11Data bit 531NC
12GND32GND
13Data bit 633NC
14GND34GND
15Data bit 735NC
16GND36GND
17Data bit 837NC
18GND38GND
19Data bit 939NC
20GND40GND
3.2Schematic Diagram
The following figures show the schematic diagram for the EVM.