TEXAS INSTRUMENTS ADS1610 Technical data

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ANALOG-TO-DIGITAL CONVERTER

ADS1610

SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

16-Bit, 10MSPS

FEATURES

D High-Speed, Wide Bandwidth ∆Σ ADC D 10MSPS Output Data Rate D 4.9MHz Signal Bandwidth D 86dBFS Signal-to-Noise Ratio D −94dB Total Harmonic Distortion D 95dB Spurious-Free Dynamic Range D On-Chip Digital Filter Simplifies Anti-Alias

Requirements

D SYNC Pin for Simultaneous Sampling with

Multiple ADS1610s

D Low 3µs Group Delay D Parallel Interface D Directly Connects to TMS320 DSPs D Out-of-Range Alert Pin D Pin-Compatible with ADS1605 (5MSPS ADC)

APPLICATIONS

D Scientific Instruments D Test Equipment D Communications

VREFP

VREFN

DESCRIPTION

The ADS1610 is a high-speed, high-precision, deltasigma (∆Σ) analog-to-digital converter (ADC) with 16-bit resolution operating from a +5V analog and a +3V digital supply. Featuring an advanced multi-stage analog modulator combined with an on-chip digital decimation filter, the ADS1610 achieves 86dBFS signal-to-noise ratio (SNR) in a 5MHz signal bandwidth. The device offers outstanding performance at these speeds with a total harmonic distortion of −94dB.

The ADS1610 ∆Σ topology provides key system-level design advantages with respect to anti-alias filtering and clock jitter. The design of the anti-alias filter is simplified since the on-chip digital filter greatly attenuates out-of-band signals. The ADS1601s filter has a brick wall response with a very flat passband (±0.0002dB of ripple) followed immediately by a very wide stop band (5MHz to 55MHz). Clock jitter becomes especially critical when digitizing high frequency, large-amplitude signals. The ADS1610 significantly reduces clock jitter sensitivity by an effective averaging of clock jitter as a result of oversampling the input signal.

Output data is supplied over a parallel interface and easily connects to TMS320 digital signal processors (DSPs). The power dissipation can be adjusted with an external resistor, allowing for reduction at lower operating speeds.

With its outstanding high-speed performance, the ADS1610 is well-suited for demanding applications in data acquisition, scientific instruments, test and measurement equipment, and communications. The ADS1610 is offered in a TQFP-64 package and is specified from −40°C to +85°C.

VMID RBIAS VCAPAVDD

DVDD

Bias Circuits

AINP

AINN

ADS1610

semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.

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∆Σ

Modulator

AGND DGND

Digital

Filter

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Parallel

Interface

PD SYNC CLK CS 2xMODE

RD DRDY OTR DOUT[15:0]

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SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

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ABSOLUTE MAXIMUM RATINGS

over operat i n g f ree-air temperature range unless otherwise noted

ADS1610 UNIT

AVDD to AGND −0.3 to +6 V DVDD to DGND −0.3 to +3.6 V AGND to DGND −0.3 to +0.3 V Input Current 100mA, Momentary Input Current 10mA, Continuous Analog I/O to AGND −0.3 to AVDD + 0.3 V Digital I/O to DGND −0.3 to DVDD + 0.3 V Maximum Junction Temperature +150 °C Operating Temperature Range −40 to +105 °C Storage Temperature Range −60 to +150 °C Lead Tem perature (soldering, 10s) +260 °C

(1)

Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only , an d functional operation of the device at these or any other conditions beyond those specified is not implied.

(1)

PACKAGE/ORDERING INFORMATION

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to

complete device failure. Precision integrated circuits may be more susceptible t o damage because very small parametric changes could cause the device not to meet its published specifications.

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Differential input voltage (VIN)

REF

(AINP − AINN)

±V

REF

Signal-to-noise ratio (SNR)

Total harmonic distortion (THD)

Signal-to-noise and distortion (SINAD)

Spurious-free dynamic range (SFDR) Intermodulation distortion

f1 = 3.8MHz, −8dBFS

TBD

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ELECTRICAL CHARACTERISTICS

All specifications at −40°C to +85°C, AVDD = 5V, DVDD = 3V, f unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Analog Input

= 60MHz, V

CLK

SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

= +3V, 2xMODE = low, VCM = 2.5V , and RBIAS = 18kΩ,

REF

ADS1610

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Common-mode input voltage (VCM) (AINP + AINN)/2

Absolute input voltage (AINP or AINN with respect to AGND)

Dynamic Specifications

Data rate

Signal-to-noise ratio (SNR)

Total harmonic distortion (THD)

Signal-to-noise and distortion (SINAD)

Spurious-free dynamic range (SFDR)

Aperture jitter Excludes jitter of CLK source 2 ps, rms Aperture delay 4 ns

2.5 V

−0.1 4.2 V

CLK

60MHz

= 100kHz, −2dBFS 86 dBFS

SIG

= 1MHz, −2dBFS 85 dBFS

SIG

= 4MHz, −2dBFS 85 dBFS

SIG

= 100kHz, −2dBFS −90 dB

SIG

= 100kHz, −6dBFS −95 dB

SIG

= 100kHz, −20dBFS −95 dB

SIG

= 1MHz, −2dBFS −89 dB

SIG

= 1MHz, −6dBFS −93 dB

SIG

= 1MHz, −20dBFS −95 dB

SIG

= 4MHz, −2dBFS −109 dB

SIG

= 4MHz, −6dBFS −105 dB

SIG

= 4MHz, −20dBFS −95 dB

SIG

= 100kHz, −2dBFS 85 dBFS

SIG

= 1MHz, −2dBFS 84 dBFS

SIG

= 4MHz, −2dBFS 85 dBFS

SIG

= 100kHz, −2dBFS 90 dB

SIG

= 100kHz, −6dBFS 96 dB

SIG

= 100kHz, −20dBFS 96 dB

SIG

= 1MHz, −2dBFS 91 dB

SIG

= 1MHz, −6dBFS 93 dB

SIG

= 1MHz, −20dBFS 96 dB

SIG

= 4MHz, −2dBFS 109 dB

SIG

= 4MHz, −6dBFS 105 dB

SIG

= 4MHz, −20dBFS 95 dB

SIG

f1 = 3.8MHz, −8dBFS f2 = 4MHz, −8dBFS

MSPS

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Passband transition

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SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

ELECTRICAL CHARACTERISTICS (continued)

All specifications at −40°C to +85°C, AVDD = 5V, DVDD = 3V, f unless otherwise noted.

PARAMETER UNITMAXTYPMINTEST CONDITIONS

Digital Filter Characteristics

Passband 0

Passband ripple ±0.0002 dB

−0.1dB attenuation

−3.0dB attenuation

Stop band Stop band attenuation 80 (see Figure 14) dB

= 60MHz, V

CLK

= +3V, 2xMODE = low, VCM = 2.5V , and RBIAS = 18kΩ,

REF

ADS1610

CLK

60MHz

4.4

CLK

60MHz

CLK

4.6

4.9

5.6 54.4

MHz

Group delay

Settling time To ±0.001% 5.5 µs

Static Specifications

Resolution No missing codes 16 Bits Input referred noise TBD µV, rms Integral nonlinearity End-point fit, −2dBFS signal ±0.75 LSB Differential nonlinearity ±0.5 LSB Offset error T = +25°C TBD mV Offset drift TBD µV//°C Gain error T = +25°C TBD % Gain drift Excluding reference drift TBD ppm/°C Common-mode rejection At DC TBD dB Power-supply rejection At DC TBD dB

Voltage Reference

(VREFP − VREFN)

REF

VREFP 3.6 4.0 4.4 V VREFN 0.9 1.0 1.1 V VMID 2.2 2.5 3.8 V

Digital Input/Output

Input leakage DGND < V

Power-Supply Requirements

AVDD 4.9 5.0 5.1 V DVDD 2.7 3.0 3.6 V AVDD current 150 mA DVDD current 70 mA Power dissipation 960 mW

60MHz

CLK

3.0

2.9 3.0 3.1 V

0.7 DVDD DVDD V DGND 0.3 DVDD V

IOH = −50µA 0.8 DVDD V IOL = 50µA 0.2 DVDD V

DIGITAL INPUT

< DVDD ±10 µA

µs

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SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

PIN CONFIGURATION

Top View HTQFP

VREFP

VMID

VREFN

VCAP

AVDD2

AGND2

CLK

AGND

DGND

DVDD

DGND

DVDD

64 63 62 61 60 59 58 57 56 55 54

53 52 51 50 49

AGND

AVDD

AGND

AINN AINP

AGND

AVDD

RBIAS

AGND

AVDD

AGND

AVDD

2xMODE

NC NC

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16

17 18 19 20 21 22 23 24 25 26 27

DVDD

DGND

SYNC

ADS1610

OTR

DOUT[15]

DOUT[14]

DOUT[13]

DOUT[12]

DOUT[11]

DOUT[10]

DOUT[9]

DOUT[8]

DOUT[7]

DOUT[6]

DOUT[5]

DOUT[4]

28 29 30 31 32

DRDY

DGND

DVDD

DOUT[0]

DOUT[1]

DOUT[2]

DOUT[3]

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SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

PIN FUNCTION DESCRIPTION

ANALOG/DIGITAL

PIN NAME PIN #

AGND 1, 3, 6, 9, 11, 55 Analog Analog Ground

AVDD 2, 7, 10, 12 Analog Analog Supply

AINN 4 Analog Input Negative Analog Input AINP 5 Analog Input Positive Analog Input

RBIAS 8 Analog Analog Bias Setting Resistor

NC 13, 15, 16, 27, 28, 45-48 — Must be left unconnected.

2xMODE 14 Digital Input; Active High 2xMODE (20MSPS)

PD 17 Digital Input; Active Low Power-Down DVDD 18, 26, 49, 50, 52, 53 Digital Digital Supply DGND 19, 25, 51, 54 Digital Digital Ground SYNC 20 Digital Input; Active Low Digital Reset

CS 21 Digital Input; Active Low Chip-Select

RD 22 Digital Input; Active Low Read Enable

OTR 23 Digital Output Analog Inputs Out-Of-Range

DRDY 24 Digital Output Data Ready

DOUT[15:0] 29-44 Digital Output Data Output. DOUT[15] is the MSB and DOUT[0] is the LSB.

CLK 56 Digital Input Clock Input

AGND2 57 Analog Analog Ground for AVDD2 AVDD2 58 Analog Analog Supply for Modulator Clocking

VCAP 59 Analog Bypass Capacitor

VREFN 60, 61 Analog Negative Reference Voltage

VMID 62 Analog Midpoint Voltage

VREFP 63, 64 Analog Positive Reference Voltage

INPUT/OUTPUT

DESCRIPTION

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TIMING SPECIFICATIONS

CLK

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SBAS344A − AUGUST 2005 − REVISED SEPTEMBER 2005

DRDY

DOUT[15:0] Data N Data N + 1 Data N + 2

Figure 1. Data Retrieval Timing

CLK

RD, CS

DOUT[15:0]

Figure 2. DOUT Inactive/Active Timing

DRDY

SYNC

DOUT[15:0] Valid Data

Figure 3. Reset Timing

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