Texas Instruments ADS1605, ADS1606 User Manual

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User’s Guide
April 2004 Data Acquistion
SLAU122A
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty . Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.
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Mailing Address: Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
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EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR S TATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards. No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments Post Office Box 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
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EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 8 V to 40 V and the output voltage range of 0 V and 5 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than xxx°C. The EVM is designed to operate properly with certain components above xxx°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments Post Office Box 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
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About This Manual
This user’s guide describes the characteristics, operation, and use of the ADS1605/6 EVM 16-bit analog-to-digital evaluation board. A complete circuit description as well as schematic diagram and bill of materials are included. Contact the Product Information Center or e-mail dataconvapps@list.ti.com for questions regarding this EVM.
How to Use This Manual
This document contains the following chapters:
- Chapter 1 – Analog Interface
- Chapter 2 – Digital Interface
Preface
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- Chapter 3 – Power Distribution
- Chapter 4 – Getting the most from your EVM
- Chapter 5 − EVM BOM, ADS1605/06EVM Layouts and
Schematics
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement. A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement. A warning statement describes a situation that could potentially
cause harm to you
.
Read This First
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The information in a caution or a warning is provided for your protection. Please read each caution and warning carefully.
Related Documentation From Texas Instruments
To obtain a copy of any of the following TI documents, call the Texas Instruments Literature Response Center at (800) 477-8924 or the Product Information Center (PIC) at (972) 644-5580. When ordering, please identify this booklet by its title and literature number. Updated documents can also be obtained through our website at www.ti.com.
Data Sheets: Literature Number:
ADS1605/ADS1606 SBAS274 REF02 SBVS003A OPA2822 SBOS188A
FCC Warning
This equipment is intended for use in a laboratory test environment only. It gen­erates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other en­vironments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
Trademarks
TI Logo, TMS320C2000, TMSC3205000, TMS320C6000, and Code Composer Studio are trademarks of Texas Instruments.
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1 EVM Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Introduction 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Analog Interface 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Analog Input 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 External Reference 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Modulator Clock 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Digital Interface 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 Board-Level Control 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 DIP Switch Options 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2 Jumper Options 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3 Resetting the ADS1605 and ADS1606 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4 Out of Range Indication 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.5 Interrupt Source 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.6 Base Address and Chip Select 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 External Interface 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Data Connector Pinout 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1 Control Connector Pinout 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Power Distribution 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Getting the Most From Your EVM 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Stand-Alone EVM 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 DSP Interface 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.1 TMS320C6711 Interface 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 EVM BOM, ADS1605/06 EVM Layouts and Schematics 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 EVM Bill of Materials 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 ADS1605/06 EVM Layout Details 5-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 ADS1605/06 EVM Schematics 5-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents
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1−1 FFT Plot 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−2 Default Configuration Used by the EVM 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−3 Block Diagram 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−1 Arrangement of DSK, Interface Card and EVM 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1 Using the EVM with a TI DSK 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−2 Using the EVM with an External Reference Voltage 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 Jumper Settings for J13 and J14 on the 5−6K Interface Card 4-3. . . . . . . . . . . . . . . . . . . . . . .
4−2 CCS Project Menu 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−3 CCS Project Open Dialog 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−4 CCS Project View 4-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−5 CCS Context Menu 4-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−6 CCS Graph Property Windows 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−7 CCS Window With Graph 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−1 Top Tracking Layer 5-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−2 Internal Power and Ground Layers 5-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−3 Bottom Tracking Layer 5-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1−1 Analog Interface 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−2 Selection Between Internal/External Reference 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−3 External Reference 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1−4 Modulator Clock Options 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−1 Switch Function Control 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−2 FIFO Settings 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−3 Jumper Options 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−4 Memory Space Address 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−5 Assignment and Function at J2/P2 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2−6 Assignment and Function at J3/P3 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3−1 Power Connector P4/J4 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4−1 Jumper Settings for J13 and J14 on the 5−6K Interface Card 4-3. . . . . . . . . . . . . . . . . . . . . . .
5−1 ADS1605 Bill of Materials 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5−2 ADS1606 Bill of Materials 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Chapter 1
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Topic Page
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Introduction 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Analog Interface 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Analog Input 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 External Reference 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 Modulator Clock 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EVM Overview
1-1
Page 10
Features
1.1 Features
1.2 Introduction
- Evaluation Board featuring the ADS1605 ADC (order ADS1605 EVM) or
ADS1606 ADC (order ADS1606 EVM).
- On-board reference, with recommended buffer circuitry
- On-board signal conditioning.
- Basic system-level logic decoding.
The ADS1605 EVM is a high speed high resolution delta sigma (∆Σ) analog-to­digital converter. It features a data rate of 5 MSPS, a bandwidth (−3 dB) of
2.45 MHz and a passband ripple of less than ±0.0025 dB. The evaluation module (EVM) is a stand-alone, full-featured system that offers
data sheet performance. Additionally, the EVM conforms to a common electrical and mechanical pinout for analog I/O, digital I/O and power , enabling the EVM to be quickly adapted to various host platforms.
Typical performance of the ADS1605 EVM is shown by the FFT plot in Figure 1−1.
Figure 1−1.FFT Plot
1.3 Analog Interface
The analog interface consists of the following subsections:
- Analog Input
- External reference
- Modulator clock
Alterations to the analog interface are achieved by various jumpers, the function of each is sum
1-2
marized in Table 1−1.
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Table 1−1.Analog Interface
Reference
Description
Common Mode Voltage
Analog Input
Reference
Designator
Analog Input options
W1 Selects AIN_N source Installed Not installed W5 Selects AIN source Installed Not installed
Reference voltage options
W3 Selects VREFN source Installed Not installed W4 Selects VCOM source Installed Not installed W2 Selects VREFP source Installed Not installed W6 Connects VCM for on board reference Installed
Modulator clock
W7 Modulator clock source Installed Not installed
Factory Set Condition
1−2 2−3
1.4 Analog Input
There are various options available to deliver the signal to the ADC:
- Single-ended via SMA connector at J6.
- Single-ended via socket strip/header at J1/P1 connector.
- Differentially via socket strip/header at J1/P1 connector.
The default configuration used by the EVM is shown in Figure 1−2. It provides a convenient method to convert a single-ended bipolar signal into a differential signal. The signal is centered on a common mode voltage derived from the reference section of the EVM.
Figure 1−2.Default Configuration Used by the EVM
Gain = 1
Gain = −1
Common Mode Voltage
The differential signal is routed via W1 and W5, which enables the user to provide an external signal.
1.5 External Reference
To W1 and W5
The selection between the device’s internal reference and an external reference is made by SW1. 8−9
EVM Overview
1-3
Page 12
Modulator Clock
Reference
Table 1−2.Selection Between Internal/External Reference
Reference Designator Voltage Reference Selection
SW1 8−9 Internal External
0 Not selected Selected 1 Selected Not selected
To use the external reference voltage, the user must apply an input voltage via J7; the voltage supplied must be between 8 V and 40 V.
The external reference voltage is generated differentially and can be adjusted by three potentiometers, detailed in Table 1−3.
Table 1−3.External Reference
Reference Designator Function
RV2 Adjusts main +5 V RV1 Adjusts REF+ voltage RV3 Adjusts REF− voltage
Figure 1−3 shows a block diagram of the configuration.
Figure 1−3.Block Diagram
8 V − 40 V
5 V
Reference
1.6 Modulator Clock
The ADS1605 and ADS1606 partition the modulator clock as part of the analog section. There are two options available. The clock may either be supplied via the on-board 40-MHz oscillator, or externally via J5. This option is useful for low-jitter coherent sampling during testing.
Table 1−4.Modulator Clock Options
Designator
W7 Modulator Clock Source Installed Not installed
Gain = 1
Gain = 1
Gain = 1
Gain = 1
V
=
MID
Description
REF+
(REF+) + (REF−)
2
REF−
V
CM
Clock .40 MHz
To ADC
To Analog Input
Factory Set Condition
1−2
2−3
Clock .J5
1-4
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Chapter 2
 
The chapter describes the EVM digital interface consisting of the following subsections:
Topic Page
2.1 Board-Level Control 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 External Interface 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Data Connector Pinout 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Interface
2-1
Page 14
Board-Level Control
Reference
Reference
r
Description
2.1 Board-Level Control
2.1.1 DIP Switch Options
There are optional settings for the ADS1605/06 that are set and controlled manually via a DIP switch – SW1. The functions controlled by this switch are summarized below.
Table 2−1.Switch Function Control
Switch Factory-Set Condition
Position Function 1 0
8 External reference External reference is selected Internal reference is selected 7 Power down Device is not powered down Device is powered down 6 Reserved 5 Reserved 4 Reserved 3 FIFO 0 Only applicable to ADS1606, See Table 2−2 2 FIFO 1 1 FIFO 2
Table 2−2.FIFO Settings
FIFO 2 FIFO 1 FIFO 0 FIFO Buffer Level
0 0 0 0 0 0 1 2 0 1 0 4 0 1 1 6 1 0 0 8 1 0 1 10 1 1 0 12 1 1 1 14
More information on the operation and use of the FIFO can be found in the ADS1605/06 data sheet.
2.1.2 Jumper Options
There are 5 jumpers associated with the digital control section, their functions are detailed below.
Table 2−3.Jumper Options
Factory Set Condition
Designato
W9 Select RESET source Derived from W10 Directly from J3 pin 3 W10 Select WR source Derived from digital interface Manual, via SW2 W11 Select DRDY source Falling edge interrupt Rising edge interrupt J8 1−2 Address line A2 Low J8 3−4 Address line A3 Low
1−2 2−3
2-2
Page 15
2.1.3 Resetting the ADS1605 and ADS1606
Address selected
The ADS1605 and ADS1606 are synchronously reset on the EVM when the RESET pin is asserted LOW. This can be accomplished by issuing a write command (WR
) via the host system or momentarily depressing switch SW2. Whichever option is chosen, the reset signal is then synchronized with the modulator clock and is available for application to the RESET Alternatively, the user can apply the RESET signal directly via W9.
2.1.4 Out of Range Indication
LED D1 indicates if an out of range (OTR) event has occurred. This LED does not affect the device’s performance. To clear the LED the device has to be reset, either manually or via SW2.
2.1.5 Interrupt Source
Some microprocessors only recognize falling edge interrupts; others only recognize rising edge interrupts while others may be programmed to recognize either. By using W11, the user can choose either rising edge interrupts or falling edge interrupts.
Board-Level Control
pin of the device.
2.1.6 Base Address and Chip Select
The EVM can be mapped into a memory location by setting a base address. There are four possible base addresses for the EVM. The base address is set by J8. When the logic state of the two external address signals matches the logic state set-up by the two jumpers on J8 and the access is a valid memory access, the EVM generates a CS qualified as a read cycle or a write (RESET equivalent to logic 0 on the corresponding address line. An uninstalled jumper is equivalent to logic 1 on the corresponding address line.
The TMS320C6711 DSK provides two memory spaces for daughter boards. The two memory-space enables (CE2 and CE3) are buffered versions of the DSP outputs and are not generated by decode logic on the DSK. The 5−6K EVM uses CE2 to indicate that the access is valid. This places the daughter card at an address space beginning at A0000000.
Table 2−4.Memory Space Address
J8
1−2 3−4
0 0 0xA0000000 0 1 0xA0000004 1 0 0xA0000008 1 1 0xA000000C
signal for the ADC. This can then be further
) cycle. An installed jumper is
Digital Interface
2-3
Page 16
External Interface
2.2 External Interface
The pinout for the EVM has been arranged to easily mate with a growing range of interface adapters. The premise of this arrangement is to ensure a high degree of modularity without committing the EVM to be used in only one particular platform. The interface card that is available at this time is the 5−6K interface card http://focus.ti.com/lit/ug/slau104/slau104.pdf enables any TMS320C5000 DSP Platform or TMS320C6000 DSP Platform based DSK with standard expansion connectors to connect to the EVM. Figure 2−1 shows the arrangement of DSK, interface card and EVM.
Figure 2−1.Arrangement of DSK, Interface Card and EVM
ADS1605/06 EVM
5−6K Interface Card
DSK Platform
For interfaces to other platforms, such as C2000 DSP and programmable logic systems contact the PIC.
. This card
2-4
Page 17
2.3 Data Connector Pinout
The data from the ADC is available at J2/P2. The assignment and function of each pin is given in Table 2−5.
Table 2−5.Assignment and Function at J2/P2
Pin Number Function Pin Number Function
1 D00 2 IO Ground 3 D01 4 IO Ground 5 D02 6 IO Ground 7 D03 8 IO Ground 9 D04 10 IO Ground 11 D05 12 IO Ground 13 D06 14 IO Ground 15 D07 16 IO Ground 17 D08 18 IO Ground 19 D09 20 IO Ground 21 D10 22 IO Ground 23 D11 24 IO Ground 25 D12 26 IO Ground 27 D13 28 IO Ground 29 D14 30 IO Ground 31 D15 32 IO Ground 33 Not Connected 34 IO Ground 35 Not Connected 36 IO Ground 37 Not Connected 38 IO Ground 39 Not Connected 40 IO Ground
Data Connector Pinout
2.3.1 Control Connector Pinout
The ADC is controlled by the signals that originate from J3 / P3. The assignment and function of each pin is given below.
Table 2−6.Assignment and Function at J3/P3
Pin Number Function Pin Number Function
1 CS 2 IO Ground 3 WR 4 IO Ground 5 RD 6 IO Ground 7 Not Connected 8 IO Ground 9 Not Connected 10 IO Ground 11 A2 12 IO Ground 13 A3 14 IO Ground 15 Not Connected 16 IO Ground 17 Not Connected 18 IO Ground 19 DRDY_OUT 20 IO Ground
Digital Interface
2-5
Page 18
2-6
Page 19
Chapter 3
 
The ADS1605/6EVM board requires various power sources for operation.
- A dual ±6 Vdc supply for best performance of the analog front−end. If a ±6
Vdc supply is not readily available, a ±5 Vdc supply will be sufficient. This voltage is delivered by P4/J4 pins 1 & 2.
- Two 5.0 Vdc supply
J One supply provides the power for the analog section of the ADC. This
voltage is delivered by P4/J4 pin 3.
J One supply provides the power for the digital I/O section of the ADC
and the EVM. This voltage is delivered by P4/J4 pin 10.
- A single 3.0 Vdc supply for the digital core, a 3.3 Vdc supply is acceptable.
This voltage is supplied via pin 9.
The simplest way to provide these voltages is to use the power connector P4/J4 and derive the voltages elsewhere, preferably via a linear supply. The pinout for this connector is shown below
The simplest way to provide these voltages is to use the power connector P4/J4 and derive the voltages elsewhere, preferably via linear supplies.
The pinout for this connector is shown in Table 3−1.
Table 3−1.Power Connector P4/J4
Signal P4/J4 Pin Number Signal
+VA 1 2 −VA
+5VA 3 4 −5VA
AGND 5 6 DGND +1.8VD 7 8 VD1 +3.3VD 9 10 +5VD
Should the user decide to use a TI DSK, the digital requirements for pin 9 and pin 10 can be supplied by the DSK via the 5−6K interface card. See Figure 3−1 for details.
A single 8−40-Vdc supply is required if the user does not wish to use the internal voltage reference. This voltage can only be applied via J7 on the EVM,
Power Distribution
3-1
Page 20
Apply ±6 V (or ±5 V) for the Analog Front-End Here
see Figure 3−2 for details.
Apply +5 V for the Analog Section of the ADC Here
If The User Chooses to Use a DSK The Voltage Can be Derived Directly From The DSK, Check The Jumper Settings.
Alternatively, Supply Power via J6 and J11 and Change The Jumper Settings.
Figure 3−1.Using the EVM with a TI DSK
3-2
Page 21
8−40 V for external voltage reference
Figure 3−2.Using the EVM with an External Reference Voltage
Power Distribution
3-3
Page 22
3-4
Page 23
Chapter 4
   ! " 
In general there are two hardware directions that the user can take with the EVM.
Topic Page
4.1 Stand-Alone EVM 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 DSP Interface 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Getting the Most From Your EVM
4-1
Page 24
Stand-Alone EVM
4.1 Stand-Alone EVM
The EVM can be used on its own. Using the EVM in this manner obliges the user to provide a custom digital interface between the EVM and a host system. Users are responsible for ensuring proper timing requirements are met in addition to providing any glue logic necessary. Users must also provide the necessary analog interface and supply power to the EVM.
4.2 DSP Interface
Depending upon the DSP that the user chooses, there are a number of TI DSKs available. DSKs are DSP Starter Kits, and provide users with a DSP starter system. They contain all the necessary hardware and software to quickly begin prototype construction.
4.2.1 TMS320C6711 Interface
4.2.1.1 Example Program
This section is a step-by-step description of how to use one of the example programs available. The goal of the program is to display the digitized analog input of the ADS1605 on the PC, as shown in Figure 4−7.
The hardware is set-up as follows:
- TMS320C6711 DSK
- 5−6K Interface card
- ADS1605 EVM
Given this configuration, the hardware is assembled as shown in Figure 2.1. The example program uses the driver files created with the Data Converter
Plug-in of Code Composer Studio, which can be downloaded from the TI’s website at http://www.ti.com/sc/
dcplug−in . For the example programs
available with the ADS1605 EVM, the plug-in is not needed, as all the files are provided.
The program itself performs the following steps:
- Initialization of global variables by calling the function dc_configure() with
the settings of the ADS1605. These settings are stored in the Ads1605_1 data structure (defined in the file t1605_fn.h) which contains the information about the physical address of the converter, the interrupt in use and it’s polarity and other settings used by the driver . If the initialization fails for any reason, an error message appears in the stdout window of Code Composer Studio.
- Enabling of the interrupts of the DSP.
- Reading a block of data from the ADS1605, by calling the dc_rblock()
function (residing the file t1605_ob.c) with the settings of the ADS1605, the address of the memory block were the date should be written to and the block size. Once the transfer is complete, the semaphore Ads1605_1.xferInProgress is reset and a new transfer is initiated.
4-2
Page 25
In order to get the expected result, the following steps need to be performed.
- Make sure that the jumpers on the 5−6K interface card are set according
to the following Table 4−1 and Figure 4−1.
Table 4−1.Jumper Settings for J13 and J14 on the 5−6K Interface Card
Reference Designator Position
1−2 2−3 W1 Installed W2 Not Installed Installed W3 Not Installed Installed W4 Not Installed Installed W5 Not Installed Installed W6 Installed Not Installed
Figure 4−1.Jumper Settings for J13 and J14 on the 5−6K Interface Card
J14
DSP Interface
J13
Make sure that all jumpers on the ADS1605/1606 EVM are set to the
-
factory defaults, as described in the chapters 1 and 2 of this User’s Guide Additionally, set the jumper W11 to position 2−3 to configure the interrupt
for rising edges. As described in Chapter 2 paragraph 2.1.5.
- Apply power to the DSP starter kit and also to the EVM, as described in
Chapter 3.
- Apply an analog signal on either J6 or pin 4 of J1. For example, apply a
10-kHz sine wave with 1-V
- Start Code Composer Studio (CCS).
- In Code Composer Studio, open the project for your DSP hardware
and 0-V offset.
pp
platform by clicking on Project −> Open on Code Composer Studios menu bar and loading the respective project for your hardware/ starter kit from the path, where you copied the example projects to:
J For the TMS320VC5510 DSK: Open ADS1605−C5510.pjt J For the TMS320C6711 DSK: Open ADS1605−C6711.pjt J For the TMS320C6713 DSK: Open ADS1605−C6713.pjt J For the TMS320C6416 DSK: Open ADS1605−C6414.pjt
.
Getting the Most From Your EVM
4-3
Page 26
DSP Interface
Figure 4−2.CCS Project Menu
Figure 4−3.CCS Project Open Dialog
- Once the project is open, expand the project tree by clicking on the (+) in
front of it and expand the source files as well. The project window should look like the one
in Figure 4−4.
4-4
Page 27
Figure 4−4.CCS Project View
DSP Interface
- The next step is to load the executable program provided into the DSP by
clicking on File " Load Program and selecting the file ADS1605−CXXXX.out from the Debug submenu, where the XXXX in the
filename stands for the platform you use (5510, 6711, 6713, 6416).
- Now open the main.c source file by double-clicking on the file name in the
project view and scroll down to the line, where the read command for the ADS1605 is issued (dc_rblock() function). This line reads:
/* issue a read block command to the converter */
dc_rblock(&Ads1605_1, /* data converter object */
r_buffer, /* address of the target buffer */
BUFFER_SIZE, /* size of the target buffer */
0); /* no callback function */
- Set the cursor in front of the dc_rblock() command and right click in this
line. A new pop-up menu opens; select Insert Graph.
Getting the Most From Your EVM
4-5
Page 28
DSP Interface
Figure 4−5.CCS Context Menu
- With this done, a new dialog window with the properties of the graph
appears. Here, a few values must be entered, whereas most of the settings can be left in the default position:
J Start Address: This is the starting location of the acquisition buffer
J Acquisition Buffer Size: This is the size of the acquisition buffer you
J Display Data Size: This is the size of the display buffer that you use.
4-6
containing the data to be graphed. When the graph is updated, the acquisition buffer, starting at this location, is fetched from the target board. This acquisition buffer then updates the display buffer, which is graphed. In the case of the sample program, set it to r_buffer.
are using on your target board. In the case of the sample program, the size of the r_buffer is defined with the symbol BUFFER_SIZE in the main.c file and should be set to 1024 in the dialog window.
The contents of the display buffer are graphed on your screen. The display buffer resides on the host, so a history of your signal can be displayed even though it no longer exists on the target board. In case of the sample program, set it to 1024 as well.
Page 29
DSP Data Type: Select 16−bit signed integer from the drop−down list,
J
as the ADS1605 is a 16−bit converter
J Sampling Rate (Hz): This field contains the sampling frequen-
cy for acquisition buffer samples, such as for analog to digital conversion. The sampling rate is used to calculate the time and frequency values displayed on the graph. For a time domain graph, this field calculates the values for the time axis. The axis is labeled from 0 to (Display Data Size × 1/Sampling Rate). For the sample program, set it to 5000000 (5 MHz).
More information on the different settings can be found in the help file of Code Composer Studio.
Once all settings are entered, click on the OK button to close the dialog. The graph window appears, currently with no useful values, as the program has not started yet.
Figure 4−6.CCS Graph Property Windows
DSP Interface
- Start the program by hitting the <F5> key on your keyboard. After a short
period of time, the graph window should be updated to show the waveform of the analog signal (see Figure 4−7).
Getting the Most From Your EVM
4-7
Page 30
DSP Interface
Figure 4−7.CCS Window With Graph
4-8
Page 31
Chapter 5
 #$ %&'()*+)(  ,- 
&!
This chapter contains the bill of material, EVM layouts and the schematics for the ADS1605/06.
Topic Page
5.1 EVM Bill of Materials 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 ADS16005/06 EVM Layout Details 5-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 ADS1605/06 EVM Schematics 5-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-1
Page 32
EVM Bill of Materials
32
0.1 µF
C12, C14 C15, C38
Capacitor 0.1 µF 25V ceramic X7R 0603
Panasonic
ECJ−1VB1E104K
C15, C38 C44, C46
ceramic X7R 0603
C44, C46 C49, C50
C49, C50
C57, C65
C67, C70
C73, C75
C76, C78
C80, C81
C89, C93 C102, C103
C104, C105
C106, C107
C108, C112
5.1 EVM Bill of Materials
The following tables contains a complete Bill of Materials for the ADS1605 and ADS1606 EVM.
Table 5−1.ADS1605 Bill of Materials
Qty Value Ref Des Description Vendor Part number
5 0.001 µF C6, C9, C16,
C17, C66
4 0.01 µF C1, C22, C28,
C58
6 0.01 µF C8, C10, C21,
C23, C25, C64
4 0.1 µF C39, C40,
C41, C53
1 0.01 µF C56 Capacitor 0.01 µF 25 V
Capacitor ceramic 1000 pF 5% 50 V NP0 0603
Capacitor 10000 pF 50 V ceramic X7R 0603
Capacitor 10000 pF 200 V ceramic X7R 0805
Capacitor 0.1 µF 10 V ceramic X5R 0402
ceramic X7R 0402
AVX Corporation 06035A102JAT2A
Kemet C0603C103J5RACTU
Panasonic ECJ−2YB2D103K
Panasonic ECJ−0EB1A104K
Panasonic ECJ−0EB1E103K
C57, C65 C67, C70 C73, C75 C76, C78 C80, C81 C89, C93 C95, C97 C98, C100
5 0 R R5, R11, R34,
R35, R40
2 1 K R38, R39 Resistor 1.00 k 1/10W 1%
10 1 µF C45, C47,
C51, C52, C79, C86, C87, C90, C94, C101
15 1 µF C5, C7, C20,
C24, C32, C24, C32, C34, C37, C61, C62, C88, C91, C99, C109, C110, C111
1 1 µF C54 Capacitor 1 µF 50 V
1 2.2 R R44 Resistor 2.2 1/4W 5%
Resistor 0 1/16W 5% 0402 SMD
0805 SMD Capacitor 1.0 µF 16 V
ceramic X5R 0603
Capacitor 1 µF 16 V ceramic 0805 X5R
ceramic X5R 1210
1206
Panasonic − ECG
Panasonic ERJ−6ENF1001V
Panasonic ECJ−1VB1C105K
Panasonic ECJ−2FB1C105K
Panasonic ECJ−4YB1H105K
Panasonic ERJ−8GEYJ2R2V
ERJ−2GE0R00X
5-2
Page 33
EVM Bill of Materials
Qty Part numberVendorDescriptionRef DesValue
1 2.2 µF C3 CAP ceramic 2.2 µF 10V
1 W6 2 Position jumper _ 0.1”
2 3.01 K R2, R19 SMD thin film chip resistor
10 W1, W2, W3,
W4, W5, W7, W8, W9, W10, W11
3 4.7 µF C42, C48,
C85
2 4.12K R3, R18 Thin film chip resistor, 0805
2 5K RV1, RV3 Trimpot 5 k 4 MM top adj
1 J4 2 x 5 x 0.1 SMT square post
1 P4 5 x 2 x 0.1 SMT connector Samtec SSW−105−22−F−D−VS−K 1 9.09 K R1 0805 SMD thin film chip
1 10 K RP6 Resnet 16 POS ISOLAT
7 10 K R4, R20, R36
R43, R45, R48, R49
1 10 K RV2 Trimpot 10 k 4 MM top adj
9 10 µF C11, C18,
C27, C30, C59, C60, C71, C72, C84
4 10 µF C2, C4, C29 Capacitor 10 µF 16 V
1 10 µF C55 Capacitor 10 µF 50 V
1 10 µF C43 Capacitor tantalum 10 µF 10
1 12.1K R24 0805 SMD thin film chip
2 22 pF C13, C19 Capacitor ceramic 22 PF
3 22 µF C26, C82,
C83
1 22 µF C68 Capacitor tantalum 22 µF
5 33 R RP1, RP2,
RP3, RP4, RP5
X5R 0805
spacing
0805 3.01 K 0.1% 25 PPM 3-position jumper Samtec TSW−103−07−L−S
Capacitor 4.7 µF/10 V TEH SER SMD
4.12 K 0.1% 25 PPM
SMD
header
resistor 9.09K 0.1% 25PPM
10 k SOIC RES 10 k 1/8W 5% 0805
SMD
SMD Capacitor 10 µF 10 V
ceramic F 0805
ceramic X5R 1206
ceramic F 1210
V 20% SMT
resistor 12.1K 0.1% 25 PPM
50 V NP0 0805 Capaciator 22 µF 6.3 V
ceramic X5R 1206
10V 20% SMD Resistor array 33
8-terminal 4-resistor SMD
Panasonic ECJ−2FB1A225K
Samtec TSW−102−07−L−S
KOA Speer RN732ALTD3011B25
Panasonic ECS−H1AX475R
KOA Speer RN732ALTD4121B25
Bourns 3224W−1−502E
Samtec TSM−105−01−T−DV−P
KOA Speer RN732ALTD9091B25
Bourns 2NBS16−TJ1−103
Panasonic ERJ−6GEYJ103V
Bourns Inc 3224W−1−103E
Panasonic ECJ−2FF1A106Z
Panasonic ECJ−3YB1C106M
Panasonic ECJ−4YF1H106Z
Kemet T494B106M010AS
KOA Speer RN732ALTD1212B25
BC Components 0805N220J500NT
Panasonic ECJ−3YB0J226M
Kemet T494A226M010AS
CTS Corporation 742C083330JTR
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-3
Page 34
EVM Bill of Materials
Qty Part numberVendorDescriptionRef DesValue
1 36.5 K R33 RES 36.5 k 1/10W 1%
1 40−Pin header J2 2 x 20 x 0.1 SMT square
1 40−Pin socket
strip
6 47 µF C63, C69,
4 49.9 R R14, R31,
1 100 R R50 Resistor 100 1/10W 5%
2 100 pF C33, C35 Capacitor ceramic 100 pF
1 130 K R47 Resistor 130 k 1/8W 5%
1 169 K R46 Resistor 169 k 1/10W 1%
4 220 µH L1, L2, L3, L4 Inductor 220 µH 10% SA
1 390 pF C36 Capacitor ceramic 390 pF
17 392 R R6, R7, R8,
1 ADS1605 PWB 6455109 1 U6 16 Bit 5MSPS ADC W FIFO Texas
1 SW1 Switch dip 8 pos half pitch
2 J1, J3 2 x 10 x 0.1 SMT 20-pin
2 P1, P3 2 x 10 x 0.1 SMT square
1 J8 2 x 2 x 0.1 SMT square post
2 NI R15, R16 Resistor 0 1/16W 5%
3 U2, U3, U4 IC dual WDBND op amp
1 X1 Oscillator, 40 MHz Low
1 U1 IC +5 V voltage reference
P2 2 x 20 x 0.1 SMT Samtec SSW−120−22−F−D−VS−K
C74, C77, C74, C77, C92, C96
R32, R42
R9, R10, R12, R13, R17, R21, R22, R23, R25, R26, R27, R28, R29, R30
0805 SMD
post header
Capacitor 47 µF 16 V tantalum TE SMD
Resistor 49.9 1/10W 1% SMD 0603
0603 SMD
50V NP0 0805
0805 SMD
0805 SMD
Type SMD
50V NP0 0805 0805 Resistor 0.1%
tolerance 10 PPM 392 R
SMT
socket strip
post header
header
0402 SMD
8−VSSOP
Jitter
8−SOIC
Panasonic ERJ−6ENF3652V
Samtec TSM−120−01−T−DV
Panasonic ECS−T1CD476R
Yageo America 9T06031A49R9FBHFT
Panasonic ERJ−3GEYJ101V
BC Components 0805N101J500NT
Panasonic ERJ−6GEYJ134V
Panasonic ERJ−6ENF1693V
Panasonic − ECG
BC Components 0805N391J500NT
Holsworthy 279−RN73CA−392R
Instruments ITT Industries TDA08H0SK1
Samtec SSW−110−22−F−D−VS−K
Samtec TSM−110−01−T−DV−P
Samtec TSM−102−01−T−DV
Panasonic − ECG
Texas Instruments
Vapley Fisher Corporation
Texas Instruments
ELJ−SA221KF
ADS1605IPAPT
ERJ−2GE0R00X
OPA2822U
VF3 SH−40
REF02BU
5-4
Page 35
EVM Bill of Materials
Qty Part numberVendorDescriptionRef DesValue
1 J7 2−pole screw terminal
2 J5, J6 Right angle SMA connector Johnson
1 D1 Red LED, SMT 1206 Chicago
2 U10, U15 IC single inverter gate
1 U5 IC SGL 2 IN pos−or gate
2 U7, U9 IC SGL 2 IN ex−or gate
1 U11 IC quad 2 IN pos−or gate
1 U8 IC dual edg−trg dtyp f−f
3 U12, U13,
U14
1 SW2 Switch LT touch 6 x 3.5
2 AIN, TP1,
TP2, TP3, TP4, VREF
2 AGND Turret terminal test point Cambion 180−7337−02−05
IO_GND IO_GND IO_GND IO_GND
1 U16 Silicon Transistor NPN Infineon SMBT3906INCT−ND
3,5 mm pitch black
SOT23−5
SOT23−5
SOT23−5
14 TSSOP
14 TSSOP Octal Buffers/Drivers with
3−state outputs
240 GF SMD SMT Test Point Keystone
On Shore Technology
Components Inc.
Miniature Lamp Co.
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Panasonic EVQ−PJU04K
Electronics
ED−555−2−BK
142−0701−301
CMD15−21VRC/TR8
SN74AHC1G04DBVR
SN74AHC1G32DBVR
SN74AHC1G86DBVR
SN74AHC32PWR
SN74AHC74PWR
SN74AHC541PWR
5015
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-5
Page 36
EVM Bill of Materials
32
0.1 µF
C12, C14 C15, C38
Capacitor 0.1 µF 25V ceramic X7R 0603
Panasonic
ECJ−1VB1E104K
C15, C38 C44, C46
ceramic X7R 0603
C44, C46 C49, C50
C49, C50
C57, C65
C67, C70
C73, C75
C76, C78
C80, C81
C89, C93 C102, C103
C104, C105
C106, C107
C108, C112
Table 5−2.ADS1606 Bill of Materials
Qty Value Ref Des Description Vendor Part number
5 0.001 µF C6, C9, C16,
C17, C66
4 0.01 µF C1, C22, C28,
C58
6 0.01 µF C8, C10, C21,
C23, C25, C64
4 0.1 µF C39, C40,
C41, C53
1 0.01 µF C56 Capacitor 0.01 µF 25 V
C57, C65 C67, C70 C73, C75 C76, C78 C80, C81 C89, C93 C95, C97 C98, C100
Capacitor ceramic 1000 pF 5% 50 V NP0 0603
Capacitor 10000 pF 50 V ceramic X7R 0603
Capacitor 10000 pF 200 V ceramic X7R 0805
Capacitor 0.1 µF 10 V ceramic X5R 0402
ceramic X7R 0402
AVX Corporation 06035A102JAT2A
Kemet C0603C103J5RACTU
Panasonic ECJ−2YB2D103K
Panasonic ECJ−0EB1A104K
Panasonic ECJ−0EB1E103K
5 0 R R5, R11, R34,
R35, R40
2 1 K R38, R39 Resistor 1.00 k 1/10W 1%
10 1 µF C45, C47,
C51, C52, C79, C86, C87, C90, C94, C101
15 1 µF C5, C7, C20,
C24, C32, C24, C32, C34, C37, C61, C62, C88, C91, C99, C109, C110, C111
1 1 µF C54 Capacitor 1 µF 50 V
1 2.2 R R44 Resistor 2.2 1/4W 5%
1 2.2 µF C3 CAP ceramic 2.2 µF 10V
1 W6 2 Position jumper _ 0.1”
Resistor 0 1/16W 5% 0402 SMD
0805 SMD Capacitor 1.0 µF 16 V
ceramic X5R 0603
Capacitor 1 µF 16 V ceramic 0805 X5R
ceramic X5R 1210
1206
X5R 0805
spacing
Panasonic − ECG
Panasonic ERJ−6ENF1001V
Panasonic ECJ−1VB1C105K
Panasonic ECJ−2FB1C105K
Panasonic ECJ−4YB1H105K
Panasonic ERJ−8GEYJ2R2V
Panasonic ECJ−2FB1A225K
Samtec TSW−102−07−L−S
ERJ−2GE0R00X
5-6
Page 37
EVM Bill of Materials
Qty Part numberVendorDescriptionRef DesValue
2 3.01 K R2, R19 SMD thin film chip resistor
10 W1, W2, W3,
W4, W5, W7, W8, W9, W10, W11
3 4.7 µF C42, C48,
C85
2 4.12K R3, R18 Thin film chip resistor, 0805
2 5K RV1, RV3 Trimpot 5 k 4 MM top adj
1 J4 2 x 5 x 0.1 SMT square post
1 P4 5 x 2 x 0.1 SMT connector Samtec SSW−105−22−F−D−VS−K 1 9.09 K R1 0805 SMD thin film chip
1 10 K RP6 Resnet 16 POS ISOLAT
7 10 K R4, R20, R36
R43, R45, R48, R49
1 10 K RV2 Trimpot 10 k 4 MM top adj
9 10 µF C11, C18,
C27, C30, C59, C60, C71, C72, C84
4 10 µF C2, C4, C29 Capacitor 10 µF 16 V
1 10 µF C55 Capacitor 10 µF 50 V
1 10 µF C43 Capacitor tantalum 10 µF 10
1 12.1K R24 0805 SMD thin film chip
2 22 pF C13, C19 Capacitor ceramic 22 PF
3 22 µF C26, C82,
C83
1 22 µF C68 Capacitor tantalum 22 µF
5 33 R RP1, RP2,
RP3, RP4, RP5
1 36.5 K R33 RES 36.5 k 1/10W 1%
1 40−Pin header J2 2 x 20 x 0.1 SMT square
0805 3.01 K 0.1% 25 PPM 3-position jumper Samtec TSW−103−07−L−S
Capacitor 4.7 µF/10 V TEH SER SMD
4.12 K 0.1% 25 PPM
SMD
header
resistor 9.09K 0.1% 25PPM
10 k SOIC RES 10 k 1/8W 5% 0805
SMD
SMD Capacitor 10 µF 10 V
ceramic F 0805
ceramic X5R 1206
ceramic F 1210
V 20% SMT
resistor 12.1K 0.1% 25 PPM
50 V NP0 0805 Capaciator 22 µF 6.3 V
ceramic X5R 1206
10V 20% SMD Resistor array 33
8-terminal 4-resistor SMD
0805 SMD
post header
KOA Speer RN732ALTD3011B25
Panasonic ECS−H1AX475R
KOA Speer RN732ALTD4121B25
Bourns 3224W−1−502E
Samtec TSM−105−01−T−DV−P
KOA Speer RN732ALTD9091B25
Bourns 2NBS16−TJ1−103
Panasonic ERJ−6GEYJ103V
Bourns Inc 3224W−1−103E
Panasonic ECJ−2FF1A106Z
Panasonic ECJ−3YB1C106M
Panasonic ECJ−4YF1H106Z
Kemet T494B106M010AS
KOA Speer RN732ALTD1212B25
BC Components 0805N220J500NT
Panasonic ECJ−3YB0J226M
Kemet T494A226M010AS
CTS Corporation 742C083330JTR
Panasonic ERJ−6ENF3652V
Samtec TSM−120−01−T−DV
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-7
Page 38
EVM Bill of Materials
Qty Part numberVendorDescriptionRef DesValue
1 40−Pin socket
strip
6 47 µF C63, C69,
4 49.9 R R14, R31,
1 100 R R50 Resistor 100 1/10W 5%
2 100 pF C33, C35 Capacitor ceramic 100 pF
1 130 K R47 Resistor 130 k 1/8W 5%
1 169 K R46 Resistor 169 k 1/10W 1%
4 220 µH L1, L2, L3, L4 Inductor 220 µH 10% SA
1 390 pF C36 Capacitor ceramic 390 pF
17 392 R R6, R7, R8,
1 ADS1606 PWB 6455109 1 U6 16 Bit 5MSPS ADC W FIFO Texas
1 SW1 Switch dip 8 pos half pitch
2 J1, J3 2 x 10 x 0.1 SMT 20-pin
2 P1, P3 2 x 10 x 0.1 SMT square
1 J8 2 x 2 x 0.1 SMT square post
2 NI R15, R16 Resistor 0 1/16W 5%
3 U2, U3, U4 IC dual WDBND op amp
1 X1 Oscillator, 40 MHz Low
1 U1 IC +5 V voltage reference
1 J7 2−pole screw terminal
2 J5, J6 Right angle SMA connector Johnson
P2 2 x 20 x 0.1 SMT Samtec SSW−120−22−F−D−VS−K
C74, C77, C74, C77, C92, C96
R32, R42
R9, R10, R12, R13, R17, R21, R22, R23, R25, R26, R27, R28, R29, R30
Capacitor 47 µF 16 V tantalum TE SMD
Resistor 49.9 1/10W 1% SMD 0603
0603 SMD
50V NP0 0805
0805 SMD
0805 SMD
Type SMD
50V NP0 0805 0805 Resistor 0.1%
tolerance 10 PPM 392 R
SMT
socket strip
post header
header
0402 SMD
8−VSSOP
Jitter
8−SOIC
3,5 mm pitch black
Panasonic ECS−T1CD476R
Yageo America 9T06031A49R9FBHFT
Panasonic ERJ−3GEYJ101V
BC Components 0805N101J500NT
Panasonic ERJ−6GEYJ134V
Panasonic ERJ−6ENF1693V
Panasonic − ECG
BC Components 0805N391J500NT
Holsworthy 279−RN73CA−392R
Instruments ITT Industries TDA08H0SK1
Samtec SSW−110−22−F−D−VS−K
Samtec TSM−110−01−T−DV−P
Samtec TSM−102−01−T−DV
Panasonic − ECG
Texas Instruments
Vapley Fisher Corporation
Texas Instruments
On Shore Technology
Components Inc.
ELJ−SA221KF
ADS1606IPAPT
ERJ−2GE0R00X
OPA2822U
VF3 SH−40
REF02BU
ED−555−2−BK
142−0701−301
5-8
Page 39
EVM Bill of Materials
Qty Part numberVendorDescriptionRef DesValue
1 D1 Red LED, SMT 1206 Chicago
2 U10, U15 IC single inverter gate
1 U5 IC SGL 2 IN pos−or gate
2 U7, U9 IC SGL 2 IN ex−or gate
1 U11 IC quad 2 IN pos−or gate
1 U8 IC dual edg−trg dtyp f−f
3 U12, U13,
U14
1 SW2 Switch LT touch 6 x 3.5
2 AIN, TP1,
TP2, TP3, TP4, VREF
2 AGND Turret terminal test point Cambion 180−7337−02−05
IO_GND IO_GND IO_GND IO_GND
1 U16 Silicon Transistor NPN Infineon SMBT3906INCT−ND
SOT23−5
SOT23−5
SOT23−5
14 TSSOP
14 TSSOP Octal Buffers/Drivers with
3−state outputs
240 GF SMD SMT Test Point Keystone
Miniature Lamp Co.
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Texas Instruments
Panasonic EVQ−PJU04K
Electronics
CMD15−21VRC/TR8
SN74AHC1G04DBVR
SN74AHC1G32DBVR
SN74AHC1G86DBVR
SN74AHC32PWR
SN74AHC74PWR
SN74AHC541PWR
5015
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-9
Page 40
ADS1605/06 EVM Layout Details
5.2 ADS1605/06 EVM Layout Details
Figure 5−1.Top Tracking Layer
5-10
Page 41
Figure 5−2.Internal Power and Ground Layers
ADS1605/06 EVM Layout Details
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-11
Page 42
ADS1605/06 EVM Layout Details
Figure 5−3.Bottom Tracking Layer
5-12
Page 43
5.3 ADS1605/06 EVM Schematics
The schematics shown on the following pages.
ADS1605/06 EVM Schematics
EVM BOM, ADS1605/06 EVM Layouts and Schematics
5-13
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Block Diagram.Sch
DOCUMENTCONTROL #
1 3 5 7 9 11 13
17 19
2 4 6
8 10 12 14 16 18 20
15
J3/P3
HEADER 10 X 2
AIN
AIN_N
AINN
VCM
AINP
Analog Input
EXT_CLK
AINP
AINN
B00 B01 B02 B03 B04
B15
B05 B06 B07 B08 B09 B10 B11 B12 B13 B14
VREFN
VMID
VREFP
B_OTR
B_DRDY
DRATE
REFEN*
RD*
BDSEL*
RESET*
PD*
SEL_FIFO(0) SEL_FIFO(1) SEL_FIFO(2)
CLK
ADS1605_CS*
ADS1605_06
+12v
VCM
VMID
VREFN
VREFP
Voltage Reference
D09
D08
D11
D10
D12 D13
D15
D14
B00 B01 B02 B03 B04 B05 B06 B07 B08 B09 B10 B11 B12 B13 B14 B15
B_OTR
B_DRDY
OTR
DRDY
D00 D01 D02 D03 D04 D05 D06 D07
Data bus buffers
REFEN*
PD*
RESET*
BDSEL*
RD*
SEL_FIFO(2)
SEL_FIFO(1)
SEL_FIFO(0)
DRATE
CLK
ADS1605_CS*
Interface (2 of 2)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
J2/P2
40-PIN HEADER
Power
1
2 3 4 5
J5
IO_GND
IO_GND
1
2
J7
DRDY OTR
HOST_A2 HOST_A3
DRDY_OUT
HOST_RD*
HOST_CSa* HOST_WR*
Interface (1 of 2)
IO_GND
1 3 5 7 9 11 13
17 19
2 4 6
8 10 12 14 16 18 20
15
J1 / P1
W3
W4
W2
VCOM
REF­REF+
REF-
REF+
VCOM
R16
NI
R15
NI
AGND
AGND
R5
0R
R11
0R
ADS1605 / 06 Block Diagram Joe Purvis Joe Purvis
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DOCUMENTCONTROL #
3
2
1
8
4
U4A
OPA2822U
6 5
7
U4B
OPA2822U
C13
22pF
C15
0.1uF
+6V
C64
.01uF
-6V
C14
0.1uF
C19
22pF
AINP
AINN
C36
390pF
R38 1K
R39 1K
+
C68 22uF
C65
0.1uF
VCM
R31
49.9R
R32
49.9R
C35
100pF
C33
100pF
AIN
R12 392
R17 392
R22 392
R13 392
R28
392
AIN
1
2 3 4 5
J6
C11
10uF
C18
10uF
R14
49.9R
W1
W5
AIN
AIN_N
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
C25
.01uF
ADS1605 / 06 Analog Input Joe Purvis Joe Purvis
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ADS1605_06.Sch
DOCUMENTCONTROL #
MOD_AGND
VREFP
VREFN
R42
49.9R
AINN AINP
MOD_AVDD
REFEN*
R33
36.5K
PD*
RESET*
ADS1605_CS*
RD*
1 8 2 7 3 6 4 5
RP5
33R
1 8 2 7 3 6 4 5
RP4
33R
1 8 2 7 3 6 4 5
RP3
33R
1 8 2 7 3 6 4 5
RP2
33R
1 8 2 7 3 6 4 5
RP1
33R
B00
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
SEL_FIFO(0)
B_DRDY
B_OTR
SEL_FIFO(1)
SEL_FIFO(2)
DVDD3.0V
DVDD3.0V
IO_GND
VMID
IOVDD
IO_GND
AVDD
EXT_CLK
W7
CLK
4
2
3
1
X1
R48 10K
C80
0.1uF
C90
1uF
C78
0.1uF
C79
1uF
C81
0.1uF
C86
1uF
C89
0.1uF
C87
1uF
AVDD
AVDD
AVDD
C95
0.1uF C94
1uF
DVDD3.0V
C44
0.1uF C45
1uF
OTR
DRDY
OTR
DRDY
C46
0.1uF
C47
1uF
C49
0.1uF
C51
1uF
C50
0.1uF
C52
1uF
C72
10uF
C76
0.1uF
C84
10uF
C73
0.1uF
C67
0.1uF
C75
0.1uF
C38
0.1uF
L4 220uH
R44
2.2R
C98
0.1uF
C26 22uF
C82
22uF
C83 22uF
C71
10uF
IO_GND
IO_GND
IOVDD
IOVDD
C101 1uF
IO_GND
DGND DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
1
AVDD
2
AGND
3
AINN
4
AINP
5
AGND
6
AVDD
7
RBIAS
8
AGND
9
AVDD
10
AGND
11
AVDD
12
REFEN
13
NC
14
4 / 8* DRATE
15
NC
16
PD17DVDD18DGND19RESET20CS21RD22OTR23DRDY24DGND25DVDD26NC27NC28DOUT[00]29DOUT[01]30DOUT[02]31DOUT[03]
32
DOUT[04]
33
DOUT[05]
34
DOUT[06]
35
DOUT[07]
36
DOUT[08]
37
DOUT[09]
38
DOUT[10]
39
DOUT[11]
40
DOUT[13]
41
DOUT[14]
42
DOUT[15]
43
DOUT[16]
44
FIFO_LEV[0]
46
FIFO_LEV[1]
47
FIFO_[LEV2]
48
N/C49N/C
50
N/C
45
DGND51DVDD
52
IOVDD
53
DGND54AGND
55
CLK
56
AGND57AVDD
58
VCAP
59
VREFN60VREFN
61
VMID
62
VREFP63VREFP
64
U6
ADS1605 / 06
DRATE
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DOCUMENTCONTROL #
VIN
2
GND
4
OUT
6
TRIM
5
TEMP
3
N/C
1
N/C7N/C
8
U1
REF02
C3
2.2uF
C54
1uF
C57
0.1uF
C56
0.01uF
C12
0.1uF
R3
4.12K
R4 10K
RV1 5K
RV3 5K
R1
9.09K
R2
3.01K
R18
4.12K
R6 392
R8 392
C62
1uF
C58
.01uF
C20
1uF
R7 392
+6V
-6V
C5
1uF
C29 10uF
R21 392
R9 392
C9
.001uF
C24
1uF
R10 392
+6V
-6V
R23 392
R29 392
VREFP
VREFN
C60 10uF
6 5
7
U3B
OPA2822U
6 5
7
U2B
OPA2822U
R24
12.1K
R19
3.01K
R25
392
R30
392
TO ANALOG INPUT CIRCUIT
VMID
3
2
1
8
4
U3A
OPA2822U
3
2
1
8
4
U2A
OPA2822U
RV2 10K
VCM
W6
+12v
C61
1uF
C59 10uF
C34
1uF
C30 10uF
C32
1uF
C27 10uF
C4 10uF
C7
1uF
C16
.001uF
R26 392
C1
.01uF
C28
.01uF
C22
.01uF
C6
.001uF
C17
.001uF
R27
392
C55
10uF
C31
10uF
C2
10uF
R20 10K
VREF
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
C23 .01uF
C21
.01uF
C8
.01uF
C10 .01uF
ADS1605 / 06 Voltage Reference Joe Purvis Joe Purvis
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DOCUMENTCONTROL #
C111 1uF
B_OTR
B_DRDY
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND10Y8
11
Y7
12
Y6
13
Y5
14
Y4
15
Y3
16
Y2
17
Y1
18
OE2
19
VCC
20
U12
SN74AHC541
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND10Y8
11
Y7
12
Y6
13
Y5
14
Y4
15
Y3
16
Y2
17
Y1
18
OE2
19
VCC
20
U13
SN74AHC541
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND10Y8
11
Y7
12
Y6
13
Y5
14
Y4
15
Y3
16
Y2
17
Y1
18
OE2
19
VCC
20
U14
SN74AHC541
D08
D09
D10
D11
D12
D13
D14
D15
OTR
DRDY
D06
D07
D04
D05
D02
D03
D00
D01
C108
0.1uF
C107
0.1uF
C110 1uF
C109 1uF
C106
0.1uF
IO_GND
IO_GND
IO_GND
IO_GND
IO_GND
IO_GND
IOVDD
IOVDD
IOVDD
B00
ADS1605 / 06 Data Bus Buffers Joe Purvis Joe Purvis
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DOCUMENTCONTROL #
HOST_A2
REFEN* PD*
RESET*
ADDR_VALID*
RD*
SEL_FIFO(2)
SEL_FIFO(1)
SEL_FIFO(0)
HOST_RD*
HOST_A3
R43 10K
R45 10K
IO_GND
12 34
J8
IO_GND
1 16
2 15
3 14
4 13
5
9
12
6
8
10
11
7
RP6 10K
W10
HOST_CSa*
R36 10K
CLK
HOST_WR*
2 4
A Y
U10A
SN74AHC1G04
W9
SW2
R47
130K
C104
0.1uF
R46
169K
IO_GND
HOST_WR*
OTR
DRDY
DRDY_OUT
GND
3
Vcc
5
U9B
SN74AHC1G86
GND
3
Vcc
5
U7B
SN74AHC1G86
C100
0.1uF
C103
0.1uF
1 2
4
A B
Y
U9A
SN74AHC1G86
1 2
4
A B
Y
U7A
SN74AHC1G86
IOVDD
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
16
16
14
14
12
12
10
10
8
8
6
6
4
4
2
2
SW1
DIP_SWITCH_8POS
HOST_CSa*
ADDR_VALID*
ADDR_VALID*
GND
3
Vcc
5
U10B
SN74AHC1G04
C97
0.1uF
9
10
8
A B
Y
U11C
SN74AHC32
4 5
6
A B
Y
U11B
SN74AHC32
12
13
11
A B
Y
U11D
SN74AHC32
GND
7
VCC
14
U11E
SN74AHC32
IO_GND IO_GND IO_GND
C105
0.1uF
IO_GND
GND
3
Vcc
5
U5B
SN74AHC1G32
C102
0.1uF
IO_GND
IOVDD IOVDD
IOVDD
IOVDD
IOVDD IOVDD IOVDDIOVDD IOVDD
1 2
4
A B
Y
U5A
SN74AHC1G32
C93
0.1uF
IO_GND
IOVDD
1 2
3
A B
Y
U11A
SN74AHC32
ADS1605_CS*
2 4
A Y
U15A
SN74AHC1G04
GND
3
Vcc
5
U15B
SN74AHC1G04
C112
0.1uF
IO_GND
IOVDD
W11
PRE
10
CLK
11
D
12
CLR
13
Q
9
Q
8
U8B
SN74AHC74
PRE
4
CLK
3
D
2
CLR
1
Q
5
Q
6
U8A
SN74AHC74
VCC
14
GND
7
U8C
SN74AHC74
TP2
TP1
TP3
B
1
C
3
E
2
U16
D1
R50
100R
IOVDD
IO_GND
R49 10K
IOVDD
TP4
DRATE
ADS1605 / 06 Digital Interface Joe Purvis Joe Purvis
6455110 A
6 7
Page 50
1 2 3 4 5 6
A
B
C
D
654321
D
C
B
A
ti
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Title:
SHEET: OF:
FILE: SIZE:DATE:
REV:
17-Nov-2003
Drawn By:
Engineer:
Revision History
REV ECN Number Approved
Power.Sch
DOCUMENTCONTROL #
DVDD3.0V
+
C43
10uF
C88
1uF
+
C92
47uF
IOVDD
+
C48
4.7uF
C99
1uF
+
C96
47uF
IO_GND
C40
0.1uF
+
C69
47uF
+
C63
47uF
C70
0.1uF
-6V
+6V
+VA
L2 220uH
L1 220uH
W8
+5VD
-VA
12345678910
J4/P4
+VA
-VA
+5VD
IO_GND1
R35 0R
DGND
IO_GND
MOD_AGND
R40 0R
AGND1
AVDD
DVDD3.0V
L3 220uH
MOD_AVDD
IO_GND
IO_GND
AGND
AGND
C66 .001uF
C53
0.1uF
AGND
+
C42
4.7uF
C91
1uF
+
C74
47uF
C39
0.1uF
+
C85
4.7uF
C37
1uF
+
C77
47uF
C41
0.1uF
MOD_AGND
AGND
R34 0R
ADS1605 / 06 Power Joe Purvis Joe Purvis
6455110 A
7 7
Page 51
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