TEXAS INSTRUMENTS ADS1286 Technical data

®

ADS1286

ADS1286

ADS1286

12-Bit Micro Power Sampling

ANALOG-TO-DIGITAL CONVERTER

FEATURES

● SERIAL INTERFACE

● GUARANTEED NO MISSING CODES

● 20kHz SAMPLING RATE

● LOW SUPPLY CURRENT: 250µA

APPLICATIONS

● REMOTE DATA ACQUISITION

● ISOLATED DATA ACQUISITION

● TRANSDUCER INTERFACE

● BATTERY OPERATED SYSTEMS

SAR

DESCRIPTION

The ADS1286 is a 12-bit, 20kHz analog-to-digital
converter with a differential input and sample and hold
amplifier and consumes only 250µA of supply cur­rent. The ADS1286 offers an SPI and SSI compatible
serial interface for communications over a two or three
wire interface. The combination of a serial two wire
interface and micropower consumption makes the
ADS1286 ideal for remote applications and for those
requiring isolation.

The ADS1286 is available in a 8-pin plastic mini DIP
and a 8-lead SOIC.

Control

SBAS053

V

REF

D

+In

–In

S/H Amp

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: [phone]

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: [phone] • Immediate Product Info: [phone]

©

1996 Burr-Brown Corporation PDS-1335B Printed in U.S.A. October, 1998

CDAC

Comparator

Serial

Interface

OUT

DCLOCK

CS/SHDN

SPECIFICATIONS

At TA = T

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
ANALOG INPUT

Full-Scale Input Range +In – (–In) 0 V
Absolute Input Voltage +In –0.2 V

Capacitance 25 ✻✻pF
Leakage Current ±1 ✻✻µA

SYSTEM PERFORMANCE

Resolution 12 ✻✻Bits
No Missing Codes 12 ✻✻Bits
Integral Linearity ±1 ±2 ✻✻ ±0.5 ±1 LSB
Differential Linearity ±0.5 ±1.0 ✻ ±0.75 ±0.25 ±0.75 LSB
Offset Error 0.75 ±3 ✻✻ ✻✻LSB
Gain Error ±2 ±8 ✻✻ ✻✻LSB
Noise 50 ✻✻µVrms
Power Supply Rejection 82 ✻✻dB

SAMPLING DYNAMICS

Conversion Time 12 ✻✻
Acquisition Time 1.5 ✻✻
Small Signal Bandwidth 500 ✻✻kHz

DYNAMIC CHARACTERISTICS

Total Harmonic Distortion V

SINAD V
Spurious Free Dynamic Range V

REFERENCE INPUT

REF Input Range 1.25 2.5
Input Resistance CS = V

Current Drain CS = V

DIGITAL INPUT/OUTPUT

Logic Family CMOS ✻✻

Logic Levels:
V
V
V
V

Data Format Straight Binary ✻✻

POWER SUPPLY REQUIREMENTS

Power Supply Voltage

V

CC

Quiescent Current, V

Power Down CS = V

TEMPERATURE RANGE

Specified Performance ADS1286, K, L 0 +70 ✻✻✻✻°C

✻ Specifications same as grade to the left.

to T

MIN

, +VCC = +5V, V

MAX

= +5V, f

REF

SAMPLE

= 12.5kHz, , f

CLK

= 16 • f

, unless otherwise specified.

SAMPLE

ADS1286, ADS1286A ADS1286K, ADS1286B ADS1286C, ADS1286L

REF

+0.2 ✻✻✻✻V

–In –0.2 +0.2 ✻✻✻✻V

CC

✻✻✻✻V

Clk Cycles
Clk Cycles

= 5.0Vp-p at 1kHz –85 ✻✻dB

IN

V

= 5.0Vp-p at 5kHz –83 ✻✻dB

IN

= 5.0Vp-p at 1kHz 72 ✻✻dB

IN

= 5.0Vp-p at 1kHz 90 ✻✻dB

IN

VCC+0.05V

CS = GND, f

t

≥ 640 µs, f

CYC

t

= 80µs, f

CYC

IH
IL
OH
OL

CC

= 0Hz 5000 ✻✻MΩ

CLK

CC

≤ 25kHz

CLK

= 200kHz

CLK

IIH = +5µA3 +VCC✻✻✻✻V

IIL = +5µA 0.0 0.8 ✻✻✻✻V
IOH = 250µA3 +VCC✻✻✻✻V
IOL = 250µA 0.0 0.4 ✻✻✻✻V

5000 ✻✻MΩ

0.01

2.4

2.4

2.5
20
20

✻✻✻✻✻✻V

✻✻ ✻✻µA
✻✻ ✻✻µA
✻✻ ✻✻µA

+4.50 5 5.25 ✻✻✻✻✻✻V

ANA

≥ 640µS, f

CYC

t

= 90µS, f

CYC

≤ 25kHz

CLK

= 200kHz

CLK

CC

200 400 ✻✻ ✻✻µA
250 500 ✻✻ ✻✻µA

3 ✻✻µA

t

ADS1286A, B, C –40 +85 ✻✻✻✻°C

TIMING CHARACTERISTICS

f

= 200kHz, TA = T

CLK

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

t

SMPL

t

SMPL (MAX)

t

CONV

t

dDO

t

dis

t

en

t

hDO

t

f

t

r

t

CSD

t

SUCS

to T

MAX

.

MIN

Analog Input Sample Time See Operating Sequence 1.5 2.0 Clk Cycles

Maximum Sampling Frequency ADS1286 20 kHz

Conversion Time See Operating Sequence 12 Clk Cycles

Delay TIme, DCLOCK↓ to D

Delay TIme, CS↑ to D

Delay TIme, DCLOCK↓ to D

Output Data Remains Valid After DCLOCK↓ C

D

Fall Time See Test Circuits 70 100 ns

OUT

D

Rise Time See Test Circuits 60 100 ns

OUT

Data Valid See Test Circuits 85 150 ns

OUT

Hi-Z See Test Circuits 25 50 ns

OUT

Enable See Test Circuits 50 100 ns

OUT

= 100pF 15 30 ns

LOAD

Delay Time, CS↓ to DCLOCK↓ See Operating Sequence 0 ns
Delay Time, CS↓ to DCLOCK↑ See Operating Sequence 30 ns

®

ADS1286

2

ABSOLUTE MAXIMUM RATINGS

+VCC.....................................................................................................+6V

Analog Input....................................................... –0.3V to (+V

Logic Input .........................................................–0.3V to (+V

Case Temperature ......................................................................... +100°C

Junction Temperature .................................................................... +150°C

Storage Temperature..................................................................... +125°C

External Reference Voltage .............................................................. +5.5V

NOTE: (1) Stresses above these ratings may permanently damage the device.

(1)

+ 300mV)

CC

+ 300mV)

CC

ELECTROSTATIC
DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per­formance degradation to complete device failure. Burr­Brown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.

ESD damage can range from subtle performance degrada-

PIN CONFIGURATION

tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet

V

REF

+In
–In

GND

1
2
3
4

8-Pin Mini PDIP

8-Lead SOIC

ADS1286

8
7
6
5

+V

CC

DCLOCK
D

OUT

CS/SHDN

published specifications.

PIN ASSIGNMENTS

PIN NAME DESCRIPTION

1V
2 +In Non Inverting Input.
3 –In Inverting Input. Connect to ground or remote ground sense point.
4 GND Ground.
5 CS/SHDN Chip Select when low, Shutdown Mode when high.
6D

7 DCLOCK Data Clock synchronizes the serial data transfer and determines conversion speed.
8+V

REF

OUT

Reference Input.

The serial output data word is comprised of 12 bits of data. In operation the data is valid on the falling edge of DCLOCK. The
second clock pulse after the falling edge of CS enables the serial output. After one null bit the data is valid for the next 12 edges.

Power Supply.

CC

PACKAGE/ORDERING INFORMATION

PRODUCT LINEARITY RANGE PACKAGE NUMBER

INTEGRAL TEMPERATURE DRAWING

ADS1286P ±20°C to +70°C Plastic DIP 006
ADS1286PK ±20°C to +70°C Plastic DIP 006
ADS1286PL ±10°C to +70°C Plastic DIP 006
ADS1286U ±20°C to +70°C SOIC 182
ADS1286UK ±20°C to +70°C SOIC 182
ADS1286UL ±10°C to +70°C SOIC 182
ADS1286PA ±2 –40°C to +85°C Plastic DIP 006
ADS1286PB ±2 –40°C to +85°C Plastic DIP 006
ADS1286PC ±1 –40°C to +85°C Plastic DIP 006
ADS1286UA ±2 –40°C to +85°C SOIC 182
ADS1286UB ±2 –40°C to +85°C SOIC 182
ADS1286UC ±1 –40°C to +85°C SOIC 182

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix
C of Burr-Brown IC Data Book.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

PACKAGE

(1)

®

3

ADS1286

TYPICAL PERFORMANCE CURVES

At TA = +25, VCC = +5V, V

= +5V, f

REF

SAMPLE

= 12.5kHz, f

CLK

= 16 • f

, unless otherwise specified.

SAMPLE

2.5

2.0

1.5

1.0

Reference Current (µA)

0.5

0

5

4.5
4

3.5
3

2.5
2

1.5

Change in Offset (LSB)

1

0.5
0

REFERENCE CURRENT vs SAMPLE RATE

024681012

Sample Rate (kHz)

CHANGE IN OFFSET vs REFERENCE VOLTAGE

12345

Reference Voltage (V)

4.0

3.5

3.0

2.5

2.0

Reference Current (µA)

1.5

1.0

0.6

0.4

0.2

0

–0.2

Delta from 25°C (LSB)

–0.4

–0.6

REFERENCE CURRENT vs TEMPERATURE

–55 –40 –25 0 25 70 85

Temperature (°C)

CHANGE IN OFFSET vs TEMPERATURE

–55 –40 –25 0 25 70 85

Temperature (°C)

CHANGE IN INTEGRAL LINEARITY AND DIFFERENTIAL

0.10

0.05

0.00

–0.05

–0.10

–0.15

Delta from +5V Reference (LSB)

–0.20

12345

LINEARITY vs REFERENCE VOLTAGE

Change in Differential

Linearity (LSB)

Change in Integral

Linearity (LSB)

Reference Voltage (V)

®

ADS1286

CHANGE IN GAIN vs REFERENCE VOLTAGE

4

3.5
3

2.5
2

1.5
1

Change in Gain (LSB)

0.5
0

12345

Reference Voltage (V)

4

DIFFERENTIAL LINEARITY ERROR vs CODE

3.0

2.0

1.0

0

–1.0

–2.0

–3.0

Differential Linearity Error (LSB)

0 2048 4095

Code

TYPICAL PERFORMANCE CURVES (CONT)

TOTAL HARMONIC DISTORTION vs FREQUENCY

0
–10
–20
–30
–40
–50
–60
–70
–80
–90

–100

Total Harmonic Distortion (dB)

0.1 1 10
Frequency (kHz)

At TA = +25, VCC = +5V, V

12

11.75

11.5

11.25
11

10.75

10.5

Effective Number of Bits (rms)

10.25
10

0.1 1 10

= +5V, f

REF

EFFECTIVE NUMBER OF BITS

vs REFERENCE VOLTAGE

Reference Voltage (V)

SAMPLE

= 12.5kHz, f

CLK

= 16 • f

, unless otherwise specified.

SAMPLE

SIGNAL-TO-(NOISE + DISTORTION)

100

90
80
70
60
50
40
30
20

Signal-to-(Noise + Distortion) (dB)

10

0

0.1 1 10

SIGNAL-TO-(NOISE + DISTORTION) vs INPUT LEVEL

80
70
60
50
40
30
20
10

Signal-to-(Noise + Distortion) (dB)

0

–40 –35 –30 –25 –20 –15 –10 –5 0

vs FREQUENCY

Frequency (kHz)

Input Level (dB)

SPURIOUS FREE DYNAMIC RANGE

100

and Signal-to-Noise Ratio (dB)

Spurious Free Dynamic Range

5

AND SIGNAL-TO-NOISE RATIO vs FREQUENCY

90
80
70
60
50
40
30
20
10

0

0.1 1 10

Spurious Free Dynamic Range

Signal-to-Noise Ratio

Frequency (kHz)

ADS1286

®