Texas Instruments ADS1256EVM-PDK, ADS1256EVM User Manual

SBAU090E–November 2003–Revised November 2018

ADS1256EVM and ADS1256EVM-PDK

User's Guide
The following related documents are available through the Texas Instruments web site at www.ti.com.
Device Literature Number
ADS1256 SBAS288 REF5025 SBOS410
OPA350 SBOS099
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Contents
1 EVM Overview ............................................................................................................... 3
2 Analog Interface.............................................................................................................. 6
3 Digital Interface .............................................................................................................. 7
4 Power Supplies .............................................................................................................. 8
5 Voltage Reference ......................................................................................................... 10
6 Clock Source................................................................................................................ 11
7 EVM Operation ............................................................................................................. 12
8 ADS1256EVM-PDK Kit Operation ....................................................................................... 15
9 Evaluating Performance with the ADCPro Software................................................................... 30
10 Schematics and Layout.................................................................................................... 38
List of Figures
1 ADS1256EVM................................................................................................................ 5
2 GPIO Pins .................................................................................................................... 8
3 Jumper Block................................................................................................................. 9
4 Switch S3.................................................................................................................... 10
5 Switch S4.................................................................................................................... 11
6 Switches S1 and S2 ....................................................................................................... 12
7 ADS1256EVM Default Jumper and Switch Locations................................................................. 14
8 ADS1256EVM-PDK Setup Wizard....................................................................................... 16
9 ADS1256EVM-PDK License Agreement................................................................................ 16
10 ADS1256EVM-PDK Installation in Progress............................................................................ 17
11 ADS1256EVM-PDK Installation Complete.............................................................................. 17
12 MMB0 Initial Configuration ................................................................................................ 18
13 Connecting the ADS1256EVM to the MMB0 ........................................................................... 19
14 MMB0 Powered From AC Adapter....................................................................................... 20
15 MMB0 Configured for Lab Power Supply ............................................................................... 21
16 NI-VISA Driver Installation Wizard, Screen 1........................................................................... 22
17 NI-VISA Driver Installation Wizard, Screen 2........................................................................... 23
18 NI-VISA Driver Installation Wizard, Screen 3........................................................................... 23
19 NI-VISA Driver Installation Wizard, Screen 4........................................................................... 24
20 NI-VISA Driver Verification Using Device Manager.................................................................... 25
21 ADCPro Software Start-up Display Window............................................................................ 25
22 ADS1256EVM-PDK Plug-In Display Window .......................................................................... 26
23 Install New Driver Wizard Screen 1...................................................................................... 27
24 Install New Driver Wizard Screen 2...................................................................................... 27
25 Install New Driver Wizard Screen 3...................................................................................... 28
26 Install New Driver Wizard Screen 4...................................................................................... 28
27 Install New Driver Wizard Screen 5...................................................................................... 29
28 USBStyx Driver Verification Using Device Manager................................................................... 29
29 ADS1256EVM-PDK Plug-In Averages, PGA Gain, and Effective Data Rate Controls ........................... 30
30 MUX Tab .................................................................................................................... 31
31 Clocks Tab .................................................................................................................. 32
32 GPIO Tab ................................................................................................................... 33
33 Power & Ref Tab........................................................................................................... 34
34 Cal Tab ...................................................................................................................... 35
35 EVM Software About Tab ................................................................................................. 36
36 Software Progress Indicator .............................................................................................. 37
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37 ADS1256EVM PCB: Top-Side Image ................................................................................... 39
38 ADS1256EVM PCB: Layer 1 ............................................................................................. 39
39 ADS1256EVM PCB: Layer 2 ............................................................................................. 39
40 ADS1256EVM PCB: Bottom-Side Image ............................................................................... 39
41 Schematic ................................................................................................................... 40
1 J1: Analog Interface Pinout................................................................................................. 6
2 J2: Serial Interface Pins..................................................................................................... 7
3 J5: GPIO Header Pins ...................................................................................................... 8
4 J5 Configuration: Power-Supply Input .................................................................................... 8
5 J4, J9, and J10 Configuration: Power Options ......................................................................... 10
6 Reference Input Select Switch ........................................................................................... 11
7 System Clock Select Switch .............................................................................................. 11
8 AIN0-1 Input Select Switch (S1).......................................................................................... 12
9 AIN2-3 Input Select Switch (S2).......................................................................................... 13
10 Default Jumper Positions.................................................................................................. 14
11 Default Switch Positions................................................................................................... 15
12 ADS1256EVM Bill of Materials .......................................................................................... 38
Trademarks
ADCPro is a trademark of Texas Instruments. Microsoft, Windows are registered trademarks of Microsoft Corporation. I2C is a trademark of NXP Semiconductors. NI-VISA is a trademark of National Instruments. All other trademarks are the property of their respective owners.
EVM Overview
List of Tables

1 EVM Overview

The ADS1256EVM is an evaluation fixture for the ADS1256 24-bit delta-sigma ADC.

1.1 Features

ADS1256EVM Features:
Contains all support circuitry needed for the ADS1256
Voltage reference options: off-board reference, or buffered REF5025 with high or low common-mode voltage
Compatible with the TI Modular EVM System
ADS1256EVM-PDK Features:
Easy-to-use evaluation software for Microsoft®Windows
Data collection to ASCII text files
Built-in analysis tools including scope, FFT, and histogram displays
Complete control of board settings
Easily expandable with new analysis plug-in tools from Texas Instruments
For use with a computer, the ADS1256EVM-PDK is available. This kit combines the ADS1256EVM board with the DSP-based MMB0 motherboard, and includes ADCPro™ software for evaluation.
The MMB0 motherboard allows the ADS1256EVM to be connected to the computer via an available USB port. This manual shows how to use the MMB0 as part of the ADS1256EVM-PDK, but does not provide technical details on the MMB0 itself.
®
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EVM Overview
ADCPro is a program for collecting, recording, and analyzing data from ADC evaluation boards. It is based on a number of plug-in programs, so it can be expanded easily with new test and data collection plug-ins. The ADS1256EVM-PDK is controlled by a plug-in that runs in ADCPro. For more information about ADCPro, see the ADCPro™ Analog-to-Digital Converter Evalutation Software User's Guide (literature number SBAU128), available for download from the TI website.
This manual covers the operation of both the ADS1256EVM and the ADS1256EVM-PDK. Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with the ADS1256EVM.
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1.2 Introduction

The ADS1256EVM, shown in Figure 1, is an evaluation module built to the TI Modular EVM System specification. It can be connected to any Modular EVM System interface card.
The ADS1256EVM is available as a stand-alone printed circuit board (PCB) or as part of the ADS1256EVM-PDK, which includes an MMB0 motherboard and software. As a stand-alone PCB, the ADS1256EVM is useful for prototyping designs and firmware.
Note that the ADS1256EVM has no microprocessor and cannot run software. To connect it to a computer, some type of interface is required.
If you intend to use the ADS1255 in your application, use the ADS1256EVM for evaluation and test purposes. The ADS1255 is in a smaller package, and lacks inputs AIN2 through AIN7; otherwise, it is identical to the ADS1256.
EVM Overview

1.3 Built-In Accessories

The ADS1256EVM includes a system clock crystal and a low-noise voltage reference. Both are optional; you can select an external system clock and an external reference using slide switches.
The +2.5V reference circuit is based on a REF5025 buffered by an OPA350 and filtered by a large tantalum electrolytic capacitor. While its noise performance is not sufficiently low to allow the ADS1256 to perform at its lowest noise level at all data rates, the circuit can closely approach this limit, and is representative of the kind of reference circuit used in many applications.

1.4 Connectors

The ADS1256 device on the ADS1256EVM is connected through four headers: the analog connector, the serial connector, the power connector, and the GPIO header. This section describes the respective pinouts and locations for the connectors and header.
The analog connector (J1) carries analog I/O. The ADS1256 has a nine-input multiplexer connected through pins 1 through 8 and 10. An optional external differential reference can be connected to pins 18 and 20.
The serial connector (J2) carries the ADS1256 serial digital interface, an optional external system clock signal, and an I2C™ connection to the onboard serial EEPROM.
Figure 1. ADS1256EVM
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EVM Overview
The power connector (J3) carries the power supplies. The ADS1256EVM requires a +5V analog supply and a +1.8V to +3.3V digital supply. The board is designed using a single ground net connected to DGND. An AGND pin is also provided. Power options are routed through J4, J9, and J10.
The GPIO header (J5) provides a connection to the four GPIO pins on the EVM. The ADS1256 uses separate supplies for its analog and digital sections. A jumper is inserted in each
supply line. These jumpers allow the current of each supply to be measured independently.

1.5 Controls

The ADS1256EVM is configured using four slide switches and a jumper. Switches S1 and S2 select the input signal provided to the first four multiplexer inputs on the ADS1256.
Normally you will use the external input, but you can also use the switches to short the inputs together and to connect the reference voltage to the inputs. Additionally, the latter two positions are useful for conducting noise and functional tests.
Switch S3 selects the reference input. One position selects the external reference input pins on the analog connector (J1). The other two positions connect the onboard +2.5V reference in one of two ways: between ground and the reference, or between the reference and the analog supply.
Switch S4 selects the system clock source for the ADS1256. You can select between the onboard
7.68MHz crystal or an external clock.
All switches and their settings are additionally described in later sections of this user guide.

2 Analog Interface

For maximum flexibility, the ADS1256EVM is designed for easy interfacing to multiple analog sources. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual­row, header/socket combination at J1. This header/socket provides access to the analog input pins of the ADS1256. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options.
Most of the pins on J1 are directly connected, with minimal filtering or protection. Use appropriate caution when handling these pins. Table 1 summarizes the pinout for analog interface J1.
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Table 1. J1: Analog Interface Pinout
Pin Number Pin Name
J1.1 AIN0 AN0– Input Analog input 1 (switched by S1) J1.2 AIN1 AN0+ Input Analog input 0 (switched by S1) J1.3 AIN2 AN1– Input Analog input 3 (switched by S1) J1.4 AIN3 AN1+ Input Analog input 2 (switched by S1) J1.5 AIN4 AN2– Input Analog input 4 J1.6 AIN5 AN2+ Input Analog input 5 J1.7 AIN6 AN3– Input Analog input 6
J1.8 AIN7 AN3+ Input Analog input 7 J1.10 AINCOM AN4+ Input Analog input common J1.18 SYSREFN REF– Input Inverting external reference input J1.20 SYSREFP REF+ Input Noninverting external reference
J1.9-J1.19 odd GND AGND Input Signal ground
Standard
Name Direction Function
input
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3 Digital Interface

3.1 Serial Data Interface

The ADS1256EVM is designed to easily interface with multiple control platforms. Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket combination at J2. This header/socket provides access to the digital control and serial data pins of the TSC. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options.
All logic levels on J2 are 3.3V CMOS, except for the I2C pins, which conform to 3.3V I2C rules. Some pins on J2 have weak pullup resistors. These resistors provide default settings for many of the
control pins. Most pins on J2 correspond directly to ADS1256 pins. See the ADS1256 product data sheet for complete details on these pins. Table 2 describes the J2 serial interface pins.
Digital Interface
Table 2. J2: Serial Interface Pins
Pin Number Pin Name
J2.1 CNTL None Unused J2.2 GPIO0 None Unused J2.3 SCLK CLKX Input None Serial clock input J2.4 DGND DGND I/O Power Digital ground J2.5 CLKR None Unused J2.6 GPIO1 None Unused J2.7 CS FSX Input None Chip select (via J8) J2.8 GPIO2 None Unused
J2.9 FSR None Unused J2.10 DGND DGND I/O Power Digital ground J2.11 DIN DX Input None Serial data input J2.12 GPIO3 None Unused J2.13 DOUT DR Input None Serial data output J2.14 RESET GPIO4 Input Yes Reset input (via J7) J2.15 DRDY INT Output None Data ready signal J2.16 SCL SCL I/O None I2C clock line J2.17 EXTCLK TOUT Input None External system clock input J2.18 DGND DGND I/O Power Digital lround J2.19 SYNC/PDW
N
J2.20 SDA SDA I/O None I2C data line
Standard
Name Direction Pulldown Function
GPIO5 Input Yes Synchronization and power
down control pin (via J6)

3.2 GPIO

The ADS1256 has four general-purpose I/O (GPIO) pins. One of these pins can also be configured as a buffered system clock output. This output is typically used to clock additional ADS1255/ADS1256 devices, but can be used for other purposes as well. The GPIO pins for the ADS1256 are shown in Figure 2. These pins (from left to right) are D3 to D0.
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Each pin is connected to the GPIO header through a 100Ω resistor. 100kΩ pull-downs on each pin protect the GPIOs when they are configured as inputs, which is the default setting. The GPIO header, J5, carries the GPIO pins for the ADS1256.
The GPIO header pinout is described in Table 3.
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Figure 2. GPIO Pins
Table 3. J5: GPIO Header Pins
Pin Number Pin Name Function
1 D0 GPIO or buffered system clock
output 2 D1 GPIO 3 D2 GPIO 4 D3 GPIO

4 Power Supplies

J5 is the power-supply input connector. It is used as the primary supply source for the entire EVM. Table 4 lists the configuration details for J2.
Pin No. Pin Name Function Required
J5.1 +VA Positive analog supply, +5V to
J5.2 –VA Negative analog supply, -5V to
J5.3 +5VA Positive analog supply, +5V Always J5.4 –5VA Negative analog supply, -5V No J5.5 DGND Digital ground Optional connection to
J5.6 AGND Analog ground Ground J5.7 +1.8VD Positive digital supply, +1.8V Digital supply; select
J5.8 VD1 Positive digital supply No J5.9 +3.3VD Positive digital supply, +3.3V Digital supply; select
J5.10 +5VD Positive digital supply, +5V No
Table 4. J5 Configuration: Power-Supply Input
No
+18V
No
-18V
AGND through J10
using J9
using J10
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4.1 Power Options

There are six jumpers on the ADS1256EVM, arranged in a single jumper block of seven rows, each of which can be shorted. (In the schematic, J4, J9, and J10 are all combined to make this single block). The pinout of this jumper block is shown in Figure 3.
Power Supplies
Figure 3. Jumper Block
J4 connects AVDD from the +5V from the power-supply header, J3. J4 also connects the DVDD supply to the ADS1256 device. DVDD can be set to 1.8V with J9, or to 3.3V with pins 1 and 2 of J10. Pins 3 and 4, 5 and 6, are used to set the ground of the EVM.
Pinouts and connections can all viewed in the schematic and the layout plots at the end of this user guide.
4.1.1 J4 Pins 1-2: ADS1256 Analog Power Supply
This jumper is used to measure the current of the ADS1256 analog power supply. For normal operation, this jumper should be shorted.
4.1.2 J4 Pins 3-4: ADS1256 Digital Power Supply
Use this jumper to measure the current of the ADS1256 digital power supply. For normal operation, this jumper should be shorted. The voltage of the digital supply is chosen by the jumper on pins 5-6 (1.8V) or 7-8 (3.3V).
4.1.3 J9 Pins 1-2: Select 1.8V Digital Supply Voltage
These pins select 1.8V for the digital supply voltage. If this selection is used, do not populate pins 7-8.
4.1.4 J10 Pins 1-2: Select 3.3V Digital Supply Voltage
These pins select 3.3V for the digital supply voltage. If this selection is used, do not populate pins 5-6.
4.1.5 J10 Pins 3-4: DGND Select
Shorting this jumper connects the ADS1256EVM ground net to DGND.
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Voltage Reference
4.1.6 J10 Pins 5-6: AGND Select
Shorting this jumper connects the ADS1256EVM ground net to AGND. For normal operation, J4.1-2, J4.3­4, and J4.9-10 must be connected (either directly or through an ammeter); either J4.5-6 or J4.7-8 must be connected, and either (or both) of J4.11-12 and J4.13-14 must be connected, as well. Otherwise, the board will not function. Refer to Table 5 for details.
Table 5. J4, J9, and J10 Configuration: Power Options
Row Name Function
1-2 ADC AVDD AVDD supply current measurement point for the
3-4 ADC AVSS AVSS supply current measurement point for the
5-6 1.8V select When shorted, DVDD is sourced from the 1.8V
7-8 3.3V select When shorted, DVDD is sourced from the 3.3V
9-10 ADCDVDD DVDD supply current measurement point for the
11-12 DGND Connects DGND to board ground. 13-14 AGND Connects AGND to board ground.
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ADC. Must be connected for operation.
ADC. Must be connected for operation.
power-supply input pin. Should not be connected at the same time as 7-8.
power-supply input pin. Should not be connected at the same time as 5-6.
ADC. Must be connected for operation.

5 Voltage Reference

The ADS1256EVM has several reference options that can be selected by switch S3. First, there are connections to apply an external reference voltage to the analog input header. The user can apply a reference voltage to J1.18 and J1.20 in order to set the reference.
The ADS1256 also has a buffered REF5025 on board. This 2.5V reference can also be selected by switch S3. VRN to VRP can be set from AGND to 2.5V or from 2.5V to AVDD. Figure 4 illustrates how switch S3 appears on the board. A description of switch S3 is provided in Table 6.
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Figure 4. Switch S3
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Table 6. Reference Input Select Switch
Board Marking Switch Position Input Source VRP Connection VRN Connection
EST Down External J1.20 J1.18
OBH Middle Onboard, high common-
mode
OBL Up Onboard, low common-
mode
AVDD +2.5V
+2.5V AGND
In the EXT position, J1 pins 18 and 20 are connected to the ADS1256 reference input. In the OBH position, the analog power supply is connected to the positive reference input, and the
negative reference input is connected to the output of the onboard reference. In the OBL position, the onboard reference output is connected to the ADS1256 positive reference input
pin, and the negative reference input pin is grounded. Both OBH and OBL provide a +2.5V reference to the ADS1256. The OBL position corresponds to the
standard method to connect a reference to the ADS1256, and should be used for most measurements. The OBH position is useful for testing the reference input common-mode sensitivity, which can be important for ratiometric connections.

6 Clock Source

As shown in Figure 5, switch S4 selects which of the two available clock sources on the ADS1256EVM will be provided to the ADS1256. Table 7 summarizes the positions of the switch.
Clock Source
Table 7. System Clock Select Switch
Board Marking Switch Position Clock Source
XTAL Left Onboard 7.68MHz
EXT Right External (J2 pin 17)
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Figure 5. Switch S4
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EVM Operation

7 EVM Operation

This section provides information on the analog input, digital control, and general operating conditions of the ADS1256EVM.

7.1 Analog Input

The analog input sources can be applied directly to J1 (top or bottom side). Additionally, switches S1 and S2 must be set to route the input signals from J1. Otherwise, the inputs are used to measure the reference or inputs shorted to the reference. Switches S1 and S2 are shown in Figure 6.
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7.1.1 S1: AIN0-1 Input Select
These switches control which lines are routed to the ADS1256 AIN0-AIN1 inputs. Table 8 shows the positions of these switches.
Board Marking Switch Position Input Source AIN0 Connection AIN1 Connection
EXT Left External J1.2 J1.1 REF Middle Reference voltage +2.5V AGND
ZERO Right Zero (shorted to
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ADS1256EVM and ADS1256EVM-PDK
Figure 6. Switches S1 and S2
Table 8. AIN0-1 Input Select Switch (S1)
+2.5V +2.5V
reference)
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In the EXT position, J1 pins 1 and 2 are connected to the ADS1256 AIN1 and AIN0 pins, respectively. In the REF position, the reference is connected across the ADS1256 AIN0 and AIN1 pins. In the ZERO position, both AIN0 and AIN1 are connected to the reference. This configuration gives a zero-scale reading across AIN0 and AIN1.
The REF and ZERO positions are useful for noise tests.
7.1.2 S2: AIN2-3 Input Select
These switches control which lines are routed to the ADS1256 AIN2 through AIN3 inputs. The positions of the switches are described in Table 9.
Board Marking Switch Position Input Source AIN0 Connection AIN1 Connection
EXT Left External J1.4 J1.3 REF Middle Reference voltage +2.5V AGND
ZERO Right Zero (shorted to
In the EXT position, J1 pins 3 and 4 are connected to the ADS1256 AIN3 and AIN2 pins, respectively. In the REF position, the reference is connected across the ADS1256 AIN2 and AIN3 pins. In the ZERO position, both AIN2 and AIN3 are connected to the reference. This configuration gives a zero-scale reading across AIN2 and AIN3.
The REF and ZERO positions are useful for noise tests.
EVM Operation
Table 9. AIN2-3 Input Select Switch (S2)
+2.5V +2.5V
reference)
7.1.3 Input Filtering Capacitors
The ADS1256EVM has pads for filtering capacitors on every input pair and for the reference input. Each input pair has pads for two common-mode capacitors and one differential capacitor.
The ADS1256 has a flexible input multiplexer, so these capacitors do not always function as common­mode and differential signal filters. For example, when measuring a single-ended input, the common-mode capacitors act to filter the signal.
The ADS1256EVM is shipped with only some of the capacitor pads populated. This configuration allows the board to be immediately used to measure both differential and single-ended inputs. As shipped, inputs AIN0 through AIN7 have 10nF differential mode capacitors installed. A differential 1μF capacitor is connected to the reference near the reference pins.
The input filtering capacitors are in relatively large 1210-size packages, in contrast to most of the other passives on the board. These capacitors were designed to be large so that you can easily remove them or replace them with other values. By exercising appropriate care, you can even solder leaded devices to these large pads.

7.2 Digital Control

The digital control signals can be applied directly to J6 (top or bottom side). The modular ADS1256EVM can also be connected directly to a DSP or microcontroller interface board, such as the 5-6K Interface or
HPA-MCU Interface boards available from Texas Instruments, or the MMB0 if purchased as part of the
ADS1256EVM-PDK. For a list of compatible interface and/or accessory boards for the EVM or the ADS1256, see the relevant product folder on the TI web site.

7.3 ADS1256EVM-PDK Power Supply

The analog portion of the ADS1256EVM can either be powered by a 5V source generated via ac adapter, or by applying the +5VA to the connector on the MMB0 board. The MMB0 board will provide the digital 5V and 3.3V to the ADS1256EVM. To provide +5VA to the ADS1256EVM from the MMB0 board, make sure the jumper at J13 (on the MMB0) is closed from +5V to +5VA.
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EVM Operation

7.4 Default Jumper Settings and Switch Positions

Figure 7 shows the jumpers and switches found on the EVM and the respective factory default conditions
for each.
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Figure 7. ADS1256EVM Default Jumper and Switch Locations
The jumpers on J4 provide a convenient way to measure the current for any of the power-supply currents AVDD (analog +V power), DVDD (digital power), AVSS (analog –V power), or the ground connections VGND and DGND. Simply remove the jumper for the appropriate power supply and use a current meter between the jumper pins. The supply voltage for the digital supply (DVDD) can also be selected to be either 1.8V or 3.3V; refer to Table 5.
Table 10 and Table 11 provide a list of jumpers and switches found on the EVM and the respective factory
default conditions for each.
Table 10. Default Jumper Positions
Jumper
J4 1-2 and 3-4 AVDD and DVDD current
J6 2-3 SYNC/PDWN header connection J7 1-2 RESET header connection J8 1-2 CS header connection J9 none +1.8VD connection
J10 1-2, 3-4, and 4-5 +3.3VD, AGND, and DGND
Default
Jumpers Jumper Description
measurement connection
Cconnection
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