The ADS1254 is a precision, wide dynamic range, deltasigma, Analog-to-Digital (A/D) converter with 24-bit resolution. The delta-sigma architecture is used for wide dynamic range and to ensure 24 bits of no missing codes
performance. An effective resolution of 19 bits (1.8ppm of
rms noise) is achieved for conversion rates up to 20kHz.
The ADS1254 is designed for high-resolution measurement
applications in cardiac diagnostics, smart transmitters, industrial process control, weight scales, chromatography, and
portable instrumentation. The converter includes a flexible,
two-wire synchronous serial interface for low-cost isolation.
The ADS1254 is a multi-channel converter and is offered in
an SSOP-20 package.
ADS1254
CH1+
CH1–
CH2+
CH2–
CH3+
CH3–
CH4+
CH4–
CHSEL0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Voltage ................................... GND – 0.3V to V
to AGND ....................................................................... –0.3V to 6V
AV
DD
to AVDD.......................................................................... –6V to +6V
DV
DD
to DGND .......................................................................–0.3V to 6V
DV
DD
Voltage to AGND ............................................. –0.3V to VDD + 0.3V
V
REF
Digital Input Voltage to DGND ................................. –0.3V to V
Digital Output Voltage to DGND .............................. –0.3V to V
Lead Temperature (soldering, 10s).............................................. +300°C
Power Dissipation (any package) ................................................. 500mW
+ 0.3V
DD
+ 0.3V
DD
+ 0.3V
DD
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
ELECTROSTATIC
DISCHARGE SENSITIVITY
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
PACKAGESPECIFIED
PRODUCTPACKAGENUMBERRANGEMARKINGNUMBER
DRAWINGTEMPERATUREPACKAGEORDERINGTRANSPORT
ADS1254ESSOP-20349–40°C to +85°CADS1254EADS1254ERails
(1)
MEDIA
"""""ADS1254E/2K5Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “ADS1254E/2K5” will get a single 2500-piece Tape and Reel.
ELECTRICAL CHARACTERISTICS
All specifications at T
PARAMETERCONDITIONSMINTYPMAXUNITS
ANALOG INPUT
Input Voltage RangeAGND±V
Input ImpedanceCLK = 3,840Hz260MΩ
Input Capacitance6pF
Input LeakageAt +25°C550pA
DYNAMIC CHARACTERISTICS
Data Rate20.8kHz
Bandwidth–3dB4.24kHz
Serial Clock (SCLK)8MHz
System Clock Input (CLK)8MHz
ACCURACY
Integral Non-Linearity
THD1kHz Input; 0.1dB below FS105dB
Noise1.82.7ppm of FSR, rms
Resolution24Bits
No Missing Codes24Bits
Common-Mode Rejection60Hz, AC90102dB
Gain Error0.11% of FSR
Offset Error±30±100ppm of FSR
Gain Sensitivity to V
Power-Supply Rejection Ratio7088dB
PERFORMANCE OVER TEMPERATURE
Offset Drift0.07ppm/°C
Gain Drift0.4ppm/°C
VOLTAGE REFERENCE
V
REF
Load Current32µA
NOTE: (1) Applies to full-differential signals.
MIN
REF
to T
, AVDD = +5V, DVDD = +1.8V. CLK = 8MHz, and V
MAX
CLK = 1MHz1MΩ
CLK = 8MHz125kΩ
At T
(1)
MIN
to T
MAX
= 4.096, unless otherwise specified.
REF
ADS1254E
±0.0002±0.0015% of FSR
1:1
0.54.096V
REF
1nA
DD
V
V
2
ADS1254
SBAS213
ELECTRICAL CHARACTERISTICS (Cont.)
All specifications at T
PARAMETERCONDITIONSMINTYPMAXUNITS
DIGITAL INPUT/OUTPUT
Logic FamilyCMOS
Logic Level: V
V
V
V
Input (SCLK, CLK, CHSEL0, CHSEL1) Hysteresis0.6V
Data Format
POWER-SUPPLY REQUIREMENTS
Power Supply VoltageDV
Quiescent CurrentAV
Operating Power4.36.5mW
Power-Down Current0.41µA
TEMPERATURE RANGE
Operating–40+85°C
Storage–60+100°C
to T
MIN
, AVDD = +5V, DVDD = +1.8V. CLK = 8MHz, and V
MAX
= 4.096, unless otherwise specified.
REF
ADS1254E
IH
IL
OH
OL
IOH = –500µADV
IOL = 500µA0.4V
0.65 • DV
DD
–0.30.35 • DV
–0.4V
DD
DVDD + 0.3V
DD
Offset Binary Two’s Complement
DD
AV
DD
= +5V0.81.15mA
DD
DV
= +1.8V0.20.4mA
DD
1.83.6VDC
4.7555.25VDC
V
PIN CONFIGURATION
Top ViewSSOP-20
CH1+
CH1–
CH2+
CH2–
CH3+
CH3–
AV
CLK
DV
NC
1
2
3
4
5
ADS1254E
6
7
DD
8
9
DD
10
CH4+
20
19
CH4–
V
18
17
AGND
CHSEL0
16
15
CHSEL1
SCLK
14
13
DOUT/DRDY
12
DGND
11
NC
REF
PIN DESCRIPTIONS
PINNAMEPIN DESCRIPTION
1CH1+Analog Input: Positive Input of the Differen-
2CH1–Analog Input: Negative Input of the Differ-
3CH2+Analog Input: Positive Input of the Differen-
4CH2–Analog Input: Negative Input of the Differ-
5CH3+Analog Input: Positive Input of the Differen-
6CH3–Analog Input: Negative Input of the Differ-
7AV
8CLKDigital Input: Device System Clock. The
9DV
10NCNo Connection
DD
DD
11NCNo Connection
12DGNDInput: Digital Ground
13DOUT/DRDYDigital Output: Serial Data Output/Data
14SCLKDigital Input: Serial Clock. The serial clock
15CHSEL1Digital Input: Used to select analog input
16CHSEL0Digital Input: Used to select analog input
17AGNDInput: Analog Ground
18V
19CH4–Analog Input: Negative Input of the Differ-
REF
20CH4+Analog Input: Positive Input of the Differen-
tial Analog Input
ential Analog Input
tial Analog Input
ential Analog Input
tial Analog Input
ential Analog Input
Input: Analog Power Supply Voltage, +5V
system clock is in the form of a CMOScompatible clock. This is a Schmitt-Trigger
input
Input: Digital Power Supply Voltage
Ready. This output indicates that a new
output word is available from the ADS1254
data output register. The serial data is
clocked out of the serial data output shift
register using SCLK.
is in the form of a CMOS-compatible clock.
The serial clock operates independently
from the system clock, therefore, it is possible to run SCLK at a higher frequency
than CLK. The normal state of SCLK is
LOW. Holding SCLK HIGH will either initiate a modulator reset for synchronizing
multiple converters or enter power-down
mode. This is a Schmitt-Trigger input.
channel. This is a Schmitt-Trigger Input
channel. This is a Schmitt-Trigger Input
Analog Input: Reference Voltage Input
ential Analog Input
tial Analog Input
ADS1254
SBAS213
3
TYPICAL CHARACTERISTICS
At TA = +25°C, AVDD = +5V, DVDD = +1.8V, CLK = 8MHz, and V
= 4.096, unless otherwise specified.
REF
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
RMS Noise (ppm of FS)
1.2
1.1
1.0
1001k10k100k
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
RMS Noise (ppm of FS)
0.4
0.2
0.0
–40–20020406080100
RMS NOISE vs DATA OUTPUT RATE
Data Ouput Rate (Hz)
RMS NOISE vs TEMPERATURE
Temperature (°C)
EFFECTIVE RESOLUTION vs DATA OUTPUT RATE
20.0
19.8
19.6
19.4
19.2
19.0
18.8
18.6
Effective Resolution (Bits)
18.4
18.2
18.0
1001k10k100k
Data Ouput Rate (Hz)
20
19.8
19.6
19.4
19.2
19.0
18.8
18.6
18.4
Effective Resolution (Bits)
18.2
18.0
EFFECTIVE RESOLUTION vs TEMPERATURE
–40–20020406080100
Temperature (°C)
10
9
8
7
6
5
4
RMS Noise (µV)
3
2
1
0
0.51.01.52.02.53.03.54.04.55.0
RMS NOISE vs V
Voltage (V)
V
REF
4
REF
Voltage
12
10
8
6
4
RMS Noise (ppm of FS)
2
0
0.51.01.52.02.53.03.54.04.55
RMS NOISE vs V
V
Voltage (V)
REF
REF
Voltage
ADS1254
SBAS213
TYPICAL CHARACTERISTICS (Cont.)
–0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
PSR vs CLK FREQUENCY
Clock Frequency (MHz)
12345678
PSR (dB)
20
18
16
14
12
10
8
6
4
2
0
OFFSET vs TEMPERATURE
Temperature (°C)
–40–20020406080100
DC Offset (ppm of FS)
At TA = +25°C, AVDD = +5V, DVDD = +1.8V, CLK = 8MHz, and V
= 4.096, unless otherwise specified.
REF
2
1.5
1
0.5
RMS Noise (ppm of FS)
0
–5–4–3–2–10 1 23 4 5
INTEGRAL NON-LINEARITY vs DATA OUTPUT RATE
6
5
4
3
RMS NOISE vs INPUT VOLTAGE
Input Voltage (V)
2.5
INTEGRAL NONLINEARITY vs TEMPERATURE
2.0
1.5
1.0
INL (ppm of FS)
0.5
0
–40–20020406080100
Temperature (°C)
2
INL (ppm of FS)
1
0
1001k10k100k
Data Output Rate (Hz)
600
580
560
540
520
Gain Error (ppm of FS)
500
480
–60–40–20020406080100
ADS1254
SBAS213
GAIN ERROR vs TEMPERATURE
Temperature (°C)
5
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, AVDD = +5V, DVDD = +1.8V, CLK = 8MHz, and V
= 4.096, unless otherwise specified.
REF
–50
–60
–70
–80
–90
CMR at 60Hz (dB)
–100
–110
012345678
0.9
0.8
0.7
0.6
0.5
0.4
Current (mA)
0.3
0.2
0.1
0
–40–20020406080100
CMR AT 60Hz vs CLK FREQUENCY
Clock Frequency (MHz)
CURRENT vs TEMPERATURE
AVDD (5V)
DV
Temperature (°C)
DD
(1.8V)
–70
–75
–80
–85
CMR (dB)
–90
–95
–100
–105
101001k10k100k
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
Power Dissipation (mW)
0.5
0
012345768
CMR vs COMMON-MODE FREQUENCY
Common-Mode Signal Frequency (Hz)
POWER DISSIPATION vs CLK FREQUENCY
Analog (5V)
Digital (3.3V)
Digital (1.8V)
Clock Frequency (MHz)
V
CURRENT vs CLK FREQUENCY
35
30
25
20
15
Current (µA)
REF
V
10
5
0
012345678
REF
Clock Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
Relative Magnitude (dB)
–140
–160
01234567891011
(1kHz input at 0.1dB less than full-scale)
6
TYPICAL FFT
Input Signal Frequency (kHz)
ADS1254
SBAS213
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