Texas Instruments ADS1230IPWRG4, ADS1230 Datasheet

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FEATURES DESCRIPTION

APPLICATIONS

DS ADC

REFP REFNCAP DVDD

DGND

GAIN

AINP

AINN

SCLK

SPEED

DRDY/DOUT

PDWN

AVDD

CAP

Internal

Oscillator

CLKIN

Gain=64or128

PGA

AGND

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

20-Bit Analog-to-Digital Converter

For Bridge Sensors

• Complete Front-End for Bridge Sensor

The ADS1230 is a precision 20-bit analog-to-digital
converter (ADC). With an onboard low-noise

• Onboard PGA with Gain of 64 or 128

programmable gain amplifier (PGA), onboard

• Onboard Oscillator

oscillator, and precision 20-bit delta-sigma ADC, the

• RMS Noise:

ADS1230 provides a complete front-end solution for

40nV at 10SPS (G = 128)

bridge sensor applications including weigh scales,

88nV at 80SPS (G = 128)

strain gauges, and pressure sensors.

• 18-Bit Noise-Free Resolution

The low-noise PGA has a gain of 64 or 128,

• Selectable 10SPS or 80SPS Data Rates

supporting a full-scale differential input of ± 39mV or
± 19.5mV, respectively. The delta-sigma ADC has

• Simultaneous 50Hz and 60Hz Rejection at

20-bit effective resolution and is comprised of a

10SPS

3rd-order modulator and 4th-order digital filter. Two

• External Voltage Reference up to 5V for

data rates are supported: 10SPS (with both 50Hz

Ratiometric Measurements

and 60Hz rejection) and 80SPS. The ADS1230 can
be clocked by the internal oscillator or an external

• Simple, Pin-Driven Control

clock source. Offset calibration is performed

• Two-Wire Serial Digital Interface

on-demand, and the ADS1230 can be put in a

• Tiny 16-pin TSSOP Package

low-power standby mode or shut off completely in

• Supply Range: 2.7V to 5.3V

power-down mode.

• –40 ° C to +85 ° C Temperature Range

All of the features of the ADS1230 are controlled by
dedicated pins; there are no digital registers to
program. Data are output over an easily-isolated
serial interface that connects directly to the MSP430

• Weigh Scales

and other microcontrollers.

• Strain Gauges

The ADS1230 is available in a TSSOP-16 package

• Pressure Sensors
and is specified from –40 ° C to +85 ° C.

• Industrial Process Control

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Copyright © 2006–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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ORDERING INFORMATION

ABSOLUTE MAXIMUM RATINGS

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI website at www.ti.com .

over operating free-air temperature range (unless otherwise noted)

(1)

ADS1230 UNIT

AVDD to AGND –0.3 to +6 V
DVDD to DGND –0.3 to +6 V
AGND to DGND –0.3 to +0.3 V

100, Momentary mA

Input Current

10, Continuous mA
Analog Input Voltage to AGND –0.3 to AVDD + 0.3 V
Digital Input Voltage to DGND –0.3 to DVDD + 0.3 V
Maximum Junction Temperature +150 ° C
Operating Temperature Range –40 to +85 ° C
Storage Temperature Range –60 to +150 ° C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.

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ELECTRICAL CHARACTERISTICS

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

All specifications at TA= –40 ° C to +85 ° C, AVDD = DVDD = REFP = +5V, REFN = AGND, and Gain = 64, unless otherwise noted.

ADS1230

PARAMETER CONDITIONS MIN TYP MAX UNIT

Analog Inputs

Full-Scale Input Voltage (AINP – AINN) ± 0.5V

REF

/PGA V
Common-Mode Input Range AGND + 1.5V AVDD – 1.5V V
Differential Input Current ± 2 nA

System Performance

Resolution No Missing Codes 20 Bits

Internal Oscillator, SPEED = High 80 SPS
Internal Oscillator, SPEED = Low 10 SPS

Data Rate

External Oscillator, SPEED = High f

CLK

/61,440 SPS

External Oscillator, SPEED = Low f

CLK

/491,520 SPS

Digital Filter Settling Time Full Settling 4 Conversions

Differential Input, End-Point Fit, G = 64 ± 10 ppm

Integral Nonlinearity (INL)

Differential Input, End-Point Fit, G = 128 ± 6 ppm

Input Offset Error

(1)

± 3 ppm of FS
Input Offset Drift ± 10 nV/ ° C
Gain Error ± 0.8 %
Gain Drift ± 4 ppm/ ° C

Internal Oscillator 80 90 dB

fIN= 50Hz or 60Hz ± 1Hz,

Normal-Mode Rejection

(2)

f

DATA

= 10SPS

External Oscillator

(3)

90 100 dB

Common-Mode Rejection at DC, Δ VDD = 0.1V 110 dB

f

DATA

= 10SPS 53 nV, rms

Input-Referred Noise

f

DATA

= 80SPS 100 nV, rms

Power-Supply Rejection at DC, Δ VDD = 0.1V 90 100 dB

Voltage Reference Input

Voltage Reference Input (V

REF

) V

REF

= REFP – REFN 1.5 AVDD AVDD + 0.1V V
Negative Reference Input (REFN) AGND – 0.1 REFP – 1.5 V
Positive Reference Input (REFP) REFN + 1.5 AVDD + 0.1 V
Voltage Reference Input Current 10 nA

Digital

All digital inputs except CLKIN 0.7 DVDD DVDD + 0.1 V

V

IH

CLKIN 0.7 DVDD 5.1 V

Logic Levels V

IL

DGND 0.2 DVDD V

V

OH

IOH= 1mA DVDD – 0.4 V

V

OL

IOL= 1mA 0.2 DVDD V
Input Leakage 0 < VIN< DVDD ± 10 μ A
External Clock Input Frequency (f

CLKIN

) 0.2 4.9152 6 MHz

Serial Clock Input Frequency (f

SCLK

) 5 MHz

(1) Offset calibration can minimize these errors to the level of noise at any temperature.
(2) Specification is assured by the combination of design and final production test.
(3) External oscillator = 4.9152MHz.

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ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

ELECTRICAL CHARACTERISTICS (continued)

All specifications at TA= –40 ° C to +85 ° C, AVDD = DVDD = REFP = +5V, REFN = AGND, and Gain = 64, unless otherwise noted.

ADS1230

PARAMETER CONDITIONS MIN TYP MAX UNIT

Power Supply

Power-Supply Voltage (AVDD, DVDD) 2.7 5.3 V

Normal Mode, AVDD = 3V 900 1400 μ A

Normal Mode, AVDD = 5V 900 1400 μ A
Analog Supply Current

Standby Mode 0.1 1 μ A

Power-Down 0.1 1 μ A

Normal Mode, DVDD = 3V 60 100 μ A

Normal mode, DVDD = 5V 95 140 μ A
Digital Supply Current Standby Mode, SCLK = High, DVDD = 3V 45 65 μ A

Standby Mode, SCLK = High, DVDD = 5V 65 80 μ A

Power-Down 0.2 μ A

Normal Mode, AVDD = DVDD = 3V 2.9 4.5 mW
Power Dissipation, Total Normal Mode, AVDD = DVDD = 5V 5.0 7.7 mW

Standby Mode, AVDD = DVDD = 5V 0.3 0.4 mW

4

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PIN CONFIGURATION

DVDD

DGND

CLKIN

GAIN

CAP

CAP

AINP

AINN

DRDY/DOUT

SCLK

PDWN

SPEED

AVDD

AGND

REFP

REFN

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

ADS1230

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

PW PACKAGE

TSSOP-16
(Top View)

PIN DESCRIPTIONS

ANALOG/DIGITAL

NAME TERMINAL INPUT/OUTPUT DESCRIPTION

DVDD 1 Digital Digital Power Supply: 2.7V to 5.3V
DGND 2 Digital Digital Ground
CLKIN 3 Digital/Digital Input External Clock Input: typically 4.9152MHz. Tie low to activate internal oscillator.

PGA Gain Select

GAIN PGA

GAIN 4 Digital Input

0 64

1 128
CAP 5 Analog Gain Amp Bypass Capacitor Connection
CAP 6 Analog Gain Amp Bypass Capacitor Connection
AINP 7 Analog Input Positive Analog Input
AINN 8 Analog Input Negative Analog Input
REFN 9 Analog Input Negative Reference Input
REFP 10 Analog Input Positive Reference Input
AGND 11 Analog Analog Ground
AVDD 12 Analog Analog Power Supply, 2.7V to 5.3V

Data Rate Select:

SPEED DATA RATE

SPEED 13 Digital Input

0 10SPS

1 80SPS
PDWN 14 Digital Input Power-Down: Holding this pin low powers down the entire converter and resets the ADC.

Serial Clock: Clock out data on the rising edge. Also used to initiate Offset Calibration and Sleep

SCLK 15 Digital Input modes. See the Offset Calibration , Standby Mode , and Standby Mode with Offset Calibration sections

for more details.
Dual-Purpose Output:

DRDY/DOUT 16 Digital Output Data Ready: Indicates valid data by going low.

Data Output: Outputs data, MSB first, on the first rising edge of SCLK.

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NOISE PERFORMANCE

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

The ADS1230 offers outstanding noise performance. Table 1 summarizes the typical noise performance with
inputs shorted externally for different data rates and voltage reference values.

The RMS and Peak-to-Peak noise are referred to the input. The effective number of bits (ENOB) is defined as:

ENOB = ln (FSR/RMS noise)/ln(2)

The Noise-Free Bits are defined as:

Noise-Free Bits = ln (FSR/Peak-to-Peak Noise)/ln(2)

Where:

FSR (Full-Scale Range) = V

REF

/Gain.

Table 1. Noise Performance for AV

DD

= 5V and V

REF

= 5V

RMS NOISE PEAK-TO-PEAK NOISE

(1)

ENOB

DATA RATE GAIN (nV) (nV) (RMS) NOISE-FREE BITS

64 53 290 20.5 18

10

128 40 198 19.8 17.5

64 100 480 19.5 17.3

80

128 88 480 18.7 16.3

(1) Peak-to-peak data are based on direct measurement.

Table 2. Noise Performance for AV

DD

= 3V and V

REF

= 3V

RMS NOISE PEAK-TO-PEAK NOISE

(1)

ENOB

DATA RATE GAIN (nV) (nV) (RMS) NOISE-FREE BITS

64 46 290 20.6 18

10

128 49 259 19.6 17.2

64 100 576 19.5 17

80

128 102 461 18.5 16.3

(1) Peak-to-peak data are based on direct measurement.

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TYPICAL CHARACTERISTICS

4

3

2

1

0

10008006004002000

OutputCode(LSB)

Time(ReadingNumber)

PGA=64
DataRate=10SPS

3

2

1

0

-1

-2

-3

-4

-5

-6

10008006004002000

OutputCode(LSB)

Time(ReadingNumber)

PGA=64
DataRate=80SPS

900

800

700

600

500

400

300

200

100

0

321

Occurrence

OutputCode(LSB)

PGA=64
DataRate=10SPS

400

350

300

250

200

150

100

50

0

1 2-5 -4 -3 -2 -1 0

Occurrence

OutputCode(LSB)

PGA=64
DataRate=80SPS

0

-1

-2

-3

-4

-5

-6

10008006004002000

OutputCode(LSB)

Time(ReadingNumber)

PGA=128
DataRate=10SPS

8

6

4

2

0

-2

-4

-6

-8

-10

10008006004002000

OutputCode(LSB)

Time(ReadingNumber)

PGA=128
DataRate=80SPS

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

At TA= +25 ° C, AVDD = DVDD = REFP = 5V, and REFN = AGND, unless otherwise noted.

NOISE PLOT NOISE PLOT

Figure 1. Figure 2.

NOISE HISTOGRAM NOISE HISTOGRAM

Figure 3. Figure 4.

NOISE PLOT NOISE PLOT

Figure 5. Figure 6.

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500

450

400

350

300

250

200

150

100

50

0

-5 -4 -3 -2 -1 0

Occurrence

OutputCode(LSB)

PGA=128
DataRate=10SPS

250

200

150

100

50

0

-7 -5-6 -4 -3 -2 -1 0 1 2 43 5 6 7

Occurrence

OutputCode(LSB)

PGA=128
DataRate=80SPS

1000

800

600

400

200

0

-200

-400

-600

-800

1007550250-25-50

Offset(nV)

Temperature( C)°

PGA=64
DataRate=10SPS

-0.02

-0.03

-0.04

-0.05

-0.06

1007550250-25-50

GainError(%)

Temperature( C)°

PGA=64
DataRate=10SPS

50

45

40

35

30

25

20

15

10

5

0

40-10 0 10 20 30-40 -30 -20

RMSNoise(nV)

V (mV)

IN

PGA=64
DataRate=10SPS

120

100

80

60

40

40-10 0 10 20 30-40 -30 -20

RMSNoise(nV)

V (mV)

IN

PGA=64
DataRate=80SPS

ADS1230

SBAS366A – OCTOBER 2006 – REVISED JULY 2007

TYPICAL CHARACTERISTICS (continued)

At TA= +25 ° C, AVDD = DVDD = REFP = 5V, and REFN = AGND, unless otherwise noted.

NOISE HISTOGRAM NOISE HISTOGRAM

Figure 7. Figure 8.

OFFSET vs TEMPERATURE GAIN ERROR vs TEMPERATURE

Figure 9. Figure 10.

NOISE vs INPUT SIGNAL NOISE vs INPUT SIGNAL

Figure 11. Figure 12.

8

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