Internal 2.5V
Reference
RC Oscillator
20MHz
Interface
Circuit
MDATA
IADJ
IOUT
AVDD
ADS1208
REFOUT
REFIN
V
IN+
V
IN
−
MDATA
BVDD
MCLK
M0
M1
MCLK
Buffer
Buffer
Buffer
Buffer
2nd−Order
∆Σ
Modulator
BGNDAGND
AVDD
查询ADS1208供应商查询ADS1208供应商
SBAS348A – MARCH 2005 – REVISED MARCH 2005
2nd-Order Delta-Sigma Modulator
with Excitation for Hall Elements
FEATURES DESCRIPTION
• ±100mV Specified Input Range
• ±125mV Full-Scale Range
• 95dB typ. CMR, 82dB typ. SNR
• Adjustable Current Output for Sensor Biasing
• Digital Output Compatible to ADS1202/03 programmable current source for sensor biasing and
• Differential Digital Outputs
• Separate 2.7V to 5.5V Digital Supply Pin
APPLICATIONS
• Motor Control
• Current Measurement
• Hall Sensors
• Bridge Sensors
• Instrumentation
The ADS1208 is a 2nd-order ∆ Σ (delta-sigma) modulator operating at a 10MHz clock rate. The specified
input range is ±100mV, optimized for current
measurement with a Hall sensor, especially in motor
control applications. The ADS1208 contains a
has integrated input buffers for fast settling of the
sample capacitors; it also requires only a minimum of
external components. The differential analog input
offers low noise and excellent common-mode rejection.
ADS1208
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
Package/Ordering Information
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at www.ti.com .
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Supply voltage, AGND to AV
Supply voltage, BGND to BV
Analog input voltage with respect to AGND AGND – 0.3 to AV
Reference input voltage with respect to AGND AGND – 0.3 to AV
Digital input voltage with respect to BGND BGND – 0.3 to BV
Ground voltage difference AGND to BGND ±0.3 V
Input current to any pin except supply ±10 mA
Power dissipation See Dissipation Ratings Table
Operating virtual junction temperature range, T
Operating free-air temperature range, T
Storage temperature range, T
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DD
DD
J
A
STG
(1)
ADS1208I UNIT
–0.3 to +6 V
–0.3 to +6 V
+ 0.3 V
DD
+ 0.3 V
DD
+ 0.3 V
DD
–40 to +150 °C
–40 to +85 °C
–65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
PARAMETER MIN NOM MAX UNIT
Supply voltage, AGND to AV
Supply voltage, BGND to BV
DD
Low-voltage levels 2.7 3.6 V
DD
5V logic levels 4.5 5.0 5.5 V
4.5 5.0 5.5 V
Reference input voltage 0.5 2.5 3.0 V
Analog inputs V
– V
IN+
IN-
–V
/20 +V
REFIN
REFIN
/20 V
DISSIPATION RATINGS TABLE
BOARD PACKAGE R
(1)
Low-K
(2)
High-K
PW 35°C/W 147°C/W 6.8mW/°C 850mW 544mW 442mW
PW 33.6°C/W 108.4°C 9.225W/°C 1150mW 738mW 600mW
θ JC
R
(1) The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
DERATING FACTOR TA≤ 25°C TA= 70°C TA= 85°C
θ JA
ABOVE TA= 25°C POWER RATING POWER RATING POWER RATING
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range at –40°C to +85°C, AV
Mode 3, MCLK input = 20MHz, differential input voltage = 200mV
, common-mode voltage = 1.4V, and 16-bit Sinc
PP
OSR = 256, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP
Resolution 16 Bits
DC Accuracy
Integral nonlinearity
Integral nonlinearity –0.012 0.0025 0.012 %
Differential nonlinearity
Input offset
(4)
Input offset drift 2.0 8.0 µV/°C
Gain error
(4)
Gain error drift Referenced to voltage at REFIN 15 ppm/°C
Power-supply rejection ratio 66 dB
Analog Input
Full-scale range V
Operating common-mode signal 0.8 1.4 2.5 V
Input capacitance 5.0 pF
Common-mode rejection 95 dB
Current Source (IOUT)
Output current
Voltage at IOUT pin V
Voltage between AVDD pin and IADJ V
Internal Voltage Reference
Reference output voltage REFOUT 2.45 2.5 2.55 V
Reference temperature drift 20 ppm/°C
Output resistance 0.3 Ω
Output source current 3.0 mA
Power-supply rejection ratio 60 dB
Startup time 0.1 ms
Voltage Reference Input
Reference voltage input REFIN 0.5 3.0 V
Reference input capacitance 5 pF
Reference input current -50 +50 nA
Internal Clock for Modes 0, 1 and 2
Clock frequency 8.0 10.1 12.0 MHz
External Clock for Mode 3
Clock frequency 1.0 24.0 MHz
(1) All values are at TA= 25°C.
(2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer
curve for V
(200mV).
(3) Ensured by design.
(4) Maximum values, including temperature drift, are ensured over the full specified temperature range.
(5) It is possible to leave pin IOUT unconnected (I
(2)
(3)
16-bit resolution –8 1.6 8 LSB
16-bit resolution –1.0 1.0 LSB
Referenced to voltage at REFIN –1.25 –0.7 1.25 %
– V
IN+
IN–
(5)
ADJ
– V
IN+
= –100mV to +100mV, expressed either as the number of LSBs or as a percent of the measured input range
IN–
= 0mA).
OUT
I
OUT
OUT
at I
= 1mA to 8mA 480 500 520 mV
OUT
= BV
DD
DD
= +5V, V
= internal +2.5V,
REF
ADS1208I
(1)
–2.0 –1.4 0 mV
–125 125 mV
1.0 5.0 8.0 mA
0 AVDD – 1.0 V
3
MAX UNIT
filter with
3
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
ELECTRICAL CHARACTERISTICS (continued)
Over recommended operating free-air temperature range at –40°C to +85°C, AV
Mode 3, MCLK input = 20MHz, differential input voltage = 200mV
, common-mode voltage = 1.4V, and 16-bit Sinc
PP
OSR = 256, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP
AC Accuracy
SNR VIN= 200mV
SINAD VIN= 200mV
THD VIN= 200mV
SFDR VIN= 200mV
Digital Inputs
(6)
Logic family CMOS
V
High-level input voltage 0.7 x BV
IH
V
Low-level input voltage –0.3 0.3 x BV
IL
I
Input current VIN= BV
IN
C
Input capacitance 5 pF
I
Digital Outputs
(6)
Logic family CMOS
V
High-level output voltage BV
OH
V
Low-level output voltage BV
OL
C
Load capacitance 30 pF
L
= 4.5V, IOH= –100µA 4.44 V
DD
= 4.5V, IOL= +100µA 0.5 V
DD
Data format Bit stream
Digital Inputs
(7)
Logic family LVCMOS
V
High-level input voltage BV
IH
V
Low-level input voltage BV
IL
I
Input current VIN= BV
IN
C
Input capacitance 5 pF
I
Digital Outputs
(7)
Logic family LVCMOS
V
High-level output voltage BV
OH
V
Low-level output voltage BV
OL
C
Load capacitance 30 pF
L
= 2.7, IOH= –100µA BV
DD
= 2.7, IOL= +100µA 0.2 V
DD
Data format Bit stream
Power Supply
Analog supply voltage, AV
Digital interface supply voltage, BV
Operating supply current, AI
Operating supply current, AI
Operating supply current, BI
Operating supply current, BI
DD
DD
DD
DD
DD
DD
Modes 0, 1 and 2 11.9 15.0 mA
Modes 0, 1 and 2 2.3 3.0 mA
Power dissipation Modes 0, 1 and 2 71 90 mW
Power dissipation Mode 3 64 82.5 mW
(6) Applicable for 5.0V nominal supply; BV
(7) Applicable for 3.0V nominal supply; BV
(min) = 4.5V and BV
DD
(min) = 2.7V and BV
DD
at 1kHz 80 82 dB
PP
at 1kHz 77 81.5 dB
PP
at 1kHz –91 –80 dB
PP
at 1kHz 80 93 dB
PP
or GND –50 50 nA
DD
= 3.6V 2 BV
DD
= 2.7V –0.3 0.8 V
DD
or GND –50 50 nA
DD
Mode 3 11.5 14.5 mA
Mode 3 1.3 2.0 mA
(max) = 5.5V.
DD
(max) = 3.6V
DD
= BV
DD
DD
= +5V, V
= internal +2.5V,
REF
ADS1208I
(1)
DD
– 0.2 V
DD
BV
DD
DD
4.5 5.0 5.5 V
2.7 5 5.5 V
MAX UNIT
+ 0.3 V
DD
+ 0.3 V
3
filter with
V
4
MCLK
MDATA
t
C1
t
W1
t
D1
MCLK
MDATA
t
C2
t
W2
t
D2
t
D3
PARAMETER MEASUREMENT INFORMATION
Figure 1. Mode 0 Operation
TIMING CHARACTERISTICS: MODE 0
Over recommended operating free-air temperature range at –40°C to +85°C, and AV
otherwise noted.
PARAMETER MIN MAX UNIT
t
C1
t
W1
t
D1
Clock period 83 125 ns
Clock high time (tC1/2) – 5 (tC1/2) + 5 ns
Data delay after rising edge of clock –2 +2 ns
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
= +5V, BV
DD
= +2.7 to +5.5V, unless
DD
Figure 2. Mode 1 Operation
TIMING CHARACTERISTICS: MODE 1
Over recommended operating free-air temperature range at –40°C to +85°C, and AV
otherwise noted.
PARAMETER MIN MAX UNIT
t
C1
t
W2
t
D2
t
D3
Clock period 166 250 ns
Clock high time (tC2/2) – 5 (tC2/2) + 5 ns
Data delay after rising edge of clock (t
Data delay after falling edge of clock (t
= +5V, BV
DD
/2) – 2 (t
W2
/2) – 2 (t
W2
DD
/2) + 2 ns
W2
/2) + 2 ns
W2
= +2.7 to +5.5V, unless
5
Internal
MCLK
Internal
MDATA
MDATA
t
C1
t
W 1
1 0 1 1 0 0
MDAT
MCLK
t
C4
t
W 4
t
D4
MCLK
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
Figure 3. Mode 2 Operation
TIMING CHARACTERISTICS: MODE 2
Over recommended operating free-air temperature range at –40°C to +85°C, and AV
otherwise noted.
PARAMETER MIN MAX UNIT
t
C1
t
W1
Clock period 83 125 ns
Clock high time (tC1/2) – 5 (tC1/2) + 5 ns
= +5V, BV
DD
= +2.7 to +5.5V, unless
DD
note: MCLK is system clock input. MCLK is modulator clock output. Modulator clock frequency is half of system clock
frequency.
Figure 4. Mode 3 Operation
TIMING CHARACTERISTICS: MODE 3
Over recommended operating free-air temperature range at –40°C to +85°C, and AV
otherwise noted.
PARAMETER MIN MAX UNIT
t
C4
t
W4
t
D4
t
R
t
F
6
Clock period 41 1000 ns
Clock high time 10 tC4– 10 ns
Data and output clock delay after falling edge of input clock 0 10 ns
Rise time of clock (10% to 90% of BV
Fall time of clock (90% to 10% of BV
) 0 10 ns
DD
) 0 10 ns
DD
= +5V, BV
DD
DD
= +2.7 to +5.5V, unless
DEVICE INFORMATION
1
2
3
4
16
15
14
13
BVDD
BGND
MCLK
MCLK
12
11
10
9
MDATA
MDATA
M0
M1
ADS1208
(TOP VIEW)
IOUT
IADJ
AVDD
V
IN+
V
IN−
AGND
REFIN
REFOUT
5
6
7
8
16-LEAD TSSOP PACKAGE
Table 1. TERMINAL FUNCTIONS
PIN
NO. NAME
1 IOUT Current output for sensor
2 IADJ Output current adjustment
3 AVDD Analog supply
4 V
5 V
IN+
IN–
6 AGND Analog ground
7 REFIN Reference input
8 REFOUT Reference output
9 M1 Mode selection input
10 M0 Mode selection input
11 MDATA Inverted data output
12 MDATA Noninverted data output
13 MCLK Inverted clock output (Modes 0, 1); Clock input (Mode 3)
14 MCLK Noninverted clock output
15 BGND Digital interface ground
16 BVDD Digital interface supply (2.7V to 5.5V)
DESCRIPTION
Positive input
Negative input
ADS1208
SBAS348A – MARCH 2005 – REVISED MARCH 2005
7