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ADS1100
Technical data
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Technical data
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TEXAS INSTRUMENTS ADS1100 Technical data

∆Σ A/D
Converter
I2C
Interface
Clock
Oscillator
V
IN+
V
IN–
SCL
SDA
V
DD
GND
A = 1, 2, 4, or 8
PGA
AD0
SBAS239B – MAY 2002 – REVISED NOVEMBER 2003
Self-Calibrating, 16-Bit
ANALOG-TO-DIGITAL CONVERTER
ADS1100

FEATURES

● COMPLETE DATA ACQUISITION SYSTEM IN A
TINY SOT23-6 PACKAGE
● 16-BITS NO MISSING CODES
● INL: 0.0125% of FSR MAX
● CONTINUOUS SELF-CALIBRATION
● SINGLE-CYCLE CONVERSION
● PROGRAMMABLE GAIN AMPLIFIER
GAIN = 1, 2, 4, OR 8
● LOW NOISE: 4
µVp-p
● PROGRAMMABLE DATA RATE: 8SPS to 128SPS
● INTERNAL SYSTEM CLOCK
● I2CTM INTERFACE
● POWER SUPPLY: 2.7V to 5.5V
● LOW CURRENT CONSUMPTION: 90µA
● AVAILABLE IN EIGHT DIFFERENT ADDRESSES

APPLICATIONS

● PORTABLE INSTRUMENTATION
● INDUSTRIAL PROCESS CONTROL
● SMART TRANSMITTERS
● CONSUMER GOODS
● FACTORY AUTOMATION
● TEMPERATURE MEASUREMENT
I2C is a registered trademark of Philips Incorporated.

DESCRIPTION

The ADS1100 is a precision, continuously self-calibrating Analog-to-Digital (A/D) converter with differential inputs and up to 16 bits of resolution in a small SOT23-6 package. Conversions are performed ratiometrically, using the power supply as the reference voltage. The ADS1100 uses an
2
I
C-compatible serial interface and operates from a single
power supply ranging from 2.7V to 5.5V. The ADS1100 can perform conversions at rates of 8, 16, 32,
or 128 samples per second. The onboard Programmable Gain Amplifier (PGA), which offers gains of up to 8, allows smaller signals to be measured with high resolution. In single-conversion mode, the ADS1100 automatically powers down after a conversion, greatly reducing current consump­tion during idle periods.
The ADS1100 is designed for applications requiring high­resolution measurement, where space and power consump­tion are major considerations. Typical applications include portable instrumentation, industrial process control, and smart transmitters.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2002-2003, Texas Instruments Incorporated
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ABSOLUTE MAXIMUM RATINGS

VDD to GND ........................................................................... –0.3V to +6V
Input Current ............................................................... 100mA, Momentary
Input Current .................................................................10mA, Continuous
, V
Voltage to GND, V
Voltage to GND, SDA, SCL .....................................................–0.5V to 6V
Maximum Junction Temperature ................................................... +150°C
Operating Temperature .................................................. –40°C to +125°C
Storage Temperature...................................................... –60°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
.......................................................... –0.3V to V
IN+
IN–
DD
+ 0.3V
ESD damage can range from subtle performance degrada­tion to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its
ELECTROSTATIC DISCHARGE SENSITIVITY
published specifications.

PACKAGE/ORDERING INFORMATION

PRODUCT I
ADS1100 1001 000 SOT23-6 DBV –40°C to +85°C AD0 ADS1100A0IDBVT Tape and Reel, 250
2
C ADDRESS PACKAGE-LEAD DESIGNATOR
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
"" " " " "ADS1100A0IDBVR Tape and Reel, 3000
ADS1100 1001 001 SOT23-6 DBV –40°C to +85°C AD1 ADS1100A1IDBVT Tape and Reel, 250
"" " " " "ADS1100A1IDBVR Tape and Reel, 3000
ADS1100 1001 010 SOT23-6 DBV –40°C to +85°C AD2 ADS1100A2IDBVT Tape and Reel, 250
"" " " " "ADS1100A2IDBVR Tape and Reel, 3000
ADS1100 1001 011 SOT23-6 DBV –40°C to +85°C AD3 ADS1100A3IDBVT Tape and Reel, 250
"" " " " "ADS1100A3IDBVR Tape and Reel, 3000
ADS1100 1001 100 SOT23-6 DBV –40°C to +85°C AD4 ADS1100A4IDBVT Tape and Reel, 250
"" " " " "ADS1100A4IDBVR Tape and Reel, 3000
ADS1100 1001 101 SOT23-6 DBV –40°C to +85°C AD5 ADS1100A5IDBVT Tape and Reel, 250
"" " " " "ADS1100A5IDBVR Tape and Reel, 3000
ADS1100 1001 110 SOT23-6 DBV –40°C to +85°C AD6 ADS1100A6IDBVT Tape and Reel, 250
"" " " " "ADS1100A6IDBVR Tape and Reel, 3000
ADS1100 1001 111 SOT23-6 DBV –40°C to +85°C AD7 ADS1100A7IDBVT Tape and Reel, 250
"" " " " "ADS1100A7IDBVR Tape and Reel, 3000
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
(1)
SPECIFIED
RANGE MARKING NUMBER MEDIA, QUANTITY

PIN CONFIGURATION

Top View SOT23
V
IN–VDD
654
SDA
AD0
123
GND SCL
V
IN+
NOTE: Marking text direction indicates pin 1. Marking text depends on I2C address; see ordering table. Marking for I
2
C address 1001000 shown.
2
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ADS1100
SBAS239B

ELECTRICAL CHARACTERISTICS

All specifications at –40°C to +85°C, VDD = 5V, GND = 0V, and all PGAs, unless otherwise noted.
ADS1100
PARAMETER CONDITIONS MIN TYP MAX UNITS ANALOG INPUT
Full-Scale Input Voltage (V Analog Input Voltage V Differential Input Impedance 2.4/PGA MΩ Common-Mode Input Impedance 8MΩ
SYSTEM PERFORMANCE
Resolution and No Missing Codes DR = 00 12 12 Bits
Conversion Rate DR = 00 104 128 184 SPS
Output Noise See Typical Characteristic Curves Integral Nonlinearity DR = 11, PGA = 1, End Point Fit Offset Error ±2.5/PGA ±5/PGA mV Offset Drift PGA = 1 1.5 8 µV/°C
Gain Error 0.01 0.1 % Gain Error Drift 2 ppm/°C Common-Mode Rejection At DC, PGA = 8 94 100 dB
DIGITAL INPUT/OUTPUT
Logic Level
V
IH
V
IL
V
OL
Input Leakage
I
IH
I
IL
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage V Supply Current Power Down 0.05 2 µA
Power Dissipation
NOTES: (1) 99% of full-scale. (2) FSR = Full-Scale Range = 2 • V
) – (V
IN+
, V
IN+
) ±VDD/PGA V
IN–
to GND GND – 0.2 VDD + 0.2 V
IN–
DR = 01 14 14 Bits DR = 10 15 15 Bits DR = 11 16 16 Bits
DR = 01 26 32 46 SPS DR = 10 13 16 23 SPS DR = 11 6.5 8 11.5 SPS
(1)
±0.003 ±0.0125 % of FSR
PGA = 2 1.0 4 µV/°C PGA = 4 0.7 2 µV/°C PGA = 8 0.6 2 µV/°C
At DC, PGA = 1 85 dB
0.7 • V
DD
GND – 0.5 0.3 • V
IOL = 3mA GND 0.4 V
6V
DD
VIH = 5.5V 10 µA VIL = GND –10 µA
DD
2.7 5.5 V
Active Mode 90 150 µA
V
= 5.0V 450 750 µW
DD
V
= 3.0V 210 µW
DD
/PGA.
DD
(2)
V
ADS1100
SBAS239B
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3

TYPICAL CHARACTERISTICS

At TA = 25°C and VDD = 5V, unless otherwise noted.
120
100
(µA)
80
VDD
I
60
40
–60 –40 –20 0 20 40 60 80 100 120 140
2.0
1.0
0.0
SUPPLY CURRENT vs TEMPERATURE
VDD = 5V
VDD = 2.7V
Temperature (°C)
OFFSET ERROR vs TEMPERATURE
VDD = 5V
PGA = 8 PGA = 4 PGA = 2 PGA = 1
SUPPLY CURRENT vs I2C BUS FREQUENCY
25°C
125°C
10 100 1k 10k
VDD = 2.7V
PGA = 8 PGA = 4 PGA = 2 PGA = 1
2
I
C Bus Frequency (kHz)
OFFSET ERROR vs TEMPERATURE
(µA) I
VDD
250 225 200 175 150 125 100
75 50
2.0
1.0
0.0
–40°C
Offset Error (mV)
–1.0
–2.0
–60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C)
0.04 VDD = 5V
0.03
0.02
0.01
0.00
–0.01
Gain Error (%)
–0.02 –0.03 –0.04
–60 –40 –20 0 20 40 60 80 100 120 140
GAIN ERROR vs TEMPERATURE
PGA = 8
Temperature (°C)
PGA = 4
PGA = 1
PGA = 2
Offset Error (mV)
–1.0
–2.0
–60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C)
0.010
0.005
0.000
–0.005
Gain Error (%)
–0.010
–0.015
–0.020
VDD = 2.7V
–60 –40 –20 0 20 40 60 80 100 120 140
GAIN ERROR vs TEMPERATURE
PGA = 4
PGA = 8
PGA = 1
PGA = 2
Temperature (°C)
4
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ADS1100
SBAS239B
TYPICAL CHARACTERISTICS (Cont.)
NOISE vs TEMPERATURE
25
20
15
10
5
Noise (p-p, % of LSB)
–60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C)
Data Rate = 8SPS PGA = 8
At TA = 25°C and VDD = 5V, unless otherwise noted.
0.0
–0.5
–1.0
–1.5
Total Error (mV)
–2.0
–2.5
–100 –75 –50 –25 0 25 50 75 100
0.05 PGA =1
0.04
0.03
0.02
0.01
Integral Nonlinearity (% of FSR)
0.00
–60 –40 –20 0 20 40 60 80 100 120 140
TOTAL ERROR vs INPUT SIGNAL
PGA = 8
PGA = 4
PGA = 2
PGA = 1
Input Signal (% of Full-Scale)
INTEGRAL NONLINEARITY vs TEMPERATURE
VDD = 2.7V
VDD = 3.5V
Temperature (°C)
Data Rate = 8SPS
VDD = 5V
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
Integral Nonlinearity (% of FSR)
0.000
Noise (p-p, % of LSB)
INTEGRAL NONLINEARITY vs SUPPLY VOLTAGE
2.5 3.0 3.5 4.0 4.5 5.0 5.5 (V)
V
DD
20
Data Rate = 8SPS
15
10
5
0
0 20406080100
NOISE vs INPUT SIGNAL
PGA = 8
PGA = 4
PGA = 2
PGA = 1
Input Signal (% of Full-Scale)
PGA = 8 PGA = 4 PGA = 2 PGA = 1
NOISE vs SUPPLY VOLTAGE
30
25
20
15
10
Noise (p-p, % of LSB)
5
Data Rate = 8SPS
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
ADS1100
SBAS239B
PGA = 8
PGA = 4
PGA = 2
PGA = 1
V
(V)
DD
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5
TYPICAL CHARACTERISTICS (Cont.)
At TA = 25°C and VDD = 5V, unless otherwise noted.
10
9
8
Data Rate (SPS)
7
Data Rate = 8SPS
6
–60 –40 –20 0 20 40 60 80 100 120 140
DATA RATE vs TEMPERATURE
VDD = 2.7V
VDD = 5V
Temperature (°C)

THEORY OF OPERATION

The ADS1100 is a fully differential, 16-bit, self-calibrating, delta-sigma A/D converter. Extremely easy to design with and configure, the ADS1100 allows you to obtain precise measurements with a minimum of effort.
The ADS1100 consists of a delta-sigma A/D converter core with adjustable gain, a clock generator, and an I these blocks are described in detail in the sections that follow.

ANALOG-TO-DIGITAL CONVERTER

The ADS1100 A/D converter core consists of a differential switched-capacitor delta-sigma modulator followed by a digital filter. The modulator measures the voltage difference between the positive and negative analog inputs and compares it to a reference voltage, which, in the ADS1100, is the power supply. The digital filter receives a high-speed bitstream from the modulator and outputs a code, which is a number proportional to the input voltage.

OUTPUT CODE CALCULATION

The output code is a scalar value that is (except for clipping) proportional to the voltage difference between the two analog inputs. The output code is confined to a finite range of numbers; this range depends on the number of bits needed to represent the code. The number of bits needed to represent the output code for the ADS1100 depends on the data rate, as shown in Table I.
DATA RATE NUMBER OF BITS MINIMUM CODE MAXIMUM CODE
8SPS 16 –32,768 32,767 16SPS 15 –16,384 16,383 32SPS 14 –8192 8191
128SPS 12 –2048 2047
TABLE I. Minimum and Maximum Codes.
2
C interface. Each of
0
Data Rate = 8SPS
–20
–40
Gain (dB)
–60
–80
–100
0.1 1 10 100 1k
FREQUENCY RESPONSE
Input Frequency (Hz)
For a minimum output code of Min Code, gain setting of PGA, positive and negative input voltages of V and power supply of V
, the output code is given by the
DD
IN+
and V
IN–
expression:
––V
V
(
(
)
IN
Output Code = –1•Min Code•PGA •
+
In the previous expression, it is important to note that the
minimum
output code is used. The ADS1100 outputs codes in
V
DD
)
IN
negated
binary two’s complement format, so the absolute values of the minima and maxima are not the same; the maximum n-bit code
n-1
is 2
– 1, while the minimum n-bit code is –1 • 2
n-1
.
For example, the ideal expression for output codes with a data rate of 16SPS and PGA = 2 is:
V
––V
Output Code = 16384 • 2•
(
(
)
IN
+
)
IN
V
DD
The ADS1100 outputs all codes right-justified and sign­extended. This makes it possible to perform averaging on the higher data rate codes using only a 16-bit accumulator.
See Table II for output codes for various input levels.

SELF-CALIBRATION

The previous expressions for the ADS1100’s output code do not account for the gain and offset errors in the modulator. To compensate for these, the ADS1100 incorporates self-cali­bration circuitry.
The self-calibration system operates continuously, and re­quires no user intervention. No adjustments can be made to the self-calibration system, and none need to be made. The self-calibration system cannot be deactivated.
The offset and gain error figures shown in the Electrical Characteristics include the effects of calibration.
,
6
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ADS1100
SBAS239B
INPUT SIGNAL
DATA RATE NEGATIVE FULL-SCALE –1LSB ZERO +1LSB POSITIVE FULL-SCALE
8SPS 8000 16SPS C000 32SPS E000
128SPS F800
H H H H
FFFF FFFF FFFF FFFF
H H H H
0000 0000 0000 0000
H H H H
0001 0001 0001 0001
H H H H
7FFF 3FFF 1FFF 07FF
TABLE II. Output Codes for Different Input Signals.
H H H H

CLOCK GENERATOR

The ADS1100 features an onboard clock generator, which drives the operation of the modulator and digital filter. The Typical Characteristics show varieties in data rate over supply voltage and temperature.
It is not possible to operate the ADS1100 with an external modulator clock.

INPUT IMPEDANCE

The ADS1100 uses a switched-capacitor input stage. To external circuitry, it looks roughly like a resistance. The resistance value depends on the capacitor values and the rate at which they are switched. The switching frequency is the same as the modulator frequency; the capacitor values depend on the PGA setting. The switching clock is generated by the onboard clock generator, so its frequency, nominally 275kHz, is dependent on supply voltage and temperature.
The common-mode and differential input impedances are different. For a gain setting of PGA, the differential input impedance is typically:
2.4MΩ/PGA The common-mode impedance is typically 8MΩ. The typical value of the input impedance often cannot be
neglected. Unless the input source has a low impedance, the ADS1100’s input impedance may affect the measurement accu­racy. For sources with high output impedance, buffering may be necessary. Bear in mind, however, that active buffers introduce noise, and also introduce offset and gain errors. All of these factors should be considered in high-accuracy applications.
Because the clock generator frequency drifts slightly with temperature, the input impedances will also drift. For many applications, this input impedance drift can be neglected, and the typical impedance values above can be used.
When designing an input filter circuit, remember to take into account the interaction between the filter network and the input impedance of the ADS1100.

USING THE ADS1100

OPERATING MODES

In continuous conversion mode, the ADS1100 continuously performs conversions. Once a conversion has been com­pleted, the ADS1100 places the result in the output register, and immediately begins another conversion. When the ADS1100 is in continuous conversion mode, the ST/BSY bit in the configuration register always reads 1.
In single conversion mode, the ADS1100 waits until the ST/BSY bit in the conversion register is set to 1. When this happens, the ADS1100 powers up and performs a single conversion. After the conversion completes, the ADS1100 places the result in the output register, resets the ST/BSY bit to 0 and powers down. Writing a 1 to ST/BSY while a conversion is in progress has no effect.
When switching from continuous conversion mode to single conversion mode, the ADS1100 will complete the current conversion, reset the ST/BSY bit to 0 and power down.

RESET AND POWER-UP

When the ADS1100 powers up, it automatically performs a reset. As part of the reset, the ADS1100 sets all of the bits in the configuration register to their default setting.
The ADS1100 responds to the I command. When the ADS1100 receives a General Call Reset, it performs an internal reset, exactly as though it had just been powered on.
2
C General Call Reset

ALIASING

If frequencies are input to the ADS1100 that exceed half the data rate, aliasing will occur. To prevent aliasing, the input signal must be bandlimited. Some signals are inherently bandlimited. For example, a thermocouple’s output, which has a limited rate of change, may nevertheless contain noise and interference components. These can fold back into the sampling band just as any other signal can.
The ADS1100’s digital filter provides some attenuation of high-frequency noise, but the filter’s sinc
1
frequency re­sponse cannot completely replace an anti-aliasing filter; some external filtering may still be needed. For many appli­cations, a simple RC filter will suffice.
ADS1100
SBAS239B
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2
I
C INTERFACE
2
The ADS1100 communicates through an I grated Circuit) interface. The I
2
C interface is a 2-wire open-
C (Inter-Inte-
drain interface supporting multiple devices and masters on a single bus. Devices on the I
2
C bus only drive the bus lines LOW, by connecting them to ground; they never drive the bus lines HIGH. Instead, the bus wires are pulled HIGH by pull-up resistors, so the bus wires are HIGH when no device is driving them LOW. This way, two devices cannot conflict; if two devices drive the bus simultaneously, there is no driver contention.
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