The ADC1xD1x00QML products are low-power, high-performance 10b and 12b ADCs with sampling rates
up to 1.6 GSPS as a dual-channel ADC or 3.2 GSPS in a single-channel interleaved mode. These
products come in a hermetic 376 column ceramic grid array package (376 CCGA) for harsh environments,
such as down hole or space.
Caution Hot surface.
Contact may cause burns.
Do not touch.
Overview
1Overview
The ADC1xD1x00 Evaluation Board (ADC1xD1x00CVAL) provides flexible ADC I/O connections for
laboratory performance evaluation. As configured, the board is equipped with support shrouds for 100 pin
Samtec connectors for interface to a logic analyzer, but capable of being configured for other types of
logic analyzer connectors.
Because the 10- and 12-bit Gig ADCs are pin-compatible with one another, this board can be used with
the following parts:
•ADC10D1000QML
•ADC12D1600QML
•ADC12D1620QML
Refer to the individual product data sheets for information on the absolute maximum ratings and
recommend operating conditions.
NOTE: The top surface of the ADC (U1) can reach temperatures above 55°C during normal
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operation. Use caution and avoid touching the top surface of the ADC when it is operating.
Three key requirements for the sampling clock signal generator are low distortion, broad band noise, and
phase noise. Even the highest quality signal generator will also produce harmonics, which the ADC
performance is very sensitive to. Therefore, a bandpass filter, which can be tuned to the desired sampling
clock frequency, will improve the performance of the system. In addition to this, the bandpass filter will
reduce broadband noise and increase the system performance.
The logic analyzer should be able to capture differential LVDS signals at high speed, as determined by the
sampling clock speed and ADC Demux Mode. In general, the Output Data Rate per Bank can be
determined as follows:
For example, the ADC12D16x0 will generate data at the following rates:
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Table 1. Output Data Rate Per Bank by Mode
MODEOUTPUT DATA RATE PER BANK [MSPS]
DES 1:1 Non-DemuxFs/2
DES 1:2 DemuxFs/4
Non-DES 1:1 Non-DemuxFs
Non-DES 1:2 DemuxFs/2
Table 2. ADC12D16x0 Output Data Rate Example
MODEFCLK [MHz]FS [MSPS]
DES 1:1 Non-Demux160032001600
DES 1:2 Demux16003200800
Non-DES 1:1 Non-Demux160016001600
Non-DES 1:2 Demux16001600800
The EVAL board is designed to be used with the Samtec ASP-65067-01 for the logic analyzer probe
connection to the Keysight E5379A Differential Probe Adapter. There is also a footprint for the Keysight
E5405A Pro Series Soft Touch Connectorless Probe, but this option is not recommended, as the signal
integrity is better through the Samtec connector.
2.2Optional Lab Equipment
If the EVAL board is being used in Extended Control Mode (ECM), then it is also necessary to have a
system which can write to the SPI. One option is the Aardvark I2C/SPI Host Adapter and accessories.
The CLK± SMA inputs are connected directly to the ADC; they must be driven AC-coupled and
differentially. Therefore, a set of DC blocks is required at the input. To convert a single-ended signal to
differential, a National Anaren balun board (400 MHz to 3 GHz) may conveniently be used.
The analog inputs may be driven AC-coupled and must be driven differentially. Depending upon the
application, an amplifier or balun board may be used to achieve single-ended to differential conversion.
4Jumper Settings
Most of the jumper pins on the EVAL board are also available for customer use, and are more clearly
explained in the datasheet; some exceptions are the TEST pins as described below. These pins are
related to internal test functions and are not available.
The ADC may be used in either Extended Control Mode (ECM) or Non-ECM, also known as pin-controlmode; this is set by the ECEb pin. In ECM, the ADC modes and settings are written through the Serial
Port Interface. Some control pins remain active in ECM.
PIN (BOARD)PIN (DATASHEET)I/OFUNCTION
TEST_LPN/AN/AInternal test function; do not connect
ECEBECEbInput
TPNTPMInput
NDMNDMInput
TEST_ION/AN/AInternal test function; do not connect
POR_ENN/AN/AInternal test function; do not connect
DCLK_RST+/-DCLK_RST+/-Input
LSPSMLSPSMInputLow sampling power saving mode
DDR_PHDDRPhInputNon-ECM only: DDR Phase select
FSRFSRInput
PDQPDQInput
PDIPDIInput
SCSBSCSbInputSPI: Serial Chip Select bar
SDOSDOOutputSPI: Serial Data Out
SDISDIInputSPI: Serial Data In
SCLKSCLKInputSPI: Serial Clock
TEST_RSV1N/AN/AInternal test function; do not connect
TEST_RSV2N/AN/AInternal test function; do not connect
TDIODETDIODE+/-Output
CALRUNCalRunOutputCalibration Running indication
VBGVBGI/O
TEST_CFN/AN/AInternal test function; do not connect
RCLKRCLK+/-InputAutoSync: Reference Clock Input
RCOUT1RCOut1+/-Output
RCOUT2RCOut2+/-Output
Driving the Clock and Inputs
Table 3. Control Pins and Function
ECM and Non-ECM: Extended
Control Mode Enable bar select
Non-ECM only: Test Pattern Mode
select
ECM and Non-ECM: Non-Demux
Mode select
Differential DCLK Reset DES DES
Input Non-ECM only: DES Mode
select
Non-ECM only: Full-Scale Range
select
ECM and Non-ECM: Power-Down
Q-channel
ECM and Non-ECM: Power-Down I-
channel
Temperature Sensor Diode
terminals
Bandgap Voltage Output / LVDS
Common-mode Voltage select
AutoSync: Reference Clock
Differential Output 1
AutoSync: Reference Clock
Differential Output 2
In Non-ECM, the following control pins are available.
Refer to the individual product data sheets for information about the absolute maximum ratings and
recommend operating conditions.
5.1Power Supply
For flexibility, each of the different ADC power supply pins has been brought out to a red PWR terminal. TI
recommends powering all supply pins from a single power-supply source. The supply voltage to any of the
PWR terminals must not exceed that applied to X-1 PWR (VA). The supply voltage is a nominal 1.9 V and
should not exceed 2 V.
Table 4. Non-ECM Pin Control Settings
Higher LVDS common-mode
voltage
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Lower LVDS common-mode voltage
5.2Power-Up Sequence
The ADC should be powered up in Non-ECM, by putting the ECEB pin high. The ADC does not have a
Power-on-Reset. If the part is started in extended control mode (ECM), by having the ECEB pin low, the
registers will come up in an unknown random state, and the part will be in an unknown operating
condition. If ECM mode is desired, the board can be placed in ECM by moving the ECEB pin low after
power up with the ECEB pin high.
After the board has stabilized, the ADC should be calibrated by flipping the red CAL switch from low
(CALb) to high (CAL). If the switch remains high, the part cannot be recalibrated in ECM. To enable the
part to be recalibrated, in either ECM or with the switch, the CAL switch must be low (CALb). Recalibrate
the part when there has been a major change in operating conditions, such as change in Fclk, or
temperature.
5.3VBG Pin
Some versions of this universal board allow for the option to put the VBG pin low. This not a supported
state, and the VBG pin should not be taken low.
The Aardvark I2C/SPI Host Adapter is a fast and powerful I2C bus and SPI bus host adapter through USB
(see Figure 5). It allows a developer to interface a Linux or Windows PC to a downstream embedded
system environment and transfer serial messages using the I2C and SPI protocols.
Part Number: TP240141
RoHS Compliant: Yes
For more information, visit the manufacturer website at:
Level translation is required due to the different signaling levels (3.3 V for the Aardvark vs. 1.9 V for the
ADC). A level shifter can be obtained from Total Phase or can be built as shown Figure 6.
Using the AARDVARK
Figure 5. Aardvark I2C/SPI Host Adapter
1. Download the Aardvark control GUI software
(a) Go to: http://www.totalphase.com/products/aardvark_i2cspi/ and select the Downloads tab.
(b) Download and install the Control Center Software.
2. Configure and connect the hardware
(a) Put the ADC into Extended Control Mode (ECM) by setting the ECEB jumper to GND.
(b) The I2C/SPI Level Shifter board should have jumpers at TPWR, MASTER, and 1.8 V. (The Gig
ADC runs at 1.9 V, but 1.8 V is appropriately close.)
(c) Connect a USB cable from the PC to the Aardvark
(d) Connect the Aardvark cable to the I2C/SPI Level Shifter board, ADAPTER input
(e) Connect the additionally supplied ribbon cable from the I2C/SPI Level Shifter board, TARGET1 port
to the ribbon cable with split outputs
(f) Connect the split output wires to the ADC EVAL board
(i) SS (white) = SCSb
(ii) MOSI (grey) = SDI
(iii) SCLK (purple) = SCLK iv. GND (black) = GND
3. Configure the Aardvark software
(a) Select Configure Aardvark Adapter
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10
(b) Select anywhere on the row of the available port, select the SPI – GPIO radio button and hit OK
(c) In the Aardvark I2C/SPI Control Center software, select Aardvark → Target Power. On the I2C/SPI
Level Shifter board, both LEDs for TARGET (orange) and POWER (green) should light up.
(a) Type the command (hex) in the MOSI Message window and hit the Send button. For example,
putting the ADC into DESQ Mode:
5. Tips and tricks
(a) During the entire time the ADC is being used in SPI Mode (also known as Extended Control Mode),
the jumper on the EVAL board for ECEB stays connected to GND. Moving the ECEB jumper from
GND to VA back to GND again is a short-cut to reset the SPI registers back to their default values
(b) The Calibration pin is OR’d with the Calibration bit in the SPI internally to the ADC, that is, the pin
remains active when the ADC is in ECM. To calibrate the ADC, it is more convenient to use the
Calibration pin (move the jumper from GND to VA and back to GND) than to write the SPI twice.
The data from the Logic Analyzer has the following (or similar) format:
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Figure 7. Logic Analyzer Data Listing View
When the data is imported into WaveVision, it is necessary to make selections about how the data was
taken so that it can be correctly reconstructed. Some of these selections are: Demux / Non-Demux Mode,
DES / Non-DES Mode, Hexadecimal / Binary / Decimal, Sampling Rate, and Number of Bits. For example,
this data was taken on the I-channel in Demux, Non-DES Mode in the Hexadecimal format.
For Non-DES Mode, the data is ordered {DId, DI} or {DQd, DQ}. For DES Mode, the data is ordered {DQd,
DId, DQ, DI}.
1. To import data, select Channels → Import WaveVision 4 data or a single/double column ASCII data file
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
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3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
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CAUTION
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Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
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FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
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• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
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Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
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3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
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If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
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