Texas Instruments ADC12DJ3200 User Manual

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ADC12DJ3200 Evaluation Module

User's Guide

Literature Number: SLAU701

May 2017

Contents

1 Introduction......................................................................................................................... 4

2 Equipment........................................................................................................................... 6

2.1 Evaluation Board Feature Identification Summary ...................................................................... 6

2.2 Required Equipment......................................................................................................... 7

3 Setup Procedure .................................................................................................................. 8

3.1 Install the High Speed Data Converter (HSDC) Pro Software......................................................... 9

3.2 Install the Configuration GUI Software.................................................................................... 9

3.3 Connect the EVM and TSW14J57EVM................................................................................... 9

3.4 Connect the Power Supplies to the Boards (Power Off) ............................................................... 9

3.5 Connect the Signal Generators to the EVM (*RF Outputs Disabled Until Directed)................................ 9

3.6 Turn On the TSW14J57EVM Power and Connect to the PC ........................................................ 10

3.7 Turn On the ADC12DJ3200EVM Power Supplies and Connect to the PC......................................... 10

3.8 Turn On the Signal Generator RF Outputs ............................................................................. 10

3.9 Open the ADC12DJ3200EVM GUI and Program the ADC and Clocks............................................. 10

3.10 Calibrate the ADC Device on the EVM.................................................................................. 12

3.11 Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM .................................... 13

3.12 Capture Data Using the HSDC Pro Software .......................................................................... 13

4 Device Configuration .......................................................................................................... 16

4.1 Supported JESD204B Device Features................................................................................. 16

4.2 Tab Organization ........................................................................................................... 16

4.3 Low-Level Control.......................................................................................................... 17

5 Troubleshooting the ADC12DJ3200EVM................................................................................ 18

A References ........................................................................................................................ 19

A.1 Technical Reference Documents......................................................................................... 19

A.2 TSW14J57EVM Operation................................................................................................ 19

A.3 TSW14J56EVM Operation................................................................................................ 19

B HSDC Pro Settings for Optional ADC Device Configuration..................................................... 20

B.1 Changing the Number of Frames per Multi-Frame (K)................................................................ 20

B.2 Customizing the EVM for Optional Clocking Support ................................................................. 20

C Signal Routing .................................................................................................................. 23

Contents

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1-1. EVM Orientation ............................................................................................................. 5

2-1. EVM Feature Locations ..................................................................................................... 6

3-1. EVM Test Setup.............................................................................................................. 8

3-2. Configuration GUI EVM Tab.............................................................................................. 11

3-3. Configuration GUI ADC Control .......................................................................................... 12

3-4. High Speed Data Converter Pro (HSDC) GUI.......................................................................... 14

3-5. Additional Device Parameters Dialog Box .............................................................................. 15

4-1. Low-Level Register Control Tab ......................................................................................... 17

B-1. ADC12DJxx00EVM Clocking System Block Diagram................................................................. 20

B-2. External LMKCLK Configuration ......................................................................................... 21

B-3. External DevCLK EVM Configuration.................................................................................... 22

4-1. Supported and Non-Supported Features of the JESD204B Device................................................. 16

4-2. Low-Level Controls......................................................................................................... 17

5-1. Troubleshooting ............................................................................................................ 18

C-1. ADC12DJ3200EVM Signal Routing ..................................................................................... 23

List of Figures

List of Tables

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List of Figures

Chapter 1

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Introduction

The ADC12DJ3200EVM is an evaluation board used to evaluate the ADC12DJ3200 analog-to-digital converter (ADC) from Texas Instruments. The ADC12DJ3200 device is a dual-channel, 12-bit ADC, capable of operating at sampling rates up to 3.2 Giga-samples per second (GSPS) in dual channel mode or 6.4 GSPS in single channel mode. The ADC12DJ3200 device output data is transmitted over a standard JESD204B high-speed serial interface. This evaluation board also includes the following important features:

• Transformer-coupled signal input network allowing a single-ended signal source from 500 kHz to 9 GHz

• The LMX2582 clock synthesizer generates the ADC sampling clock

• The LMK04828 and LMX2582 onboard system clock generator generates SYSREF and FPGA reference clocks for the high-speed serial interface

• Transformer-coupled clock input network to test the ADC performance with an external low-noise clock source

• LM95233 temperature sensor

• High-speed serial data output over a High Pin Count FMC+ interface connector

NOTE: To improve signal routing quality, serial lane polarity is inverted with respect to the standard

FMC VITA-57 signal mapping. Signal mapping and polarity is shown in Table C-1).

• Device register programming through USB connector and FTDI USB-to-SPI bus translator

K&L Microwave is a trademark of K&L Microwave. Microsoft, Windows are registered trademarks of Microsoft Corporation. Rohde & Schwarz is a registered trademark of Rohde & Schwarz GmbH & Co.. Trilithic is a trademark of Trilithic, Inc..

Introduction

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Figure 1-1. EVM Orientation

The digital data from the ADC12DJ3200EVM board is quickly and easily captured with the TSW14J57EVM or TSW14J56EVM data capture boards.

NOTE: The TSW14J56EVM cannot be used for JMODES that use 16 data lanes, or serial rates

above 12 Gbps.

The TSW14J57EVM captures the high-speed serial data, decodes the data, stores the data in memory, and then uploads it to a connected PC through a USB interface for analysis. The High-Speed Data Converter Pro (HSDC Pro) software on the PC communicates with the hardware and processes the data.

With proper hardware selection in the HSDC Pro software, the TSW14J57 device is automatically configured to support a wide range of operating speeds of the ADC12DJ3200EVM, but the device may not cover the full operating range of the ADC device. Serial data rates of 12.8 Gbps down to 1 Gbps are supported.

In the following sections of this document, theADC12DJ3200EVM evaluation board is referred to as the EVM and the ADC12DJ3200 device is referred to as the ADC device.

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Introduction

This section describes how to setup the EVM on the bench with the proper equipment to evaluate the full performance of the ADC device.

2.1 Evaluation Board Feature Identification Summary

Chapter 2

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Equipment

Figure 2-1. EVM Feature Locations

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2.2 Required Equipment

The following equipment and documents are included in the EVM evaluation kit:

• Evaluation board (EVM)

• Mini-USB cable

• Power cable

The following equipment is not included in the EVM evaluation kit, but is required for evaluation of this product:

• TSW14J57EVM or TSW14J56EVM data capture board and related items

• High-Speed Data Converter Pro software

• PC computer running Microsoft®Windows®XP, 7, or 8

• One low-noise signal generator for analog input. TI recommends the following generators: – Keysight E8663D – Rohde & Schwarz®SMA100A

• Bandpass filter for analog input signal (1910 MHz or desired frequency). The following filters are recommended:

– Bandpass filter, greater than or equal to 60-dB harmonic attenuation, less than or equal to 5%

bandwidth, greater than 18-dBm power, less than 5-dB insertion loss – Trilithic™ 5VH-series tunable BPF – K&L Microwave™ BT-series tunable BPF – TTE KC6 or KC7-series fixed BPF

• Signal-path cables, SMA or BNC (or both SMA and BNC) By default, the ADC12DJ3200EVM has an onboard clocking solution. A few small board modifications

enable external clocking. If external clocking is used, the following equipment is recommended.

• Two low-noise signal generators. TI recommends similar models to the analog input source.

• A bandpass filter for the DEVCLK input. TI recommends a filter similar to the analog-input path filter.

Required Equipment

NOTE: The clock source used to drive the LMK04828 (labeled LMKCLK) must be equal in frequency

to the ADC sampling clock (labeled DEVCLK). The clock generators must be frequencylocked using a common 10-MHz reference.

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Equipment

Chapter 3

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Setup Procedure

NOTE: The HSDC Pro software must be installed before connecting the TSW14J57EVM to the PC

for the first time.

Setup Procedure

Figure 3-1. EVM Test Setup

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Install the High Speed Data Converter (HSDC) Pro Software

3.1 Install the High Speed Data Converter (HSDC) Pro Software

Download the most recent version of the HSDC Pro software from www.ti.com/tool/dataconverterpro-sw. Follow the installation instructions to install the software.

3.2 Install the Configuration GUI Software

1. Download the Configuration GUI software from the EVM tool folder at ADC12DJxx00 GUI .

2. Extract files from the .zip file.

3. Run the executable file (setup.exe), and follow the instructions.

3.3 Connect the EVM and TSW14J57EVM

With the power off, connect the ADC12DJ3200EVM to the TSW14J57EVM through the FMC connector as shown in Figure 3-1. Ensure that the standoffs provide the proper height for robust connector connections.

3.4 Connect the Power Supplies to the Boards (Power Off)

1. Confirm that the power switch on the TSW14J57EVM is in the off position. Connect the power cable to a 12-V DC (minimum 2 A) power supply. Ensure the proper supply polarity by confirming that the outer surface of the barrel connector is GND and the inner portion of the connector is 12 V. Connect the power cable to the EVM power connector.

2. Confirm that the power switch on the ADC12DJ3200EVM is in the off position. Connect the power cable to a 5-V DC (minimum 3 A) power supply. Ensure the proper supply polarity by confirming that the outer surface of the barrel connector is GND and the inner portion of the connector is 5 V. Connect the power cable to the EVM power connector.

CAUTION

Ensure the power connections to the EVMs are the correct polarity. Failure to do so may result in immediate damage

Ensure the 12-V power supply is connected to the TSW14J57EVM and not the ADC12DJ3200EVM. Providing the ADC12DJ3200EVM with 12 V may result in immediate damage

Leave the power switches in the off position until directed later.

3.5 Connect the Signal Generators to the EVM (*RF Outputs Disabled Until Directed)

1. Connect a signal generator to the VIN input of the ADC12DJ3200EVM through a bandpass filter and attenuator at the SMA connector. This must be a low-noise signal generator. TI recommends a Trilithic-tunable bandpass filter to filter the signal from the generator. Configure the signal generator for 1910 MHz, 0 dBm.

If External Clocking is Used (Optional)

(a) Connect a signal generator to the DEVCLK input of the EVM through a bandpass filter. This signal

generator must be a low-noise signal generator. TI recommends a Trilithic-tunable bandpass filter to filter the signal coming from the generator. Configure the signal generator for the desired clock frequency in the range of 0.8 to 3.2 GHz. For best performance when using an RF signal generator, the power input to the CLK SMA connector must be 9 dBm (2.2 Vpp into 50 Ω). The signal generator must increase above 9 dB by an amount equal to any additional attenuation in the clock signal path, such as the insertion loss of the bandpass filter. For example, if the filter insertion loss is 2 dB, the signal generator must be set to 9 dBm + 2 dB = 11 dBm.

(b) Connect a signal generator to the LMKCLK input of the EVM through a bandpass filter. Configure

the signal generator for the desired clock frequency in the range of 0.8 to 3.2 GHz. Set the output power to approximately 6–9 dBm.

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Setup Procedure

Turn On the TSW14J57EVM Power and Connect to the PC

NOTE: 1. The LMKCLK frequency must be equal to the frequency of the DEVCLK.

2. Ensure that the DEVCLK and LMKCLK sources are frequency-locked using a common 10-MHz reference to ensure functionality. Frequency locking the input signal generator to the other generators can also be done if coherent sampling is desired.

3. Do not turn on the RF output of any signal generator at this time.

4. When using the ADC in single-input mode, the device uses both edges of DEVCLK for sampling.

3.6 Turn On the TSW14J57EVM Power and Connect to the PC

1. Turn on the power switch of the TSW14J57EVM.

2. Connect a mini-USB cable from the PC to the TSW14J57EVM.

3. If this is the first time connecting the TSW14J57EVM to the PC, follow the on-screen instructions to automatically install the device drivers. See the TSW14J57EVM user's guide (SLWU092) for specific instructions.

3.7 Turn On the ADC12DJ3200EVM Power Supplies and Connect to the PC

1. Turn on the 5-V power supply to power up the EVM.

2. Connect the EVM to the PC with the mini-USB cable.

3.8 Turn On the Signal Generator RF Outputs

Turn on the RF signal output of the signal generator connected to VIN. If external clocking is used, turn on the RF signal outputs connected to DEVCLK and LMKCLK.

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3.9 Open the ADC12DJ3200EVM GUI and Program the ADC and Clocks

The Device Configuration GUI is installed separately from the HSDC Pro installation and is a stand-alone GUI.

Setup Procedure

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Open the ADC12DJ3200EVM GUI and Program the ADC and Clocks

Figure 3-2. Configuration GUI EVM Tab

Figure 3-2 and Figure 3-3 show the GUI open to the EVM tab and Control tab respectively. Tabs at the

top of the panel organize the configuration into device and EVM features with user-friendly controls and a low-level tab for directly configuring the registers. The EVM has three configurable devices, namely the ADC12DJ3200, LMK04828, and LMX2582. The register map for each device is provided in the device data sheet (SLVSD97, SNAS605, and SNAS680, respectively).

1. Open the ADC12DJxx00EVM GUI.

2. Select the onboard clock as the clock source.

3. Select Fs = 2700 MHz MSPS as the onboard Fs selection.

4. Select JMODE0 for the decimation and serial data mode.

5. Click Program Clocks and ADC (Note: This action will overwrite any previous device register settings.)

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Setup Procedure

Calibrate the ADC Device on the EVM

3.10 Calibrate the ADC Device on the EVM

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Figure 3-3. Configuration GUI ADC Control

1. With the EVM GUI open on the PC, navigate to the Control tab.

2. To calibrate the ADC, click Call Triggered/Running once, then click it again. This will stop and re-start the Calibration engine.

NOTE: This calibrate button executes a calibration sequence that is required for full performance.

This calibration is performed automatically during the Section 3.9 step but must be performed again, any time the sampling rate changes, after significant temperature change of the ADC, or after exiting the power-down mode. See the ADC12DJ3200EVM device data sheet, (SLVSD97) , for details regarding the necessary calibration sequence.

3. To enable background calibration, use the following steps:

• Navigate to the JESD204B tab and click on JESD Block Enable to stop the JESD204B block.

• Navigate back to the Control tab and click on Enable Calibration Block to disable calibration and

allow setting changes.

• Click on Enable Background Cal.

• If background offset calibration is desired also, click on Enable Background Offset Cal.

• Click on Enable Calibration Block to re-enable the calibration subsystem

• Navigate to the JESD204B tab and click on JESD Block Enable to re-start the JESD204B block.

• Navigate back to the Control tab and click the Cal Triggered/Running button once, then click it

again. This restarts the Calibration engine.

Setup Procedure

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Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM

4. To disable background calibration, use the following steps:

• Navigate to the JESD204B tab and click on JESD Block Enable to stop the JESD204B block.

• Navigate back to the Control tab and click on Enable Calibration Block to disable calibration and

allow setting changes.

• If background offset calibration was enabled, click on Enable Background Offset Cal to disable the

feature.

• Click on Enable Background Cal to disable the feature.

• Click on Enable Calibration Block to re-enable the calibration subsystem.

• Navigate to the JESD204B tab and click on JESD Block Enable to re-start the JESD204B block.

• Navigate back to the Control tab and click the Cal Triggered/Running button once, then click it

again. This restarts the Calibration engine.

3.11 Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM

1. Open the HSDC Pro software.

2. Click OK to confirm the serial number of the TSW14J57EVM device. If multiple TSWxxxxx boards are connected, select the model and serial number for the one connected to the ADC12DJ3200EVM.

3. Select the ADC12DJxx00_JMODE0 device from the ADC select drop-down in the top left corner.

4. When prompted, click Yes to update the firmware.

NOTE: If the user configures the EVM with options other than the default register values, different

instructions may be required for selecting the device in HSDC Pro. See Appendix B for more details.

5. Enter the ADC Output Data Rate (ƒ

) as "5400M" or the desired output sample rate. This number

(SAMPLE)

must be equal to the actual sampling rate of the device and must be updated if the sampling rate changes.

3.12 Capture Data Using the HSDC Pro Software

The following steps show how to capture data using the HSDC Pro software (see Figure 3-4):

1. Select the test to perform.

2. Select the data view.

3. Select the channel to view.

4. Click the capture button to capture new data.

Additional tips:

• Use the Notch Frequency Bins from the Test Options file menu to remove bins around DC (eliminate DC noise and offset) or the fundamental (eliminate phase noise from signal generators).

• Open the Capture Option dialog from the Data Capture Options file menu to change the capture depth or to enable Continuous Capture or FFT averaging.

• For analyzing only a portion of the spectrum, use the Single Tone test with the Bandwidth Integration Markers from the Test Options file menu. The Channel Power test is also useful.

• For analyzing only a subset of the captured data, set the Analysis Window (samples) setting to a value less than the number of total samples captured and move the green or red markers in the small transient data window at the top of the screen to select the data subset of interest.

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Setup Procedure

Select Device

Capture Data

Choose T est

Check for Coherent Freq . Auto-Cal culate

Select Size of Analysis Window

Enter Device Outp ut Sampl e Rate

Click for De cimation and N CO Settings

Enter Target Input Freque ncy

Choose Da ta

Window

Select

Channel

Set FFT

Windowi ng

Capture Data Using the HSDC Pro Software

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When using decimation and NCO features, click the gear symbol to access the Additional Device Parameters dialog box to enter the following details:

1. ADC Sampling Rate

2. ADC Input Signal Frequency

3. NCO Frequency

4. Decimation Factor

The HSDC Pro GUI will calculate the ADC Output Data Rate based on these inputs. The Fundamental and Harmonic frequency locations will also be calculated and identified in the FFT display.

Figure 3-4. High Speed Data Converter Pro (HSDC) GUI

Setup Procedure

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Decimation Factor

NCO Frequency

ADC Input Frequency

ADC Sample Rate

Before Decimation

Remember Parameters

for this Session

Enable Decimation/NCO

Frequency Calculations

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Capture Data Using the HSDC Pro Software

Figure 3-5. Additional Device Parameters Dialog Box

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Setup Procedure

The ADC device is programmable through the serial programming interface (SPI) bus accessible through the FTDI USB-to-SPI converter located on the EVM. A GUI is provided to write instructions on the bus and program the registers of the ADC device.

For more information about the registers in the ADC device, see the ADC12DJ3200 device data sheet (SLVSD97).

4.1 Supported JESD204B Device Features

The ADC device supports some configuration of the JESD204B interface. Due to limitations in the TSW14J57EVM firmware, all JESD204B link features of the ADC device are not supported. Table 4-1 lists the supported and non-supported features.

Table 4-1. Supported and Non-Supported Features of the JESD204B Device

JESD204B Feature Supported by ADC Device Supported by TSW14J57EVM Supported by TSW14J56EVM

Number of lanes per link (L)

Total number of lanes active

Number of frames per multiframe (K)

Scrambling Supported Supported Supported

PBRS7, PBRS11, PBRS15, Ramp,

Test patterns

Speed Lane rates from 0.8 to 12.8 Gbps

(1)

Dependent on bypass or decimation mode and output rate selection. Always disable the JESD204 block before changing any of

D21.5, K28.5, Repeat ILA, Modified

RPAT, Long/Short Transport, Serial

Out 0, Serial Out 1, Bypass Lane ID,

L = 1, 2, 4, 8

1, 2, 4, 8, 16 1, 2, 4, 8, 16 1, 2, 4, 8

min

= 32, K

max

ADC Test Pattern

the JESD204B settings. Once the settings are changed, re-enable the JESD204 block.

= 3–18,

step

(1)

= 1 or 2

(1)

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Device Configuration

L = 1, 2, 4, 8 supported L = 1, 2, 4, 8 supported

Most values of K supported,

constrained by requirement that

ILA, Ramp, Long/Short Transport ILA, Ramp, Long/Short Transport

(1)

Lane rates from 2 to 15 Gbps

parameter must be properly

(SAMPLE)

set in HSDC Pro GUI.

K × F = 4

Most values of K supported,

constrained by requirement that

Lane rates from 0.6 to 12.5 Gbps

(SAMPLE)

K × F = 4

parameter must be properly

set in HSDC Pro GUI.

Chapter 4

4.2 Tab Organization

Control of the ADC device features are available in the EVM, Control, JESD204B, NCO Configuration tabs.

Device Configuration

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4.3 Low-Level Control

The Low Level View tab, illustrated in Figure 4-1, allows configuration of the devices at the bit-field level. At any time, the controls in Table 4-2 can be used to configure or read from the device.

Control Description

Write register button Write to the register highlighted in the register map summary with the value in the Write Data field Write all button Update all registers shown in the register map summary with the values shown in the Register Map

Read register button Read from the register highlighted in the Register Map summary and display the results in the

Read-all button Read from all registers in the Register Map summary and display the current state of the hardware

Load Configuration button Load a configuration file from disk and register address/data values in the file Save Configuration button Save a configuration file to disk that contains the current state of the configuration registers Register Data cluster Manipulate individual accessible bits of the register highlighted in the register map summary

Individual register cluster with read or write register buttons

Low-Level Control

Table 4-2. Low-Level Controls

• Clicking on a register field allows individual bit manipulation in the register data cluster

• The value column shows the value of the register at the time the GUI was last updated

• The LR column shows the value of the register at the time the register was last read

summary

Read Data field Can be used to re-synchronize the GUI with the state of the hardware

Perform a generic read or write command to the device shown in the Block drop-down box using the address and write data information

Figure 4-1. Low-Level Register Control Tab

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Device Configuration

Troubleshooting the ADC12DJ3200EVM

Table 5-1 lists some troubleshooting procedures.

Table 5-1. Troubleshooting

Issue Troubleshoot

• Verify the test setup shown in Figure 3-1, and repeat the setup procedure as described in this document.

• Check power supply to EVM and TSW14J57EVM. Verify that the power switch is in the on position.

• Check signal and clock connections to EVM.

General problems

TSW14J57 LEDs are not correct

Configuration GUI is not working properly

Configuration GUI is not able to connect to the EVM

HSDC Pro software is not capturing good data or analysis results are incorrect.

HSDC Pro software gives a time-out error when capturing data

Sub-optimal measured performance

• Visually check the top and bottom sides of the board to verify that nothing looks discolored or damaged.

• Ensure the board-to-board FMC+ connection is secure.

• Try pressing the CPU_RESET button on the TSW14J57EVM. Also try clicking Instrument Options → Reset Board after changing the ADC configuration.

• Try power-cycling the external power supply to the EVM, and reprogram the LMK and ADC devices.

• Verify the settings of the configuration switches on the TSW14J57EVM.

• Verify that the clock going to the CLK input is connected and the appropriate LEDs are blinking.

• Verify that the ADC device internal registers are configured properly.

• If LEDs are not blinking, reprogram the ADC EVM devices.

• Try pressing the CPU_RESET button on the TSW14J57EVM.

• Try capturing data in HSDC Pro to force an LED status update

• Verify that the USB cable is plugged into the EVM and the PC.

• Check the computer device manager and verify that a USB serial device is recognized when the EVM is connected to the PC.

• Verify that the green USB Status LED light in the top right corner of the GUI is lit. If it is not lit, click the Reconnect FTDI button.

• Try restarting the configuration GUI.

• Use the free FT_PROG software from FTDI chip and verify that the onboard FTDI chip is programmed with the product description ADC12DJ3200_A0 .

• Verify that the TSW14J57EVM is properly connected to the PC with a mini-USB cable and that the board serial number is properly identified by the HSDC software.

• Check that the proper ADC device mode is selected. The mode should match in HSDC Pro and the ADC GUI.

• Check that the analysis parameters are properly configured.

• Try to reprogram the LMK device and reset the JESD204 link.

• Verify that the ADC sampling rate is correctly set in the HSDC software.

• Try pressing the CPU_RESET button on the TSW14J57EVM. Also try clicking Instrument Options → Reset Board after changing the ADC configuration. Try to recapture again.

• Select Instrument Options → Download Firmware and download 'TSW14J57REVD_FIRMWARE_10AX048.rbf'. Try to capture again.

• Try clicking Cal Triggered/Running button 2× to re-calibrate the ADC in the current operating conditions. It is located on the Control tab of the configuration GUI.

• Check that the spectral analysis parameters are properly configured.

• Verify that bandpass filters are used in the clock and input signal paths and that low-noise signal sources are used.

Chapter 5

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Troubleshooting the ADC12DJ3200EVM

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This section provides references to technical documents and user's guides.

A.1 Technical Reference Documents

• ADC12DJ3200 device data sheet (SLVSD97)

• TSW14J57EVM user’s guide (SLWU092)

• TSW14J56EVM user’s guide (SLWU086)

• User's guide for the High Speed Data Converter Pro Software, also available in the help menu of the software (SLWU087)

• LMK04828 data sheet (SNAS605)

• LMX2582 data sheet (SNAS680)

• FTDI USB to Serial Driver Installation Manual (www.ftdichip.com/Support/Documents/InstallGuides.htm)

A.2 TSW14J57EVM Operation

Refer to the TSW14J57EVM user guide (SLWU092) for configuration and status information.

Appendix A

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References

A.3 TSW14J56EVM Operation

Refer to the TSW14J56EVM user guide (SLWU086) for configuration and status information.

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References

ADC12DJxx00

LMX2582

LMK04828

Opt

Sig Gen 2

Opt

Sig Gen 1

Signal

Generator

Balun

OSC out

Balun

LMX_CLKB

10MHz

Reference

LMK_CLK

CpOut1

10MHz

Reference

CLKIN0

FPGA_JESD_CLK_A

EVM

DEVCLK

10-MHz Reference

To Enable Coherent Sampling

SYSREF

FPGA_JESD_SYSREF

FPGA_JESD_CLK_B

10-MHz

Reference

10-MHz

Reference

DNI

Appendix B

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HSDC Pro Settings for Optional ADC Device Configuration

This appendix provides settings for optional ADC device configuration in HSDC Pro.

B.1 Changing the Number of Frames per Multi-Frame (K)

Changing the number of frames per multi-frame output by the JESD204 transmitter (ADC device) is configured using the K parameter on the JESD204B tab in the Configuration GUI. This parameter must be matched by the receiving device, and the SYSREF frequency must also be programmed to a compatible frequency. Ensure that the K value complies with the K Min and Step values for the selected JMODE. Refer to the ADC12DJxx00EVM operating modes table in the ADC12DJxx00EVM data sheet, (SLVSD97).

B.2 Customizing the EVM for Optional Clocking Support

Figure B-1 illustrates the ADC12DJxx00EVM clocking system block diagram.

Figure B-1. ADC12DJxx00EVM Clocking System Block Diagram

HSDC Pro Settings for Optional ADC Device Configuration

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The LMK04828 provides a buffered copy of the onboard crystal oscillator (OSCout) to the LMX2582. By default, the LMX2582 is configured to generate the ADC device clock using this 100-MHz reference and the LMK04828 is used in clock distribution mode and provides the SYSREF and device clocks for the FPGA. The EVM can be configured to use external clocks with the following steps (see Figure B-2):

1. Modify the hardware:

2. Connect the Signal Generators:

3. Program the GUI:

Customizing the EVM for Optional Clocking Support

(a) Remove C50 and C51, populate C49 and C52. (b) Remove R67, populate R70.

(a) Connect the 10-MHz reference from Sig Gen 1 to Sig Gen 2. (b) Configure Sig Gen 2 to use the 10-MHz reference input from Sig Gen 1. (c) Sig Gen 1 connects to DEVCLK (J18). Set to the generator frequency to the desired F

DEVCLK

output level to +9 dBm.

(d) Sig Gen 2 connects to LMKCLK (J22) with output level +6 dBm to +9 dBm. Set the generator

frequency as follows: F

LMKCLK

= F

DEVCLK

(a) In the EVM tab, set the Clock Source to External. (b) Enter the Sampling Frequency (F

) in step 2(b).

DEVCLK

. Set

Figure B-2. External LMKCLK Configuration

SLAU701–May 2017

Submit Documentation Feedback

HSDC Pro Settings for Optional ADC Device Configuration

Customizing the EVM for Optional Clocking Support

Figure B-3. External DevCLK EVM Configuration

The ADC12DJxx00EVM includes a reference clock input (CLKIN0) which allows the user to sync the LMK04828 to an external 10-MHz reference allowing for coherent sampling

The LMX2582 and LMK04828 may be reconfigured to exercise more features, but this EVM is not intended to be a full evaluation platform for these devices. For a full evaluation platform, see the

LMK04828 tool folder and LMX2582 tool folder.

www.ti.com

HSDC Pro Settings for Optional ADC Device Configuration

Submit Documentation Feedback

SLAU701–May 2017

Table C-1 provides the signal routing details for the ADC12DJ3200EVM.

Table C-1. ADC12DJ3200EVM Signal Routing

JESD204B Output Link LID FMC(+) Pins FMC(+) Signal Names

DA0 A 0 A10,A11 DP3_M2C DA1 A 1 C6,C7 DP0_M2C DA2 A 2 A6,A7 DP2_M2C DA3 A 3 A2,A3 DP1_M2C DB0 B 0 B12,B13 DP7_M2C_INV DB1 B 1 A14,A15 DP4_M2C_INV DB2 B 2 B16,B17 DP6_M2C_INV DB3 B 3 A18,A19 DP5_M2C_INV DA4 A 4 Y14,Y15 DP12_M2C DA5 A 5 Y10,Y11 DP10_M2C DA6 A 6 B8,B9 DP8_M2C DA7 A 7 B4,B5 DP9_M2C DB4 B 4 Z12,Z13 DP11_M2C_INV DB5 B 5 Z16,Z17 DP13_M2C_INV DB6 B 6 Y18,Y19 DP14_M2C_INV DB7 B 7 Y22,Y23 DP15_M2C_INV

(1)

Red items with _INV in the signal name are inverted with respect to standard FMC polarity.

Appendix C

SLAU701–May 2017

Signal Routing

(1)

SLAU701–May 2017

Submit Documentation Feedback

Signal Routing

STANDARD TERMS FOR EVALUATION MODULES

1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system.

2 Limited Warranty and Related Remedies/Disclaimers:

2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement.

2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM. User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10) business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period.

3 Regulatory Notices:

3.1 United States

3.1.1 Notice applicable to EVMs not FCC-Approved:

FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.

3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:

CAUTION

This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.

Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.

FCC Interference Statement for Class A EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense.

FCC Interference Statement for Class B EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and receiver.

• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

• Consult the dealer or an experienced radio/TV technician for help.

3.2 Canada

3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247

Concerning EVMs Including Radio Transmitters:

This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may

cause undesired operation of the device.

Concernant les EVMs avec appareils radio:

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.

Concerning EVMs Including Detachable Antennas:

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.

Concernant les EVMs avec antennes détachables

Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur

3.3 Japan

3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に

輸入される評価用キット、ボードについては、次のところをご覧ください。

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page

3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan.

If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs (which for the avoidance of doubt are stated strictly for convenience and should be verified by User):

1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan,

2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or

3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.

【無線電波を送信する製品の開発キットをお使いになる際の注意事項】開発キットの中には技術基準適合証明を受けていないものがあります。技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。

1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。

2. 実験局の免許を取得後ご使用いただく。

3. 技術基準適合証明を取得後ご使用いただく。

なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。

上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。日本テキサス・インスツルメンツ株式会社東京都新宿区西新宿６丁目２４番１号西新宿三井ビル

3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/

/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

3.4 European Union

3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a

low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures.

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4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.

4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages.

4.3 Safety-Related Warnings and Restrictions:

4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm.

4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees.

4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements.

5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free.

6. Disclaimers:

6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.

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