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ADC0808M
CMOS ANALOG-TO-DIGITAL CONVERTER
WITH 8-CHANNEL MULTIPLEXER
SGLS005A – D2642, NOVEMBER 1986 – REVISED MAY 1988
• Total Unadjusted Error . . . ± 0.75 LSB Max
• Resolution of 8 Bits
• 100-µs Conversion Time
• Ratiometric Conversion
• Monotonous Over the Entire A/D Conversion
Range
• No Missing Codes
• Easy interface With Microprocessors
• Latched 3-State Outputs
• Latched Address Inputs
• Single 5-V Supply
• Low Power Consumption
• Designed to Be Interchangeable With
National Semiconductor ADC0808CJ
description
The ADC0808M is a monolithic CMOS device with
an 8-channel multiplexer, an 8-bit analog-to-digital
(A/D) converter, and microprocessor-compatible
control logic. The 8-channel multiplexer can be
controlled by a microprocessor through a 3-bit
address decoder with address load to select any
one of eight single-ended analog switches
connected directly to the comparator. The 8-bit
A/D converter uses the successive-approximation
conversion technique featuring a high-impedance
threshold detector, a switched capacitor array, a
sample-and-hold, and a successive- approximation register (SAR). Detailed information on
interfacing to most popular microprocessors is
readily available from the factory.
INPUTS
INPUT 7
START
EOC
–5
2
OE
CLK
V
CC
ST ART
EOC
–5
2
OEN
CLK
V
CC
REF+
GND
–7
2
INPUT 6
4
5
6
7
8
9
10
11
13 14
12
J PACKAGE
(TOP VIEW)
3
1
4
2
5
3
6
4
7
5
6
7
8
9
10
11
12
13
14
FK PACKAGE
(TOP VIEW)
INPUT 5
INPUT 4
INPUT 3
321
28 27 26
15 16 17 18
28
27
26
25
24
23
22
21
20
19
18
17
16
15
INPUT 1
INPUT 2
2
1
INPUTS
0
A
ADDRESS
B
C
ALE
–1
2
(MSB)
–2
2
–3
2
–4
2
2–8 (LSB)
REF–
–6
2
INPUT 0
25
A
B
24
C
23
ALE
22
–1
2
21
–2
2
20
–3
2
19
ADDRESS
(MSB)
The comparison and converting methods used
eliminate the possibility of missing codes,
nonmonotonicity, and the need for zero or
full-scale adjustment. Also featured are latched
GND
REF+
–6
2–72
REF–
(LSB)
–8
2
–4
2
3-state outputs from the SAR and latched inputs
to the multiplexer address decoder. The single 5-V
supply and low power requirements make the
ADC0808M especially useful for a wide variety of
applications. Ratiometric conversion is made
possible by access to the reference voltage input
terminals.
The ADC0808M is characterized for operation over the full military temperature range of –55°C to 125°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1988, Texas Instruments Incorporated
1
ADC0808M
CMOS ANALOG-TO-DIGIT AL CONVERTER
WITH 8-CHANNEL MULTIPLEXER
SGLS005A – D2642, NOVEMBER 1986 – REVISED MAY 1988
functional block diagram (positive logic)
Sample-and-Hold
Binary-Weighted
12
REF+
16
REF–
26
0
27
1
28
Analog
Inputs
2
3
4
5
6
7
1
2
3
4
5
Analog
Multiplexor
Capacitors
Switch
Matrix
Timing
and
Control
Threshold
Detector
Output
Latches
EN
17
14
15
8
18
19
20
21
7
–8
2
(LSB)
–7
2
–6
2
–5
2
–4
2
–3
2
–2
2
2–1(MSB)
EOC
Digital
Outputs
CLOCK
START
OEC
ALE
10
6
9
25
A
24
B
23
C
22
Address
Decoder
MULTIPLEXER FUNCTION TABLE
INPUTS
ADDRESS ADDRESS
C B A STROBE CHANNEL
L L L ↑ 0
L LH ↑ 1
LHL ↑ 2
LHH ↑
HLL ↑ 4
HLH ↑ 5
HHL ↑ 6
HHH ↑ 7
H = high level, L = low level
↑ = low-to-high transition
SELECTED
ANALOG
3
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating sequence
CLK
ADC0808M
CMOS ANALOG-TO-DIGIT AL CONVERTER
WITH 8-CHANNEL MULTIPLEXER
SGLS005A – D2642, NOVEMBER 1986 – REVISED MAY 1988
1/f
START
ALE
ADDRESS
INPUT
Multiplex Output
(Internal)
EOC
OEN
Latch Outputs
50%50%
t
w(S)
50%50%
t
w(ALC)
Address Stable
50%50%
t
t
su
h
Analog Value
Input Stable
Analog Value
50% 50%
t
d(EOC)
t
conv
Hi-Z State 10%
90%
50%50%
t
en
90%
10%
t
dis
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3