TEXAS INSTRUMENTS ADC0803, ADC0805 Technical data
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D
8-Bit Resolution
D
Ratiometric Conversion
D
100-µs Conversion Time
D
135-ns Access Time
D
Guaranteed Monotonicity
D
High Reference Ladder Impedance
8 kΩ Typical
D
No Zero Adjust Requirement
D
On-Chip Clock Generator
D
Single 5-V Power Supply
D
Operates With Microprocessor or as
Stand-Alone
D
Designed to Be interchangeable With
National Semiconductor and Signetics
ADC0803 and ADC0805
description
ADC0803, ADC0805
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH DIFFERENTIAL INPUTS
SLAS034 – NOVEMBER 1983 – REVISED SEPTEMBER 1986
N PACKAGE
(TOP VIEW)
CS
RD
WR
CLK IN
INTR
IN+
IN–
ANLG GND
REF/2
DGTL GND
1
2
3
4
5
6
7
8
9
10
V
20
CLK OUT
19
DB0 (LSB)
18
DB1
17
DB2
16
DB3
15
DB4
14
DB5
13
DB6
12
DB7 (MSB)
11
(OR REF)
CC
DATA
OUTPUTS
The ADC0803 and ADC0805 are CMOS 8-bit, successive-approximation, analog-to-digital converters that use
a modified potentiometric (256R) ladder. These devices are designed to operate from common microprocessor
control buses with the 3-state output latches driving the data bus. The devices can be made to appear to the
microprocessor as a memory location or an I/O port. Detailed information on interfacing to most popular
microprocessors is readily available from the factory.
A differential analog voltage input allows increased common-mode rejection and offset of the zero-input analog
voltage value. Although a reference input (REF/2) is available to allow 8-bit conversion over smaller analog
voltage spans or to make use of an external reference, ratiometric conversion is possible with the REF/2 input
open. Without an external reference, the conversion takes place over a span from V
to ANLG GND. The
CC
devices can operate with an external clock signal or with an additional resistor and capacitor, using an on-chip
clock generator.
The ADC0803C and ADC0805C are characterized for operation from 0°C to 70°C. The ADC0803I and
ADC0805I are characterized for operation from –40°C to 85°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1986, Texas Instruments Incorporated
1
ADC0803, ADC0805
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH DIFFERENTIAL INPUTS
SLAS034 – NOVEMBER 1983 – REVISED SEPTEMBER 1986
functional block diagram (positive logic)
2
RD
Start
Flip-Flop
CS
1
WR
CLK
OUT
CLK IN
DGTL
GND
V
CC
REF/2
ANLG
GND
IN +
IN –
3
19
4
10
20
9
8
6
7
SAR
Latch
LE
1D
C1R
CLK B
8-Bit
Shift
Register
D
Interrupt
Flip-Flop
R
R
R
5
1D
C1CLK A
S
INTR
S
CLK A
CLK A
Clk
CLK
Gen
Clk Osc
Ladder
and
Decoder
V
CC
DAC
CLK B
CLK
Σ
Comp
ENLE
3-State
Output
Latch
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
18
17
16
15
14
13
12
11
DB0 (LSB)
DB1
DB2
DB3
DB4
DB5
DB6
DB7 (MSB)
Operating free–air temperature, T
°C
ADC0803, ADC0805
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH DIFFERENTIAL INPUTS
SLAS034 – NOVEMBER 1983 – REVISED SEPTEMBER 1986
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range: CS,
Output voltage range –0.3 V to V
Operating free-air temperature range: ADC080_C 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range – 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTE 1: All voltage values are with respect to digital ground (DGTL GND) with DGTL GND and ANLG GND connected together unless otherwise
noted.
recommended operating conditions
Supply voltage, V
Analog input voltage (see Note 2) –0.05 VCC = 0.05 V
Voltage at REF/2 (see Note 3), V
High-level input voltage at CS, RD, or WR, V
Low-level input voltage at CS, RD, or WR, V
Analog ground voltage (see Note 4) –0.05 0 1 V
Clock iput frequency (see Note 5), f
Duty cycle for f
Pulse durartion, clock input (high or low) for f
Pulse durartion, WR input low, tW(WR) 100 ns
p
NOTES: 2. When the differential input voltage (VI+ – VI–) is less than or equal to 0 V, the output code is 0000 0000.
CC
above 640 kHz (see Note 5) 40% 60%
clock
p
3. The internal reference voltage is equal to the voltage applied to REF/2 or approximately equal to one-half of the VCC when REF/2
is left open. The voltage at REF/2 should be one-half the full-scale differential input voltage between the analog inputs. Thus, the
differential input voltage range when REF/2 is open and VCC = 5 V is 0 V to 5 V . V
(full-scale differential voltage of 3 V) is 1.5 V.
4. These values are with respect to DGTL GND.
5. Total unadjusted error is specified only at an f
For frequencies above this limit or pulse duration below 625 ns, error may increase. The duty cycle limits should be observed for
an f
greater than 640 kHz. Below 640 kHz, this duty cycle limit can be exceeded provided t
clock
RD, WR –0.3 V to 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other inputs –0.3 V to V
ADC080_I –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MIN NOM MAX UNIT
4.5 5 6.3 V
REF/2
clock
A
IH
IL
below 640 kHz, tW(CLK) 275 781 ns
clock
ADC080_C 0 70
ADC080_I –40 85
for an input voltage range from 0.5 V to 3.5 V
REF/2
of 640 kHz with a duty cycle of 40% to 60% (pulse duration 625 ns to 937 ns).
clock
0.25 2.5 V
2 15 V
100 640 1460 kHz
remains within limits.
w(CLK)
0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
0.8 V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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