Texas Instruments AD7524MJB, AD7524MJ, AD7524MFKB, 5962-87700012A Datasheet

D

Advanced LinCMOS Silicon-Gate
Technology

D

Easily interfaced to Microprocessors

D

On-Chip Data Latches

D

Monotonicity Over Entire A/D Conversion
Range

D

Segmented High-Order Bits Ensure
Low-Glitch Output

D

Designed to Be interchangeable With
Analog Devices AD7524, PMI PM-7524, and
Micro Power Systems MP7524

D

Fast Control Signaling for Digital Signal
Processor Applications Including Interface
With SMJ320

KEY PERFORMANCE SPECIFICATIONS

Resolution 8 Bits
Linearity error 1/2 LSB Max
Power dissipation at VDD = 5 V 5 mW Max
Settling time 100 ns Max
Propagation delay 80 ns Max

description

AD7524M

Advanced LinCMOS 8-BIT MULTIPLYING

DIGITAL-TO-ANALOG CONVERTER

SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995

J PACKAGE
(TOP VIEW)

NC

16
15
14
13
12
11
10

R

FB

9

R
REF
V
WR
CS
DB0
DB1
DB2

REF

18
17
16
15
14

FB

DD

V

DD

WR
NC
CS
DB0

GND

DB7

NC
DB6
DB5

OUT1
OUT2

GND

DB7
DB6
DB5
DB4
DB3

FK PACKAGE

(TOP VIEW)

OUT2

3 2 1 20 19

4
5
6
7
8

910111213

1
2
3
4
5
6
7
8

OUT1

The AD7524M is an Advanced LinCMOS 8-bit
digital-to-analog converter (DAC) designed for
easy interface to most popular microprocessors.

NC–No internal connection

DB4

DB3

NC

DB2

DB1

The AD7524M is an 8-bit multiplying DAC with input latches and with a load cycle similar to the write cycle of
a random access memory. Segmenting the high-order bits minimizes glitches during changes in the
most-significant bits, which produce the highest glitch impulse. The AD7524M provides accuracy to 1/2 LSB
without the need for thin-film resistors or laser trimming, while dissipating less than 5 mW typically.

Featuring operation from a 5-V to 15-V single supply , the AD7524M interfaces easily to most microprocessor
buses or output ports. Excellent multiplying (2 or 4 quadrant) makes the AD7524M an ideal choice for many
microprocessor-controlled gain-setting and signal-control applications.

The AD7524M is characterized for operation from –55°C to 125°C.

AVAILABLE OPTIONS

PACKAGE

T

A

–55°C to 125°C AD7524MFK AD7524MJ

CERAMIC CHIP

CARRIER

(FK)

CERAMIC DIP

(J)

Advanced LinCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1995, Texas Instruments Incorporated

1

AD7524M
Advanced LinCMOS 8-BIT MULTIPLYING
DIGITAL-TO-ANALOG CONVERTER

SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995

functional block diagram

REF

CS

WR

operating sequence

15

12
13

2R

DB7

(MSB)

RRR

2R

Data Latches

DB6 DB5 DB0

Data Inputs

2R

(LSB)

tsu(CS)

2R

2R

16

R

FB

S-8S-3S-2S-1

11654

R

1

OUT1

2

OUT2

3

GND

th(CS)

CS

WR

DB0–DB7

10%

10%

tw(WR)

10%

tsu(D)

th(D)

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

AD7524M

Advanced LinCMOS 8-BIT MULTIPLYING

DIGITAL-TO-ANALOG CONVERTER

SGLS028A – SEPTEMBER 1989 – REVISED MARCH 1995

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V
Voltage between R

FB

Digital input voltage range, V
Reference voltage range, V
Peak digital input current, I
Operating free-air temperature range, T
Storage temperature range, T
Case temperature for 60 seconds, T

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package 300°C. . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

–0.3 V to 17 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DD

and GND ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.3 V to VDD+0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ref

10 µA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

–55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A

: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C

recommended operating conditions

VDD = 5 V VDD = 15 V

MIN NOM MAX MIN NOM MAX

Supply voltage, V
Reference voltage, V
High-level input voltage, V
Low-level input volage, V
CS setup time, t
CS hold time, t
Data bus input setup time, t
Data bus input hold time, t
Pulse duration, WR low, t
Operating free-air temperature, T

DD

ref

IH

IL

su(CS)

h(CS)

su(D)

h(D)

w(WR)

A

4.75 5 5.25 14.5 15 15.5 V
±10 ±10 V

2.4 13.5 V

0.8 1.5 V

40 40 ns

0 0 ns
25 25 ns
10 10 ns
40 40 ns

–55 125 –55 125 °C

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3