Designed to Be Interchangeable With
Fairchild µA741
description
The µA741 is a general-purpose operational
amplifier featuring offset-voltage null capability.
The high common-mode input voltage range and
the absence of latch-up make the amplifier ideal
for voltage-follower applications. The device is
short-circuit protected and the internal frequency
compensation ensures stability without external
components. A low value potentiometer may be
connected between the offset null inputs to null
out the offset voltage as shown in Figure 2.
µA741M ...J PACKAGE
(TOP VIEW)
NC
1
NC
2
OFFSET N1
V
CC
µA741M ...JG PACKAGE
µA741C, µA741I . . . D, P, OR PW PACKAGE
OFFSET N1
IN+
V
CC–
3
IN–
4
IN+
5
–
6
NC
7
(TOP VIEW)
1
IN–
2
3
4
µA741M ...U PACKAGE
(TOP VIEW)
NC
14
NC
13
NC
12
V
11
OUT
10
OFFSET N2
9
NC
8
NC
8
V
7
CC+
OUT
6
OFFSET N2
5
CC+
The µA741C is characterized for operation from
0°C to 70°C. The µA741I is characterized for
operation from – 40°C to 85°C.The µA741M is
characterized for operation over the full military
temperature range of –55°C to 125°C.
symbol
OFFSET N1
IN +
IN –
OFFSET N2
+
OUT
–
NC
OFFSET N1
IN–
IN+
V
CC–
µA741M . . . FK PACKAGE
NC
IN–
NC
IN+
NC
1
2
3
4
5
(TOP VIEW)
NC
OFFSET N1
NC
3 2 1 20 19
4
5
6
7
8
910111213
NC
NC
CC–
V
NC
10
NC
9
V
8
CC+
OUT
7
OFFSET N2
6
NC
NC
18
17
16
15
14
NC
NC
V
CC+
NC
OUT
NC
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
NC – No internal connection
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
OFFSET N2
Copyright 2000, Texas Instruments Incorporated
1
µA741, µA741Y
CHIP
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
0°C to 70°CµA741CDµA741CPµA741CPWµA741Y
–40°C to 85°CµA741IDµA741IP
–55°C to 125°CµA741MFKµA741MJµA741MJGµA741MU
The D package is available taped and reeled. Add the suffix R (e.g., µA741CDR).
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TSSOP
(PW)
FLAT
PACK
(U)
FORM
(Y)
schematic
OFFSET N1
OFFSET N2
IN–
IN+
V
CC+
OUT
V
CC–
Component Count
Transistors22
Resistors11
Diode1
Capacitor1
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
µA741Y chip information
This chip, when properly assembled, displays characteristics similar to the µA741C. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(7)
+
–
V
(6)
(4)
CC–
45
(8)
(7)(6)
(5)
IN+
IN–
OFFSET N1
OFFSET N2
(3)
(2)
(1)
(5)
OUT
(1)
36
(4)
(3)(2)
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C.
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
µA741CµA741IµA741MUNIT
Supply voltage, V
Supply voltage, V
Differential input voltage, VID (see Note 2)±15±30±30V
Input voltage, VI any input (see Notes 1 and 3)±15±15±15V
Voltage between offset null (either OFFSET N1 or OFFSET N2) and V
Duration of output short circuit (see Note 4)unlimitedunlimitedunlimited
Continuous total power dissipationSee Dissipation Rating Table
Operating free-air temperature range, T
Storage temperature range–65 to 150 –65 to 150 –65 to 150°C
Case temperature for 60 secondsFK package260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 secondsJ, JG, or U package300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 secondsD, P, or PW package260260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between V
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or either power supply . For the µA741M only , the unlimited duration of the short circuit applies
at (or below) 125°C case temperature or 75°C free-air temperature.
PACKAGE
D500 mW5.8 mW/°C64°C464 mW377 mWN/A
FK500 mW11.0 mW/°C105°C500 mW500 mW275 mW
J500 mW11.0 mW/°C105°C500 mW500 mW275 mW
JG500 mW8.4 mW/°C90°C500 mW500 mW210 mW
P500 mWN/AN/A500 mW500 mWN/A
PW525 mW4.2 mW/°C25°C336 mWN/AN/A
U500 mW5.4 mW/°C57°C432 mW351 mW135 mW
(see Note 1) 18 22 22V
CC+
(see Note 1)–18–22–22V
CC–
±15±0.5±0.5V
0 to 70–40 to 85–55 to 125°C
and V
CC+
TA = 85°C
POWER RATING
.
CC–
POWER RATING
TA = 125°C
TA ≤ 25°C
POWER RATING
A
DERATING
FACTOR
CC–
DISSIPATION RATING TABLE
DERATE
ABOVE T
A
TA = 70°C
POWER RATING
†
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
T
†
UNIT
VIOInput offset voltage
V
0
mV
IIOInput offset current
V
0
nA
IIBInput bias current
V
0
nA
V
V
V
V
A
gg
V/mV
CMRR
j
V
V
min
dB
k
ygy
V
±15 V
V/V
ICCSupply current
V
load
mA
PDTotal power dissipation
V
load
mW
PARAMETER
TEST CONDITIONS
UNIT
I
,
L
,
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
electrical characteristics at specified free-air temperature, V
TEST
CONDITIONS
p
∆V
IO(adj)
ICR
OM
VD
r
i
r
o
C
i
SVS
I
OS
†
All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for
the µA741C is 0°C to 70°C, the µA741I is –40°C to 85°C, and the µA741M is –55°C to 125°C.
NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback.
Supply voltage sensitivity (∆VIO/∆VCC)VCC = ±9 V to ±15 V30150µV/V
Short-circuit output current±25±40mA
Supply currentVO = 0,No load1.72.8mA
Total power dissipationVO = 0,No load5085mW
p
RL = 10 kΩ±12±14
RL = 2 kΩ±10±13
min7090dB
ICR
operating characteristics, V
t
r
SRSlew rate at unity gain
Rise time
Overshoot factor
± = ±15 V, T
CC
= 25°C
A
V
= 20 mV,R
CL = 100 pF,
VI = 10 V,
CL = 100 pF,
= 2 kΩ,
See Figure 1
RL = 2 kΩ,
See Figure 1
µA741Y
MINTYPMAX
0.3µs
5%
0.5V/µs
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
V
I
IN
0 V
INPUT VOLTAGE
WAVEFDORM
Figure 1. Rise Time, Overshoot, and Slew Rate
–
+
CL = 100 pF
OUT
RL = 2 kΩ
TEST CIRCUIT
APPLICATION INFORMATION
Figure 2 shows a diagram for an input offset voltage null circuit.
UA741MJOBSOLETECDIPJ14TBDCall TICall TI
UA741MJBOBSOLETECDIPJ14TBDCall TICall TI
UA741MJGOBSOLETECDIPJG8TBDCall TICall TI
UA741MJGBOBSOLETECDIPJG8TBDCall TICall TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAUN / A for Pkg Type
CU NIPDAUN / A for Pkg Type
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
CU NIPDAULevel-1-260C-UNLIM
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
0.063 (1,60)
0.015 (0,38)
0.100 (2,54)
8
1
5
4
0.065 (1,65)
0.045 (1,14)
0.020 (0,51) MIN
0.023 (0,58)
0.015 (0,38)
0.280 (7,11)
0.245 (6,22)
0.310 (7,87)
0.290 (7,37)
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0°–15°
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
4040107/C 08/96
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
0.021 (0,53)
0.015 (0,38)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
4
0.070 (1,78) MAX
0.020 (0,51) MIN
0.200 (5,08) MAX
0.125 (3,18) MIN
0.100 (2,54)
0.010 (0,25)
Seating Plane
M
0.325 (8,26)
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.010 (0,25) NOM
0.430 (10,92)
MAX
4040082/D 05/98
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm