Texas Instruments CY74FCT16245TPVCT, CY74FCT16245TPVC, CY74FCT16245TPACT, CY74FCT16245TPAC, CY74FCT16245ETPVCT Datasheet

16-Bit Transceivers

CY74FCT16245T

CY74FCT162245T

CY74FCT162H245T

SCCS026 - July 1994 - Revised March 2000

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.

Copyright © 2000, Texas Instruments Incorporated

1CY74FCT16445T/2
H245T

Features

• FCT-E speed at 3.2 ns

• Power-off disable outputs permits live insertion

• Edge-rate control circuitry for significantly improved

noise characteristics

• Typical output skew < 250 ps

• ESD > 2000V

• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)

packages

• Industrial temperature range of –40˚C to +85˚C

• V

CC

= 5V ± 10%

CY74FCT16245T Features:

• 64 mA sink current, 32 mA source current

• Typical V

OLP

(ground bounce)<1.0V at VCC = 5V,

TA = 25˚C

CY74FCT162245T Features:

• Balanced output drivers: 24 mA

• Reduced system switching noise

• Typical V

OLP

(ground bounce) <0.6V at VCC = 5V,

TA= 25˚C

CY74FCT162H245T Features:

• Bus hold on data inputs

• Eliminates the need for external pull-up or pull-down

resistors

Functional Description

These 16-bit transceivers are designedfor use in bidirectional
synchronous communication between two buses, where high
speed and low power are required. With the exception of the
CY74FCT16245T, these devices can be operated either as
twoindependent octals or a single 16-bit transceiver. Direction
of data flow is controlled by (DIR), the Output Enable (

OE)
transfers data when LOW and isolates the buses when HIGH.
The output buffers are designed with power off disable capa­bility to allow for live insertion of boards.

The CY74FCT16245T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.

The CY74FCT162245T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for mini­mal undershoot and reduced ground bounce. The
CY74FCT162245T is ideal for driving transmission lines.

TheCY74FCT162H245T is a 24-mA balancedoutput part that
has bus hold on the data inputs. The device retains the input’s
last state whenever the input goes to high impedance. This
eliminates the need for pull-up/down resistors and prevents
floating inputs.

GND

LogicBlock Diagrams CY74FCT16245T,CY74FCT162245T,
CY74FCT162H245T

Pin

Configuration

1
2
3
4
5
6
7
8
9
10
11
12

33
32
31
30
29

25

26

27

28

36
35

1

DIR

34

SSOP/TSSOP

Top View

13
14
15
16
17
18
19
20
21
22
23
24

45
44
43
42
41

37

38

39

40

48
47
46

1B1
1B2

1B3
1B4

1A1
1A2

1A3
1A4

1

OE

GND

GND

V

CC

1B7
1B8

1B5
1B6

1A5
1A6

1A7
1A8

V

CC

GND

GND

2B3
2B4

2B1
2B2

2A1
2A2

2A3
2A4

GND

GND

V

CC

2B7
2B8

2B5
2B6

2A5
2A6

2A7
2A8

V

CC

GND

2

DIR

2

OE

FCT16245–1

1A1

1A2

1A3

1A4

1A5

1A6

1A7

1

OE

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1

DIR

1A8

1B8

FCT16245–2

2A1

2A2

2A3

2A4

2A5

2A6

2A7

2

OE

2B1

2B2

2B3

2B4

2B5

2B6

2B7

2

DIR

2A8

2B8

FCT16245–3

16245T
162245T
162H245T

CY74FCT16245

T

CY74FCT162245

T

CY74FCT162H245

T

2

Maximum Ratings

[3, 4]

(Above which the useful life may be impaired. For user
guidelines, not tested.)

Storage Temperature ........................Com’l -55°C to +125°C

Ambient Temperature with

Power Applied....................................Com’l -55°C to +125°C

DC Input Voltage ........................................... –0.5V to +7.0V

DC Output Voltage......................................... –0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin) ........................–60 to +120 mA

Power Dissipation..........................................................1.0W

Static Discharge Voltage............................................>2001V

(per MIL-STD-883, Method 3015)

Notes:

1. On CY74FCT162H245T these pins have bus hold.

2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.

3. Operationbeyondthe limitsset forthmayimpair theuseful lifeof the device.Unless otherwise noted,these limitsare overtheoperating free-airtemperature range.

4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V

CC

or ground.

Pin Description

Name Description

OE Three-State Output Enable Inputs (Active LOW)
DIR Direction Control
A Inputs or Three-State Outputs

[1]

B Inputs or Three-State Outputs

[1]

Function Table

[2]

Inputs

OutputsOE DIR

L L Bus B Data to Bus A
L H Bus A Data to Bus B

H X High Z State

Operating Range

Range

Ambient

Temperature V

CC

Industrial –40°C to +85°C 5V ± 10%

Electrical Characteristics Over the Operating Range

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

IH

Input HIGH Voltage 2.0 V

V

IL

Input LOW Voltage 0.8 V

V

H

Input Hysteresis

[6]

100 mV

V

IK

Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

I

IH

Input HIGH Current Standard VCC=Max., VI=V

CC

±1 µA

Bus Hold ±100

I

IL

Input LOW Current Standard VCC=Max., VI=GND ±1 µA

Bus Hold ±100 µA

I

BBH

I

BBL

Bus Hold Sustain Current on Bus Hold Input

[7]

VCC=Min. VI=2.0V –50 µA

VI=0.8V +50

I

BHHO

I

BHLO

Bus Hold Overdrive Current on Bus Hold Input

[7]

VCC=Max., VI=1.5V TBD mA

I

OZH

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=2.7V ±1 µA

I

OZL

High Impedance Output Current
(Three-State Output pins)

VCC=Max., V

OUT

=0.5V ±1 µA

I

OS

Short Circuit Current

[8]

VCC=Max., V

OUT

=GND –80 –140 –200 mA

I

O

Output Drive Current

[8]

VCC=Max., V

OUT

=2.5V –50 –180 mA

I

OFF

Power-Off Disable VCC=0V, V

OUT

≤4.5V

[9]

±1 µA

CY74FCT16245

T

CY74FCT162245

T

CY74FCT162H245

T

3

Output Drive Characteristics for CY74FCT16245T

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

V

OH

Output HIGH Voltage VCC=Min., IOH=–3 mA 2.5 3.5 V

VCC=Min., IOH=–15 mA 2.4 3.5 V
VCC=Min., IOH=–32 mA 2.0 3.0 V

V

OL

Output LOW Voltage VCC=Min., IOL=64 mA 0.2 0.55 V

Output Drive Characteristics for CY74FCT162245T, CY74FCT162H245T

Parameter Description Test Conditions Min. Typ.

[5]

Max. Unit

I

ODL

Output LOW Current

[8]

VCC=5V, VIN=VIH or VIL, V

OUT

=1.5V 60 115 150 mA

I

ODH

Output HIGH Current

[8]

VCC=5V, VIN=VIH or VIL, V

OUT

=1.5V –60 –115 –150 mA

V

OH

Output HIGH Voltage VCC=Min., IOH=–24 mA 2.4 3.3 V

V

OL

Output LOW Voltage VCC=Min., IOL=24 mA 0.3 0.55 V

Notes:

5. Typical values are at V

CC

=5.0V, TA=+25˚C ambient.

6. This parameter is specified but not tested.

7. Pins with bus hold are described in Pin Description.

8. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I

OS

tests should be performed last.

9. Tested at +25˚C.

Capacitance

[6]

(TA = +25˚C, f = 1.0 MHz)

Parameter Description Test Conditions Typ.

[5]

Max. Unit

C

IN

Input Capacitance VIN = 0V 4.5 6.0 pF

C

OUT

Output Capacitance V

OUT

= 0V 5.5 8.0 pF

CY74FCT16245

T

CY74FCT162245

T

CY74FCT162H245

T

4

Power Supply Characteristics

Parameter Description Test Conditions Typ.

[5]

Max. Unit

I

CC

Quiescent Power Supply Current VCC=Max. VIN<0.2V,

V

IN>VCC

-0.2V

5 500 µA

∆I

CC

Quiescent Power Supply Current
(TTL inputs HIGH)

VCC=Max. VIN=3.4V

[10]

0.5 1.5 mA

I

CCD

Dynamic Power Supply
Current

[11]

VCC=Max., One Input Toggling,
50%DutyCycle,OutputsOpen,
OE=DIR=GND

VIN=VCC or
V

IN

=GND

60 100 µA/MHz

I

C

Total Power Supply Current

[12]

VCC=Max., f1=10 MHz,
50%DutyCycle,OutputsOpen,
One Bit Toggling,
OE=DIR=GND

VIN=VCC or
V

IN

=GND

0.6 1.5 mA

VIN=3.4V or
V

IN

=GND

0.9 2.3 mA

VCC=Max., f1=2.5 MHz, 50%
Duty Cycle, Outputs Open,
Sixteen Bits Toggling,
OE=DIR=GND

VIN=VCC or
V

IN

=GND

2.4 4.5

[13]

mA

VIN=3.4V or
V

IN

=GND

6.4 16.5

[13]

mA

Notes:

10. Per TTL driven input (V

IN

=3.4V); all other inputs at VCC or GND.

11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

12. I

C

=I

QUIESCENT

+ I

INPUTS

+ I

DYNAMIC

IC=ICC+∆ICCDHNT+I

CCD(f0

/2 + f1N1)

I

CC

= Quiescent Current with CMOS input levels

∆I

CC

= Power Supply Current for a TTL HIGH input (VIN=3.4V)

D

H

= Duty Cycle for TTL inputs HIGH

N

T

= Number of TTL inputs at D

H

I

CCD

= Dynamic Current caused by an input transition pair (HLH or LHL)

f

0

= Clock frequency for registered devices, otherwise zero

f

1

= Input signal frequency

N

1

= Number of inputs changing at f

1

All currents are in milliamps and all frequencies are in megahertz.

13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

CY74FCT16245

T

CY74FCT162245

T

CY74FCT162H245

T

5

]

Switching Characteristics Over the Operating Range

[14]

Description

74FCT16245T

74FCT162245T

74FCT16245AT

74FCT162245AT

74FCT162H245AT

Fig.

No.

[15]

Parameter Min. Max. Min. Max. Unit

t

PLH

t

PHL

Propagation Delay Data to Output
A to B, B to A

1.5 7.0 1.5 4.5 ns 1, 3

t

PZH

t

PZL

Output Enable Time
OE to A or B

1.5 9.5 1.5 6.2 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time
OE to A or B

1.5 7.5 1.5 5.0 ns 1, 7, 8

t

PZH

t

PZL

Output Enable Time
DIR to A or B

1.5 9.5 1.5 6.2 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time
DIR to A or B

1.5 7.5 1.5 5.0 ns 1, 7, 8

t

SK(O)

Output Skew

[16]

0.5 0.5 ns —

Description

74FCT16245CT

74FCT162245CT

74FCT162H245CT

74FCT16245ET

74FCT162245ET

74FCT162H245ET

Fig.

No.

[15]

Parameter Min. Max. Min. Max. Unit

t

PLH

t

PHL

Propagation Delay Data to Output
A to B, B to A

1.5 4.1 1.5 3.2 ns 1, 3

t

PZH

t

PZL

Output Enable Time
OE to A or B

1.5 5.8 1.5 4.4 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time
OE to A or B

1.5 4.8 1.5 4.0 ns 1, 7, 8

t

PZH

t

PZL

Output Enable Time
DIR to A or B

1.5 5.8 1.5 4.8 ns 1, 7, 8

t

PHZ

t

PLZ

Output Disable Time
DIR to A or B

1.5 4.8 1.5 4.0 ns 1, 7, 8

t

SK(O)

Output Skew

[16]

0.5 0.5 ns —

Note:

14. Minimum limits are specified but not tested on Propagation Delays.

15. See “Parameter Measurement Information” in the General Information section.

16. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.

Ordering Information CY74FCT16245

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

3.2 CY74FCT16245ETPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245ETPVC/PVCT O48 48-Lead (300-Mil) SSOP

4.1 CY74FCT16245CTPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245CTPVC/PVCT O48 48-Lead (300-Mil) SSOP

4.5 CY74FCT16245ATPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245ATPVC/PVCT O48 48-Lead (300-Mil) SSOP

7.0 CY74FCT16245TPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245TPVC/PVCT O48 48-Lead (300-Mil) SSOP

CY74FCT16245

T

CY74FCT162245

T

CY74FCT162H245

T

6

Ordering Information CY74FCT162245

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

3.2 74FCT162245ETPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245ETPVC O48 48-Lead (300-Mil) SSOP
74FCT162245ETPVCT O48 48-Lead (300-Mil) SSOP

4.1 CY74FCT162245CTPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245CTPVC O48 48-Lead (300-Mil) SSOP
74FCT162245CTPVCT O48 48-Lead (300-Mil) SSOP

4.5 74FCT162245ATPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245ATPVC O48 48-Lead (300-Mil) SSOP
74FCT162245ATPVCT O48 48-Lead (300-Mil) SSOP

7.0 CY74FCT162245TPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245TPVC/PVCT O48 48-Lead (300-Mil) SSOP

Ordering Information CY74FCT162H245

Speed

(ns) Ordering Code

Package

Name Package Type

Operating

Range

3.2 74FCT162H245ETPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245ETPVC O48 48-Lead (300-Mil) SSOP
74FCT162H245ETPVCT O48 48-Lead (300-Mil) SSOP

4.1 74FCT162H245CTPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245CTPVC O48 48-Lead (300-Mil) SSOP
74FCT162H245CTPVCT O48 48-Lead (300-Mil) SSOP

4.5 74FCT162H245ATPACT Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245ATPVC O48 48-Lead (300-Mil) SSOP
74FCT162H245ATPVCT O48 48-Lead (300-Mil) SSOP

CY74FCT16245T/2245T

CY74FCT16445T/2H245T

7

Package Diagrams

48-Lead Shrunk Small Outline Package O48

CY74FCT16245

T

CY74FCT162245

T

CY74FCT162H245

T

8

Package Diagrams

48-Lead Thin Shrunk Small Outline Package Z48

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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright  2000, Texas Instruments Incorporated