54ACT16623, 74ACT16623
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS152A – JANUARY 1991 – REVISED APRIL 1996
D
Members of the Texas Instruments
Widebus
D
Inputs are TTL-Voltage Compatible
D
Flow-Through Architecture Optimizes
Family
PCB Layout
D
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
description
The ’ACT16623 are 16-bit transceivers designed
for asynchronous two-way communication between
data buses. The control-function implementation
allows for maximum flexibility in timing.
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic
level at the output-enable (OEBA
inputs. The output-enable inputs can be used to
and OEAB)
54ACT16623 . . . WD PACKAGE
75ACT16623 . . . DL PACKAGE
1OEAB
2OEAB
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
(TOP VIEW)
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OEBA
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OEBA
disable the device so that the buses are effectively
isolated.
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneously enabling
OEBA
and OEAB. Each output reinforces its input in this transceiver configuration. When both control inputs
are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines remain
at their last states.
The 74ACT16623 is packaged in TI’s shrink small-outline package, which provides twice the functionality of
standard small-outline packages in the same printed-circuit-board area.
The 54ACT16623 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16623 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1996, Texas Instruments Incorporated
1
54ACT16623, 74ACT16623
OPERATION
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS152A – JANUARY 1991 – REVISED APRIL 1996
FUNCTION TABLE
(each 8-bit section)
INPUTS
OEBA OEAB
L L B data to A bus
H H A data to B bus
H L Isolation
L H
B data to A bus,
A data to B bus
logic symbol
†
1OEBA
1OEAB
2OEBA
2OEAB
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
48
1
25
24
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
EN1
EN2
EN3
EN4
1
112
1
134
11
12
13
14
16
17
19
20
22
23
2
1B1
3
1B2
5
1B3
6
1B4
8
1B5
9
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
logic diagram (positive logic)
54ACT16623, 74ACT16623
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS152A – JANUARY 1991 – REVISED APRIL 1996
2A1
25
24
36
To Seven Other Channels
13
2B1
1OEBA
1OEAB
1A1
48
1
47
To Seven Other Channels
2OEBA
2OEAB
2
1B1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±400 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power package dissipation at TA = 55°C (in still air) (see Note 2): DL package 1.2 W. . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
(VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
recommended operating conditions (see Note 3)
54ACT16623 74ACT16623
MIN NOM MAX MIN NOM MAX
V
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 10 0 10 ns/V
T
NOTES: 3. Unused inputs should be connected to VCC through a pullup resistor of approximately 5 kΩ or greater.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Supply voltage (see Note 4) 4.5 5 5.5 4.5 5 5.5 V
CC
High-level input voltage 2 2 V
IH
Low-level input voltage 0.8 0.8 V
IL
Input voltage 0 V
I
Output voltage 0 V
O
High-level output current –24 –24 mA
Low-level output current 24 24 mA
Operating free-air temperature –55 125 –40 85 °C
A
4. All VCC and GND pins must be connected to the proper power supply.
CC
CC
0 V
0 V
CC
CC
V
V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
54ACT16623, 74ACT16623
PARAMETER
TEST CONDITIONS
V
UNIT
I
A
I
mA
I
50 µA
I
24 mA
PARAMETER
UNIT
A or B
B or A
ns
OEBA
A
ns
OEBA
A
ns
OEAB
B
ns
OEAB
B
ns
CpdPower dissipation capacitance per transceiver
C
f
pF
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS152A – JANUARY 1991 – REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
= –50 µ
OH
V
OH
V
OL
I
I
I
OZ
I
CC
∆I
C
C
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡
For I/O ports, the parameter IOZ includes the input leakage current.
Control inputs VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA
A or B ports VO = VCC or GND 5.5 V ±0.5 ±5 ±5 µA
‡
CC
Control inputs VI = VCC or GND 5 V 4.5 pF
i
A or B ports VO = VCC or GND 5 V 16 pF
io
= –24
OH
IOH = –75 mA
=
OL
=
OL
IOL = 75 mA
VI = VCC or GND, IO = 0 5.5 V 8 80 80 µA
One input at 3.4 V ,
Other inputs at VCC or GND
†
†
4.5 V 4.4 4.4 4.4
5.5 V 5.4 5.4 5.4
4.5 V 3.94 3.8 3.8
5.5 V 4.94 4.8 4.8
5.5 V 3.85 3.85
4.5 V 0.1 0.1 0.1
5.5 V 0.1 0.1 0.1
4.5 V 0.36 0.44 0.44
5.5 V 0.36 0.44 0.44
5.5 V 1.65 1.65
5.5 V 0.9 1 1 mA
TA = 25°C 54ACT16623 74ACT16623
MIN TYP MAX MIN MAX MIN MAX
V
V
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
TA = 25°C 54ACT16623 74ACT16623
MIN TYP MAX MIN MAX MIN MAX
4.2 7.3 9.5 4.2 10.4 4.2 10.4
3.1 7.3 9.5 3.1 10.3 3.1 10.3
2.7 6.8 8.8 2.7 9.5 2.7 9.5
3.5 8.2 10.2 3.5 11.1 3.5 11.1
6 9.6 11.3 6 12 6 12
5.3 8.6 10.3 5.3 10.7 5.3 10.7
4.1 6.9 8.7 4.1 9.3 4.1 9.3
5.1 7.9 9.7 5.1 10.6 5.1 10.6
5.1 8.2 10.2 5.1 10.4 5.1 10.4
4.4 7.4 9.3 4.4 9.5 4.4 9.5
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
FROM TO
(INPUT) (OUTPUT)
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
p
p
p
Outputs enabled
Outputs disabled
= 50 pF,
L
p
= 1 MHz
56
11
p
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
CL = 50 pF
(see Note A)
54ACT16623, 74ACT16623
16-BIT BUS TRANSCEIVERS
SCAS152A – JANUARY 1991 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
2 × V
500 Ω
500 Ω
S1
CC
Open
GND
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
WITH 3-STATE OUTPUTS
Open
2 × V
CC
GND
LOAD CIRCUIT
Input
t
PLH
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
1.5 V 1.5 V
50% V
CC
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
Figure 1. Load Circuit and Voltage Waveforms
t
PHL
50% V
V
CC
V
3 V
0 V
OH
OL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
CC
t
PZL
t
PZH
1.5 V
t
PLZ
50% V
t
PHZ
50% V
CC
CC
1.5 V
20% V
80% V
CC
CC
3 V
0 V
[
V
V
[
V
OL
OH
0 V
CC
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
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Copyright 1998, Texas Instruments Incorporated
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