74ACT11543
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS136 – D3608, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1993, Texas Instruments Incorporated
2–1
• Inputs Are TTL-Voltage Compatible
• 3-State True Outputs
• Back-to-Back Registers for Storage
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
•
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-mm Process
• 500-mA T ypical Latch-Up Immunity at 125°C
description
This 8-bit registered transceiver contains two sets
of D-type latches for temporary storage of data
flowing in either direction. Separate latch enable
(LEAB
or LEBA) and output enable (GAB or GBA)
inputs are provided for each register to permit
independent control in either direction of data flow.
The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data to B. Having CEAB
low and LEAB low makes the A-to-B latches transparent; a subsequent low-to-high transition of LEAB puts the
A latches in the storage mode. With CEAB and GAB both low, the 3-state B outputs are active and reflect the
data present at the output of the A latches. Data flow from B-to-A is similar, but requires the use of CEBA, LEBA,
and GBA inputs.
The 74ACT11543 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE
INPUTS
LATCH
OUTPUT BUFFERS
CEAB LEAB GAB
STATUS
A TO B
†
B1 THRU B8
H X X Storing Z
X H Storing
X H Z
L L L Transparent Current A Data
L H L Storing Previous} A Data
†
A-to-B data flow is shown: B-to-A flow control is the same except uses
CEBA
, LEBA, and GBA.
‡
Data present before low-to-high transition of LEAB
.
DW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CEBA
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
CEAB
GBA
LEBA
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
B8
LEAB
GAB
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
74ACT11543
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS136 – D3608, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–2
logic symbol
†
logic diagram (positive logic)
A1
LEAB
CEAB
GAB
LEBA
CEBA
GBA
2
16
14
15
27
1
28
B1
26
C1
1D
1D
C1
A8
A7
A6
A5
A4
A3
A2
A1
LEAB
CEAB
GAB
LEAB
CEBA
GBA
13
12
11
10
5
4
3
2
16
14
15
27
1
28
6D
3
2C6
G2
2EN4
1C5
G1
1EN
4
5D
B8
B7
B6
B5
B4
B3
B2
B1
17
18
19
20
23
24
25
26
To Seven Other Transceivers
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) –0.5 V to VCC+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or VI > VCC) ± 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or VO > VCC) ± 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to VCC) ± 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ± 200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
I
OH
High-level output current –24 mA
I
OL
Low-level output current 24 mA
Dt/D
v Input transition rise or fall rate 0 10 ns/V
T
A
Operating free-air temperature –40 85 °C
74ACT11543
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS136 – D3608, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–3
electrical characteristics over recommended operating free-air temperature range
TA = 25°C
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP MAX
MIN
MAX
UNIT
4.5 V 4.4 4.4
I
OH
= –50
m
A
5.5 V 5.4 5.4
V
OH
4.5 V 3.94 3.8
V
I
OH
= –
24 mA
5.5 V 4.94 4.8
IOH = – 75 mA
†
5.5 V 3.85
4.5 V 0.1 0.1
I
OL
= 50
m
A
5.5 V 0.1 0.1
V
OL
4.5 V 0.36 0.44
V
I
OL
= 24
mA
5.5 V 0.36 0.44
IOL = 75 mA
†
5.5 V 1.65
I
I
Control inputs VI = VCC or GND 5.5 V ± 0.1 ±1
m
A
I
OZ
A or B ports
‡
VO = VCC or GND 5.5 V ± 0.5 ±5
m
A
I
CC
VI = VCC or GND, IO = 0 5.5 V 8 80
m
A
D
I
CC
§
One input at 3.4 V , Other inputs at GND or V
CC
5.5 V 0.9 1 mA
C
i
Control inputs VI = VCC or GND 5 V 4.5 pF
C
io
A or B ports VO = VCC or GND 5 V 12 pF
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡
For I/O ports, the parameter IOZ includes the input leakage current.
§
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
TA = 25°C
MIN MAX
MIN
MAX
UNIT
t
w
Pulse duration, LEAB or LEBA low 4 4 ns
p
Data after LEAB or LEBA↑
2.5 2.5
tsuSetup time
Data before CEAB or CEBA↑
3 3
ns
Data after LEAB or LEBA↑
2 2
thHold time
Data after CEAB or CEBA↑
1.5 1.5
ns
74ACT11543
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS136 – D3608, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–4
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
FROM TO
TA = 25°C
PARAMETER
(INPUT) (OUTPUT)
MIN TYP MAX
MIN
MAX
UNIT
t
PLH
3.5 6.2 9.1 3.5 10.2
t
PHL
A or B
B or A
3.2 6.5 10.8 3.2 12.1
ns
t
PLH
3 6.1 10.1 3 11.2
t
PHL
LEBA
or
LEAB
A or B
3.7 7.2 11.7 3.7 13.2
ns
t
PZH
3.5 6.7 11.1 3.5 12.2
t
PZL
CEBA
or
CEAB
A or B
3.2 8.4 13.4 3.2 16
ns
t
PHZ
4.8 7.3 10.1 4.8 11
t
PLZ
CEBA
or
CEAB
A or B
5.1 7.5 10.3 5.1 11.1
ns
t
PZH
3.3 6.4 10.5 3.3 11.5
t
PZL
GBA
or
GAB
A or B
3 8 12.8 3 15.3
ns
t
PHZ
4.6 6.9 9.6 4.6 10.4
t
PLZ
GBA
or
GAB
A or B
5 7.1 9.8 5 10.5
ns
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER TEST CONDITIONS TYP UNIT
p
p
p
Outputs enabled
p
47
p
C
pd
Power
dissipation capacitance per transceiver
Outputs disabled
C
L
= 50 pF, f = 1 MHz
13
pF
74ACT11543
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS136 – D3608, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–5
PARAMETER MEASUREMENT INFORMATION
50% V
CC
1.5 V
1.5 V
1.5 V
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
Data Input
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
1.5 V 1.5 V
3 V
0 V
50% V
CC
50% V
CC
Input
(see Note B)
Out-of-Phase
Output
In-Phase
Output
Timing Input
(see Note B)
50% V
CC
VOLTAGE WAVEFORMS
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
2 × V
CC
500 Ω
500 Ω
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
CC
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5 V
1.5 V
[
V
CC
0 V
50% V
CC
20% V
CC
50% V
CC
80% V
CC
[
0 V
3 V
GND
Open
VOLTAGE WAVEFORMS
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
2 × V
CC
GND
TEST S1
3 V
0 V
1.5 V 1.5 V
t
w
VOLTAGE WAVEFORMS
Input
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
74ACT11543
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS136 – D3608, JULY 1990 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–6
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Copyright 1998, Texas Instruments Incorporated
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