Texas Instruments 74ACT11032PWR, 74ACT11032PWLE, 74ACT11032N, 74ACT11032DR, 74ACT11032DBR Datasheet

74ACT11032

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCAS008C – JULY 1987 – REVISED APRIL 1996

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Inputs Are TTL-Voltage Compatible

D

Center-Pin VCC and GND Configurations to
Minimize High-Speed Switching Noise

D

EPIC

t

(Enhanced-Performance Implanted

CMOS) 1-mm Process

D

500-mA T ypical Latch-Up Immunity at 125°C

D

Package Options Include Plastic
Small-Outline Packages (D), Plastic Shrink
Small-Outline Packages (DB), Plastic Thin
Shrink Small-Outline Packages (PW), and
Standard Plastic 300-mil DIPs (N)

description

This device contains four independent 2-input OR gates. It performs the Boolean function Y = A + B or
Y+A • B

in positive logic.

The 74ACT11032 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A B

Y

H X H
X HH
L L L

logic symbol

†

†

This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.

7

6

3

2

4B

4A

3B

3A

2B

2A

1B

1A

4Y

3Y

2Y

1Y

8

9

10

11

14

15

16

1

≥

logic diagram (positive logic)

1Y

1A
1B

2Y

2A
2B

3Y

3A
3B

4Y

4A
4B

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

1A
1Y

2Y
GND
GND

3Y

4Y

4B

1B
2A
2B
V

CC

V

CC

3A
3B
4A

D, DB, N, OR PW PACKAGE

(TOP VIEW)

Copyright  1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

EPIC is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCAS008C – JULY 1987 – REVISED APRIL 1996

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, VCC –0.5 V to 6V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to V

CC

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) –0.5 V to V

CC

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

IK

(V

I

< 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

OK

(V

O

< 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

O

(V

O

= 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package 1.3 W. . . . . . . . . . . . . . . . . . . .

DB package 0.55 W. . . . . . . . . . . . . . . . . .

N package 1.1 W. . . . . . . . . . . . . . . . . . . .

PW package 0.5 W. . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.

recommended operating conditions

MIN MAX UNIT

V

CC

Supply voltage 4.5 5.5 V

V

IH

High-level input voltage 2 V

V

IL

Low-level input voltage 0.8 V

V

I

Input voltage 0 V

CC

V

V

O

Output voltage 0 V

CC

V

I

OH

High-level output current –24 mA

I

OL

Low-level output current 24 mA

Dt/D

v Input transition rise or fall rate 0 10 ns/V

T

A

Operating free-air temperature –40 85 °C

74ACT11032

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCAS008C – JULY 1987 – REVISED APRIL 1996

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

TA = 25°C

PARAMETER

TEST CONDITIONS

V

CC

MIN TYP MAX

MIN

MAX

UNIT

4.5 V 4.4 4.4

I

OH

= –50

m

A

5.5 V 5.4 5.4

V

OH

4.5 V 3.94 3.8

V

I

OH

= –24

mA

5.5 V 4.94 4.8

IOH = –75 mA

†

5.5 V 3.85

4.5 V 0.1 0.1

I

OL

=

50

m

A

5.5 V 0.1 0.1

V

OL

4.5 V 0.36 0.44

V

I

OL

=

24 mA

5.5 V 0.36 0.44

IOL = 75 mA

†

5.5 V 1.65

I

I

VI = VCC or GND 5.5 V ±0.1 ±1

m

A

I

CC

VI = VCC or GND, IO = 0 5.5 V 4 40

m

A

D

I

CC

‡

One input at 3.4 V ,
Other inputs at GND or V

CC

5.5 V 0.9 1 mA

C

i

VI = VCC or GND 5 V 3.5 pF

†

Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.

‡

This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.

switching characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted) (see Figure 1)

FROM TO

TA = 25°C

PARAMETER

(INPUT) (OUTPUT)

MIN TYP MAX

MIN

MAX

UNIT

t

PLH

1.5 6.2 8.1 1.5 9

t

PHL

A or B

Y

1.5 4.9 7.4 1.5 8

ns

operating characteristics, V

CC

= 5 V, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT

C

pd

Power dissipation capacitance per gate CL = 50 pF, f = 1 MHz 29 pF

74ACT11032
QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCAS008C – JULY 1987 – REVISED APRIL 1996

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

LOAD CIRCUIT

From Output

Under Test

CL = 50 pF

(see Note A)

500 Ω

t

PLH

t

PHL

1.5 V 1.5 V

3 V

0 V

50% V

CC

50% V

CC

V

OH

V

OL

Input

(see Note B)

Output

VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns,

tf = 3 ns.

C. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

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