Texas ths6022 User Manual

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THS6022 250ĆmA Dual Differ ential Drivers Evaluation Module
User’s Guide
November 1998 Mixed-Signal Products
SLOU035
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IMPORTANT NOTICE
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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Related Documentation From Texas Instruments
J
THS6022 250-mA DUAL DIFFERENTIAL DRIVERS
number SLOS225). This is the data sheet for the THS6022 amplifier integrated circuit used on the EVM
J
THS4001 HIGH-SPEED LOW-POWER OPERATIONAL AMPLIFIER
for the THS4001 amplifier integrated circuit used on the EVM.
J
PowerPAD Thermally Enhanced Package
SLMA002) This is the technical brief for the special PowerPAD package in which the THS6022 amplifier IC is supplied.
(literature number SLOS206) This is the data sheet
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
Preface
(literature
(literature number
Trademarks
TI is a trademark of Texas Instruments Incorporated.
Chapter Title—Attribute Reference
iii
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iv
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Running Title—Attribute Reference
Contents
1 General Information 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Description 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Input Configuration 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 THS6022 EVM Specifications 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Using The THS6022 EVM 1-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 THS6022 EVM Performance 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 General High-Speed Amplifier Design Considerations 1-8. . . . . . . . . . . . . . . . . . . . . . . . . . .
1.8 General PowerP AD Design Considerations 1-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Reference 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 THS6022 Dual Differential Line Drivers EVM Parts List 2-2. . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 THS6022 EVM Board Layouts 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter Title—Attribute Reference
v
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Running Title—Attribute Reference
Figures
1–1 THS6022 Evaluation Module 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 THS6022 Evaluation Module Schematic 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–3 THS6022 Evaluation Module Block Diagram 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–4 THS6022 EVM Driver Frequency Response With a 50-W Load 1-7. . . . . . . . . . . . . . . . . . . . .
1–5 THS6022 EVM Driver Frequency Response Test Circuit 1-7. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–6 PowerPAD PCB Etch and Via Pattern – Minimum Requirements 1-9. . . . . . . . . . . . . . . . . . . .
1–7 Maximum Power Dissipation vs. Free-Air Temperature 1-10. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 THS6022 EVM Component Placement Silkscreen and Layout 2-3. . . . . . . . . . . . . . . . . . . . . .
2–2 THS6022 EVM PC Board: Layer 1 — Top Side Layout 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 THS6022 EVM PC Board: Layer 2 — Back Side Ground Plane Layer 2-4. . . . . . . . . . . . . . . .
2–4 THS6022 EVM PC Board: Solder Mask — Back Side 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
vi
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Chapter 1
General Information
This chapter details the Texas Instruments (TI) THS6022 250-mA Dual Differential Line Driver Evaluation Module (EVM), SLOP133. It includes a list of EVM features, a brief description of the module illustrated with a pictorial and schematic diagrams, EVM specifications, details on configuring, connecting, and using the EVM, and a discussion on high-speed amplifier and PowerP AD package design considerations.
Topic Page
1.1 Features 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Description 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Input Configuration 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 THS6022 EVM Specifications 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5 Using The THS6022 EVM 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6 THS6022 EVM Performance 1–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7 General High-Speed Amplifier Design Considerations 1–9. . . . . . . . . . .
1.8 General PowerPAD Design Considerations 1–10. . . . . . . . . . . . . . . . . .
General Information
1-1
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Features
1.1 Features
1.2 Description
THS6022 250-mA Dual Differential Driver EVM features include:
J
A Complete Client Side ADSL Differential Line Driver
J
Multiple Input Configurations Set Via On Board Jumpers
J
Includes a THS4001 High-Speed Amplifier as an Inverter
J
Standard BNC Connectors Inputs and Outputs
J
±5-V to ±15-V Operation
J
Nominal 50- Impedance Inputs
J
Pad Area On Board For User Component Placement and Testing
J
Good Example of PowerPAD Package and High-Speed Amplifier Design and Layout
The TI THS6022 250-mA Dual Differential Line Driver Evaluation Module (EVM) is a complete client side ADSL high-speed driver circuit. It consists of the TI THS6022 Dual Differential Line Driver IC, a TI THS4001 High-Speed Low-Power Operational Amplifier IC, and a number of passive parts, all mounted on a multilayer circuit board (Figure 1–1). The EVM uses standard BNC connectors for inputs and outputs and also includes a pad area for user component connection and testing. It is completely assembled, fully tested, and ready to use — just connect it to power, a signal source, and a load (if desired).
Figure 1–1.THS6022 Evaluation Module
+V
Driver 1
Input
R5 R6
J1
J4
C7
Driver 2
Input
U1
CC
L1
R1 R2
C3
R3
C5
J2
C1
+
R8
C2
C9
C13
U2
R4
R9
JP1
J6
JP2
R10
GND
+
C14
J7
C10
R13
C8
J5
R12
–V
J3
L2
Driver 1 Output
Pad1
GND
Pad2
R15
Driver 2 Output
CC
T exas Instruments
THS6022 EVM
SLOP133
Rev. B
1-2
General Information
Page 9
Input power is applied to the EVM through banana jacks J1, J2, and J3. An LC filter on each power bus isolates the EVM circuits from the external supply . The schematic for the EVM appears in Figure 1–2.
Figure 1–2.THS6022 Evaluation Module Schematic
Description
Driver 1
Input
J4
R5
1 K
Driver 2
Input
J6
J1
L1
0.22 µH
2
+
3
–15 V
15 V
7
4
6.8 µF
15 V
C5
0.1 µF
THS4001
0.1 µF
R10
49.9
6
C7
C1
U1
C6
TBD
R6
1 K
J2
C8
6.8 µF
JP1
JP2
–15 V
1
1
L2
0.22 µH
R1
49.9
R11
TBD
C12
TBD
J3
R13
1 K
49.9
R2
49.9
C4
TBD
R9
C11
TBD
R4
1 K
10
11
15 V
U2:A
3
5
THS6022
+
4
–15 V
15 V
12
+
14
–15 V
2
1
R12
1 K
U2:B
THS6022
13
R3
1 K
C3
0.1 µF C13
0.1 µF
C2
0.1 µF
C10
0.1 µF
C14
0.1 µF
C9
0.1 µF
R7
TBD
R8
49.9
Pad2
R14 TBD
R15
49.9
Driver 1
Output
J5
1 OUTPad1 GND 2 OUT
Driver 2
Output
J7
General Information
1-3
Page 10
Description
The THS6022 EVM is equipped with a separate BNC connector for the Driver 1 input and the Driver 2 input. Each input is terminated with a 50- resistor to provide correct line impedance matching (Figure 1–2). Note that using a source with a 50- output impedance will create a voltage divider at the EVM inputs. Thus, accurate knowledge of the source output characteristics is required to determine proper input signal amplitudes.
Driver outputs are routed through client side ADSL-standard 49.9- resistors to provide correct transmission line impedance matching when run through a 1:1 transformer with a 100- line termination. These resistors also allow separate receivers to view a differential input signal from the transmission line.
All of the amplifiers on the EVM (THS6022 and THS4001) follow the classic operational amplifier gain equations:
–R
Inverting Gain
Non-Inverting Gain+1
+
R
G
)
F
R
F
R
G
(1)
(2)
The gain of the amplifiers can be easily changed to support different applications by changing resistor ratios. Any of the components on the EVM board can be replaced with different values. Also, component pads have been placed in convenient locations on the PCB (shown as components with the value TBD in the schematic) to allow numerous modifications to the basic EVM configuration. However, care must be taken because the surface-mount solder pads on the board are somewhat fragile and will not survive a large number of soldering/desoldering operations.
The THS6022 IC is a current-feedback amplifier (CFB) and because of this, extra care must be taken to ensure that a feedback resistor is always included in the design. In addition, there must never be a capacitor directly in the feedback path between the noninverting input and the amplifier output. Disregarding this guideline will likely result in a part that oscillates. The THS4001 IC amplifier used on the EVM, however, is a classic voltage-feedback amplifier (VFB) and has no restrictions on resistors or capacitors in the feedback path. But, to maximize bandwidth, high value resistors and capacitors should be used with discretion.
And finally , the EVM circuit board is a good example of proper board layout for high-speed amplifier and PowerPAD designs. It can be used as a guide for user application layouts.
1-4
General Information
Page 11
1.3 Input Configuration
The THS6022 EVM inputs can be configured in several different ways to provide a wide variety of circuits to support different applications (Figure 1–3). Each of the two jumpers on the EVM is a three-pin header that is used as a SPDT switch by placing a shunt across two pins to select either of two possible signal routes.
Figure 1–3.THS6022 Evaluation Module Block Diagram
Driver 1
Input
J4
J6
Driver 2
Input
-
Jumper JP1:
J
J
U1
Inverter
THS4001
JP2
1
3
1–2 — connects the noninverting input of driver 2 (U2: B) to the THS4001 inverting amplifier (U1) output
2–3 — connects the noninverting input of driver 2 (U2: B) to the input connector (J6) when jumper JP2 is set appropriately
JP1
1
2
3
2
U2: A
THS6022
Positive Driver
U2: B
+
THS6022
Negative Driver
Input Configuration
Driver 1 Output
J5
J7
Driver 2 Output
-
Jumper JP2:
J
1–2 — connects the driver 2 input connector (J6) to the noninverting input of driver 2 (U2:B) when jumper JP1 is set appropriately
J
2–3 — connects the driver 2 input connector (J6) to the inverting input of driver 2 (U2:B) when jumper JP1 is set appropriately
For example, to use a single-ended input, jumper JP1 should be set to 1–2 and the input signal applied to input connector J4. The output of the THS6022 drivers is a differential signal due to the inverter (U1) and JP1 being set to 1–2. For a differential source, JP1 should be set to 2–3, JP2 should be set to 1–2 and the differential input signal applied between input connectors J4 and J6.
If JP2 is in the 2–3 position, components C12 and R1 1 must be installed, R9 must be removed, and a 0- resistor must be installed in the C1 1 position for proper operation.
1.4 THS6022 EVM Specifications
Supply voltage range, ±V Supply current, I Input voltage, V
I
CC
Output drive, THS6022 Drivers, I
Continuous total power dissipation at TA = 25°C (THS6022), 3.3 W, max. . . . . . . . . . . . . . . . . . .
CC
O
±5 V to ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±VCC, max. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
250 mA, typ each. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
For complete THS6022 amplifier IC specifications and parameter measurement information, and additional application information, see the THS6022 data sheet, TI Literature Number SLOS225.
General Information
1-5
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Using The THS6022 EVM
1.5 Using The THS6022 EVM
The THS6022 EVM operates from a split power supply with voltages ranging from ±5 V to ±15 V. The use of a single supply for this EVM is not recommended. As shipped, the output of driver 1 is equal to a noninverting gain of 2 when using the single-ended input mode. The output of driver 2 is equal to an inverting gain of 2 under the same conditions. An oscilloscope is typically used to view and analyze the EVM output signals.
1) Ensure that all power supplies are set to
OFF
before making power supply
connections to the THS6022 EVM.
2) Select the operating voltage for the EVM and connect appropriate split
+V
power supplies to the banana jacks on the module marked
–VCC
(J3)
.
(J1) and
CC
3) Connect the power supply ground to the module banana jack marked
GND
(J2).
4) Connect an oscilloscope to U2, pin2. This is the driver 1 amplifier output. Connecting directly to the DRIVER 1 OUTPUT BNC connector (J5) with a 50- nominal impedance cable and an oscilloscope having a 50- input termination is preferred for examining very high frequency signals.
5) Set jumper J1 to the 1–2 position.
6) Set jumper J2 to the 1–2 position.
7) Set the power supply to
ON
8) Connect a signal input to the DRIVER 1 INPUT BNC (J4).
Each input connector on this EVM is terminated with a 50- resistor to ground. With a 50- source impedance, the voltage seen by the THS6022 amplifier IC on the EVM will be 1/2 the source signal voltage applied to the EVM input connector.
9) Verify the output signal on the oscilloscope. With a high-impedance scope probe, the output signal should be twice the source amplitude. Using the 50- input impedance of an oscilloscope will show 1/2 the actual THS6022 amplifier IC output voltage. This is due to the voltage division between the source resistance and the oscilloscope 50- input impedance. When connected to J7 (Driver 2 output), the signal should be 180° phase shifted from the Driver 1 output (J5).
1-6
General Information
Page 13
THS6022 EVM Performance
1.6 THS6022 EVM Performance
Figure 1–4 shows the typical frequency response of the THS6022 EVM drivers when properly loaded. This data was collected using a single-ended input with a 100- load connected between the driver outputs, as shown in the test circuit of Figure 1–5.
Typical –3-dB bandwidth with a ±15 V power supply is 70 MHz for driver 2 and 60 MHz for driver 1. With a ± 5 V power supply, typical –3-dB bandwidth is 75 MHz for driver 2 and 70 MHz for driver 1. The dif ference between the output signals of driver 1 and driver 2 is primarily due to the high-frequency characteristics of the inverting amplifier (U1). Component values can be changed to cause the two responses to track more closely, but since ADSL signals are limited to 2 MHz and below, the high-frequency imbalance can usually be ignored.
Figure 1–4.THS6022 EVM Driver Frequency Response With a 50-Ω Load
OUTPUT LEVEL
OUTPUT LEVEL
vs
7
6 5
4 3
2 1
Output Level – dB
0
VCC = ± 5V V
= 2 V
I(PP)
–1
RL = 200 Differential JP1 : 1–2
–2
JP2 : 1–2
–3
1M 100M
FREQUENCY
10M100k
f – Frequency – Hz
Driver 1
Driver 2
500M
7
6 5 4 3
2 1
Output Level – dB
0
VCC = ± 15V V
I(PP)
–1
RL = 200 Differential JP1 : 1–2
–2
JP2 : 1–2
–3
FREQUENCY
= 2 V
1M 100M
f – Frequency – Hz
Figure 1–5.THS6022 EVM Driver Frequency Response Test Circuit
vs
10M100k
Driver 2
Driver 1
500M
GND
1 OUT
Pad 1
2 OUT
Pad 2
R
L
100
R8
49.9
User Pad Area
R15
49.9
Driver 1 Output
Driver 2 Output
General Information
J5
J7
1-7
Page 14
General High-Speed Amplifier Design Considerations
1.7 General High-Speed Amplifier Design Considerations
The THS6022 EVM layout has been designed and optimized for use with high-speed signals and can be used as an example when designing THS6022 applications. Careful attention has been given to component selection, grounding, power supply bypassing, and signal path layout. Disregard of these basic design considerations could result in less than optimum performance of the THS6022 250-mA dual differential line driver IC.
Surface-mount components were selected because of the extremely low lead inductance associated with this technology. Also, because surface-mount components are physically small, the layout can be very compact. This helps minimize both stray inductance and capacitance.
T antalum power supply bypass capacitors (C1 and C8) at the power input pads help supply currents for rapid, large signal changes at the amplifier output. The
0.1 µF power supply bypass capacitors (C2, C3, C5, and C7) were placed as
close as possible to the IC power input pins in order to keep the PCB trace inductance to a minimum. This improves high-frequency bypassing and reduces harmonic distortion. Additional 0.1 µF capacitors (C13 and C14) were placed between +V of the amplifiers.
and –VCC. This helps minimize the harmonic distortion
CC
A proper ground plane should always be used with high-speed circuit design. This provides low-inductive ground connections for return current paths. Special attention is needed for the inverting input pins. Stray capacitance at these pins can seriously degrade the performance of the amplifiers. In addition, ground plane coupling into these pins can cause noise to appear at the outputs of the amplifiers. This is especially important for the inverting pin while the amplifier is operating in the noninverting mode. Because the voltage at this pin swings directly with the noninverting input voltage, any stray capacitance would allow currents to flow into the ground plane, causing possible gain error and/or oscillation. Capacitance variations at the amplifier IC input pin of less than 1 pF can significantly affect the response of the amplifier.
In general, it is always best to keep signal lines as short and as straight as possible. Sharp 90_ corners should generally be avoided — round corners or a series of 45_ bends should be used, instead. Stripline techniques should also be incorporated when signal lines are greater than 3 inches in length. These traces should be designed with a characteristic impedance of either 50 or 75 , as required by the application. Such signal lines should also be properly terminated with an appropriate resistor.
Finally , proper termination of all inputs and outputs should be incorporated into the layout. Unterminated lines, such as coaxial cable, can appear to be a reactive load to the amplifier IC. By terminating a transmission line with its characteristic impedance, the amplifier’s load then appears to be purely resistive, and reflections are absorbed at each end of the line. Another advantage of using an output termination resistor is that capacitive loads are isolated from the amplifier output. This isolation helps minimize the reduction in amplifier phase-margin and improves the amplifier stability for improved performance such as reduced peaking and settling times.
1-8
General Information
Page 15
General PowerPAD Design Considerations
1.8 General PowerPAD Design Considerations
The THS6022 IC is mounted in a special package incorporating a thermal pad that transfers heat from the IC die directly to the PCB. The PowerP ADpackage is constructed using a downset leadframe. The die is mounted on the leadframe but is electrically isolated from it. The bottom surface of the lead frame is exposed as a metal thermal pad on the underside of the package and makes physical contact with the PCB. Because this thermal pad is in direct physical contact with both the die and the PCB, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad mounting point on the PCB.
Although there are many ways to properly heatsink this device, the following steps illustrate the recommended approach as used on the THS6022 EVM, which is built on a multilayer PCB with an internal ground plane.
1) Prepare the PCB with a top side etch pattern as shown in Figure 1–6. There should be etch for the leads as well as etch for the thermal pad.
Figure 1–6.PowerPAD PCB Etch and Via Pattern – Minimum Requirements
Thermal pad area (0.15 x 0.17) with 6 vias (Via diameter = 13 mils)
2) Place 6 holes in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept small so that solder wicking through the holes is not a problem during reflow.
3) Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This will help dissipate the heat generated from the THS6022. These additional vias may be larger than the 13 mil diame­ter vias directly under the thermal pad. They can be larger because they are not in the thermal-pad area to be soldered, therefore, wicking is gener­ally not a problem.
4) Connect all holes to the internal ground plane.
5) When connecting these holes to the ground plane, DO NOT use the typical web or spoke via connection methodology . Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. However, in this application, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the THS6022 package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated through hole.
6) The top-side solder mask should leave exposed the terminals of the
package and the thermal pad area with its 6 holes. The bottom-side solder mask should cover the 6 holes of the thermal pad area. This eliminates the solder from being pulled away from the thermal pad area during the reflow process.
General Information
1-9
Page 16
General PowerPAD Design Considerations
7) Apply solder paste to the exposed thermal pad area and all of the operational amplifier terminals.
8) With these preparatory steps in place, the THS6022 is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed.
The actual thermal performance achieved with the THS6022 in its PowerP AD package depends on the application. In the example above, if the size of the internal ground plane is approximately 3 inches × 3 inches, then the expected thermal coefficient, θ power dissipation is shown in Figure 1–7 and is calculated by the following formula:
PD+
q
T
MAX–TA
ǒ
Where:
P
= Maximum power dissipation of THS6022 (watts)
D
T
= Absolute maximum junction temperature (150°C)
MAX
T
= Free-ambient air temperature (°C)
A
θ
= θJC + θCA
JA
θ
= Thermal coefficient from junction to case (2.07°C/W)
JC
θ
= Thermal coefficient from case to ambient air
CA
JA
, is about 37.5_C/W. For a given θJA, the maximum
JA
Ǔ
Figure 1–7.Maximum Power Dissipation vs. Free-Air Temperature
MAXIMUM POWER DISSIPATION
vs
6
5
4
3
2
Maximum Power Dissipation – W
θJA = 97.7°C/W
1
2 oz Trace and Copper Pad without Solder
0
–40 –20 0 20 80 1006040
FREE-AIR TEMPERATURE
Tj = 150°C PCB Size = 3” x 3” No Air Flow
θJA = 37.5°C/W
2 oz Trace and Copper Pad with Solder
TA – Free-Air Temperature – °C
1-10
General Information
Page 17
General PowerPAD Design Considerations
Even though the THS6022 EVM PCB surface area is larger than the one in the example above, the results should correlate very well because the traces and the vias of the EVM PCB interrupt the thermal continuity of the ground plane. The THS6022 EVM is a good example of proper thermal management when using PowerP AD-mounted devices.
Correct PCB layout and manufacturing techniques are critical for achieving adequate transfer of heat away from the PowerP AD IC package. More details on proper board layout can be found in the
DIFFERENTIAL LINE DRIVER
data sheet (SLOS225). For more general
THS6022 250-mA DUAL
information on the PowerP AD package and its thermal characteristics, see the T exas Instruments Technical Brief,
PowerP AD Thermally Enhanced Package
(SLMA002).
General Information
1-11
Page 18
1-12
General Information
Page 19
Chapter 2
Reference
This chapter includes a parts list and PCB layout illustrations for the THS6022 EVM.
T opic Page
2.1 THS6022 Dual Differential Line Drivers EVM Parts List 2–2. . . . . . . .
2.2 THS6022 EVM Board Layouts 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference
2-1
Page 20
THS6022 Dual Differential Line Drivers EVM Parts List
2.1 THS6022 Dual Differential Line Drivers EVM Parts List
Table 2–1.THS6022 EVM Parts List
Reference Description Size Quantity
C1, C8 CAPACITOR, 6.8 µF, CERAMIC, 20%,
C2, C3, C5, C7, C9, C10, C13, C14
L1,L2 INDUCTOR, 0.22 µH AXIAL, THRU HOLE 2 (DELEVAN) DN41221/
J4, J5, J6, J7 JACK, BNC, PC-MOUNT (AMPHONEL) 4 (MOUSER) 523-31-5329 J1,J2,J3 JACK, BANANA RECEPTANCE, FOR 0.25
JP1, JP2 HEADER, 3 PIN, 0.1 CTRS., 0.025 SQ. PINS 2 R2, R9 RESISTOR, 49.9 OHMS, 1/10W , 1% SM 0805 2 R1, R8, R10,
R15 R3, R4, R5,
R6, R12, R13 U2 IC, THS6022CPWP 1 (TI) THS6022CPWP U1 IC, OP AMP, THS4001CD SOIC-8 1 (TI) THS4001CD R7, R14 RESISTOR, X OHMS, 1/8W, 1%, SM R11 RESISTOR, X OHMS, 1/10W, 1%, SM C4, C6, C11,
C12
PCB1 PCB, THS6022 EVM SLOP133 1
The values of these components are to be determined by the user in accordance with the application requirements.
TANTALUM, SM CAPACITOR, 0.1 µF, CERAMIC, 10%, SM 0805 8 (MuRata) GRM40-X7R104K25
DIA. HOLE
RESISTOR, 49.9 OHMS, 1/8W, 1% SM 1206 6
RESISTOR, 1 K OHM, 1/10W, 1% SM 0805 6
CAPACITOR, X µF, 10% CERAMIC
4-40 TREAD HEX STANDOFFS, 0.625 LENGTH, 0.250 O.D.
4-40 TREAD HEX STANDOFFS SCREWS 4
1206 2 0805 1 0805 4
2 (SPRAGUE) 293D685X9035D2T
2
4 (MOUSER) 534-1804
Manufacturer/Distributor
Part Number
(DIGI-KEY) DN411221-ND
2-2
Reference
Page 21
THS6022 EVM Board Layouts
2.2 THS6022 EVM Board Layouts
Board layout examples of the THS6022 EVM PCB are shown in the following illustrations. They are not to scale and appear here only as a reference.
Figure 2–1.THS6022 EVM Component Placement Silkscreen and Layout
Driver 1
Input
C6
R5 R6
Driver 2
J4
C4
C7
Input
+V
CC
J1
L1
R8
R7
R1 R2
C13
C3
R3
R4
C5
U1
JP1
J6
GND
J2
C1
+
C2
U2
C11
R9
JP2
C9
R10
R11
+
C14
C12
J7
C10
C8
J5
R13
R12
R14
–V
J3
L2
Driver 1 Output
Pad1
GND
Pad2
R15
Driver 2 Output
CC
Figure 2–2.THS6022 EVM PC Board: Layer 1 — Top Side Layout
T exas Instruments
THS6022 EVM
SLOP133
Rev. B
Reference
2-3
Page 22
THS6022 EVM Board Layouts
Figure 2–3.THS6022 EVM PC Board: Layer 2 — Back Side Ground Plane Layer
Figure 2–4.THS6022 EVM PC Board: Solder Mask — Back Side
2-4
Reference
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