TERIDIAN Semiconductor 78Q8430 User Guide

Simplifying System IntegrationTM
78Q8430
STEM Demo Board User Manual
March, 2008
Rev. 1.0
© 2008 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semi conductor Corporation. Pentium is a registered trademark of Intel Corporation. Windows is a registered trademark of Microsoft Corporation. All other trademarks are the property of their respective owners.
Teridian Semiconductor Corporation makes no warranty for the use of its products, other than expres sly contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms and Conditions. The company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein. Accordingly, the reader is cautioned to verify that this document is current by comparing it to the latest version on http://www.teridian.com or by checking with your sales representative.
Teridian Semiconductor Corp., 6440 Oak Canyon, Suite 100, Irvine, CA 92618
TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridian.com
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Table of Contents

1
Introduction ......................................................................................................................................... 5
1.1 Package Contents......................................................................................................................... 6
1.2 Safety and ESD Notes .................................................................................................................. 6
1.3 System Hardware Requirements .................................................................................................. 7
1.4 System Software Requirements ................................................................................................... 7
2 Hardware Setup ................................................................................................................................... 8
2.1 Jumper and Dip Switch Settings ................................................................................................... 8
2.2 Connections .................................................................................................................................. 9
3 Software Setup .................................................................................................................................. 11
3.1 Development (Host) PC Environment Setup .............................................................................. 11
3.2 Video Server PC Environment Setup ......................................................................................... 11
3.3 ST Microconnect Target Configuration ....................................................................................... 11
3.4 78Q8430 Software Device Driver ............................................................................................... 11
4 78Q8430 STEM Demo Board Schematic, BOM and PCB Layout ................................................. 12
5 Ordering Information ........................................................................................................................ 23
6 Related Documentation .................................................................................................................... 23
7 Contact Information .......................................................................................................................... 23
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Figures

Figure 1: 78Q8430 System Interface Diagram ............................................................................................. 6
Figure 2: 78Q8430 STEM Demo Board Jumper and Dip Switch Locations ................................................. 8
Figure 3: Demo System Hardware Connections........................................................................................... 9
Figure 4: STEM EMI Bus Interface Block Diagram ..................................................................................... 12
Figure 5: STEM EMI Bus Interface Schematic ........................................................................................... 13
Figure 6: STEM IO Bus Interface Schematic .............................................................................................. 14
Figure 7: MICTOR Diagnostic Connectors Schematic ............................................................................... 15
Figure 8: 78Q8430 MAC Interface Schematic ............................................................................................ 16
Figure 9: 78Q8430 PHY Interface Schematic ............................................................................................. 17
Figure 10: Top Silkscreen Layout ............................................................................................................... 19
Figure 11: Top Layer Layout ....................................................................................................................... 19
Figure 12: Ground Layer Layout ................................................................................................................. 20
Figure 13: Inner Layer 1 Layout .................................................................................................................. 20
Figure 14: Inner Layer 2 Layout .................................................................................................................. 21
Figure 15: VCC Layer Layout ..................................................................................................................... 21
Figure 16: Bottom Layer Layout .................................................................................................................. 22
Figure 17: Bottom Silkscreen Layout .......................................................................................................... 22

Tables

Table 1: Demo Board Jumper Options ......................................................................................................... 8
Table 2: Demo Board Dip Switch Options .................................................................................................... 8
Table 3: STEM Demo Board Bill of Materials ............................................................................................. 18
Table 4: Order Numbers and Description ................................................................................................... 23
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1 Introduction

The 78Q8430 STEM Demo Board (D8430T3B_STEM) is a design example for a 10/100BASE-TX MAC+PHY ST Microelectronics STEM daughter card. The Demo Board plugs directly into STi5100 and STi5514 Evaluation Systems. The network connection is provided by the 78Q8430 which is a single chip auto-sensing, auto-switching (auto-negotiation or parallel detect modes and auto-MDIX) 10/100BASE-TX Fast Ethernet transceiver with full duplex operation capability. The device is designed specifically for the Audio/Visual (A/V) and Set Top Box (STB) markets and is easily interfaced to available A/V and STB core processors.
The 78Q8430 is compliant with applicable IEEE-802.3 standards. MAC and PHY configuration and status registers are provided as specified by IEEE802.3u. The integrated MAC is supported by an internal 32KByte transmit and receive SRAM FIFO. The partition of transmit and receive queues are configurable through software, allowing the 78Q8430 to be tuned for specific applications. The device contains hardware support for TCP-IP checksum and ARC address recognition.
The 78Q8430 STEM Demo Board includes support for the following 78Q8430 hardware interface features:
The system bus interface operates like external memory with an active low chip select.  A configurable bus interface with support for little endian and big endian formats.  Supports an asynchronous 100 MHz (max) bus clock for STi5100/5514 o peration.  Supports 32-bit, 16-bit and 8 bit wide data bus formats.  Optional EEPROM interface for configuration data.  Two programmable LED outputs for PHY status.  Single +3.3V power supply voltage with common ground plane.
A host processor interfaces directly to the FIFO via the GBI interface. The D8430T3B_STEM board is configured for 16-bit big endian bus format by default. The bus can optionally be configured for 32-bit or 8-bit bus widths or little endian format. Figure 1 shows the 78Q8430 system interfaces.
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32-bit/16-bit/8-bit
LED
Link (Programmable)
System
Bus
Interface
Configuration
EEPROM
Interface
78Q8430
Single C hip
10/100 Ethernet
MAC & PHY
LED
Activity (Programmable)
RJ45
CAT5 Cable
Integrated RJ-45
JTAG
Interface
with 1:1
Transformer
Figure 1: 78Q8430 System Interface Diagram
This document describes the setup and configuration of the 78Q8430 STEM Demo Board. The demo board requires operation with a +3.3V power supply sourced from the STEM bus interface on the STi5100 evaluation board. The 78Q8430 PHY interfaces to a CAT5 UTP cable via a 1:1 transformer.
The supplied software driver includes support for ST/OS-20. The included 78Q8430 Softwar e Driver Development Guidelines and 78Q8430 Software User Guide for ST/OS-20 describe the software interfacing requirements for quick driver integration and prompt system evaluatio n of the 78Q8430.
Use this document with those listed in the Related Documentation section.

1.1 Package Contents

The 78Q8430 STEM Demo Board kit includes:
A 78Q8430 STEM Demo Board (D8430T3B_STEM).  A CD containing the 78Q8430 software device driver for ST/OS-20.  The following documents on CD:
78Q8430 STEM Demo Board User Manual (this document)  78Q8430 Preliminary Data Sheet 78Q8430 Layout Guidelines 78Q8430 Software Driver Development Guidelines 78Q8430 Software User Guide for ST/OS-20
The printed circuit board Gerber files are available upon request.

1.2 Safety and ESD Notes

Connecting live voltages to the demo board system will result in potentially hazardous voltages on the boards.
The demo boards are ESD sensitive! ESD precautions must be taken when handling these boards!
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1.3 System Hardware Requirements

The following describes the minimum hardware requirements for the 78Q8430 Demo Board system:
The 78Q8430 STEM Demo Board (D8430T3B_STEM).  An STi5100 Evaluation Platform (available from ST).
A software development PC with the following minimum requirements: Pentium
RAM and 40 GB hard drive running either Windows
2000 or Windows XP.
4 CPU with 256 MB
An IP Video Server PC with the following minimum requirements: Pentium 4 CPU with 256 MB RAM
and 40 GB hard drive, 10/100 ports for demo board connection, running either Windows 200 0 or Windows XP.
A 10/100Base-T hub or switch.  An ST Microconnect JTAG emulator. This device loads the IPSTB demo software into the STi5100
Evaluation Platform.
Television for viewing the video demo.

1.4 System Software Requirements

The following describes the minimum software requirements for embedded application programming using the 78Q8430 Demo Board:
ST20 Toolset: STi5100 BSP Version 2.0.5 Patch 1 (available from ST).  IPBox: contains web_server, htdocs, and video_server folders (included in the 78Q8430 ST/OS-20
driver software release package).
IPSTB application: Ipstba3_esp – 5100 (included in the 78Q8430 ST/OS-20 driver software release
package).
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2 Hardware Setup

2.1 Jumper and Dip Switch Settings

The 78Q8430 STEM Demo Board utilizes various jumpers (J5, J6, and J8) and dip switches (S3) for establishing the startup configuration of the 78Q8430 device. Figure 2 shows the location of the jumpers and dip switch. Table 1 and Table 2 describe the jumper and dip switch options. The jumper and switch numbers and settings are printed on the demo board.
Figure 2: 78Q8430 STEM Demo Board Jumper and Dip Switch Locations
Table 1: Demo Board Jumper Options
Jumper Name Setting Description
J5 Chip Select Source notCS0
notCS1
J6 Interrupt Selection notINTR0
notINTR1
J8 PMEB Selection notINTR1
PMEB Connects 78Q8430 PMEB output to board PMEB signal.
Table 2: Demo Board Dip Switch Options
S3 – Device Mode Configuration Dip Switch ( 1 = open, 0 = closed)
Position 1 (ENDIAN1)
Position 2 (ENDIAN0)
Position 1, 2:
0, 0 (default) = big endian (MSB at high bit positions) 0, 1 = bytes are little endian inside 16 bit words 1, 0 = word endian (MSW at low bit positions) 1, 1 = little endian (MSB at low bit positions)
Selects STEM notCS0 for 78Q8430 chip select signal source.
Selects STEM notCS1 for 78Q8430 chip select signal source (default).
Connects 78Q8430 interrupt output to STEM notINTR0 signal.
Connects 78Q8430 interrupt output to STEM notINTR1 signal (default).
Connects 78Q8430 PMEB output to STEM notINTR1 signal.
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