TERIDIAN Semiconductor 73S8009C User Guide

Simplifying System IntegrationTM

73S8009C

Demo Board User Manual

February 10, 2010

Rev. 1.3

UM_8009C_059

73S 8009C D emo Board User Man ual UM_8009C_059

© 2010 Teridian Semicond uctor Corporation. A ll rights reserved.
Terid i an Semiconductor Corpor ation i s a registered trademark of Teridi an Semiconductor Cor poration.
Simplifying Syst em Integrat i on is a trademark of Teridian Semi condu ct or Corporat ion .
All other t r ademar ks are the property of their respective owners.

Terid i an Semiconductor Corpor ation makes no warrant y for the use of i ts pr oducts, other than exp r essly
contained in the Company’s warranty detailed in the Teridian Semiconduct or C or poration standard Terms
and C onditi ons. The company assumes no respon sibility for any errors which may appear in this
document, reserves the right to change devices or specifi cations detailed herein at any tim e without
notice and does not make any co mm i tment to update the information contained herein. Accordingly, the
reader is cautioned to veri fy that th i s document is current by comp ar i ng it to the latest version on
http://www.teridian.com or by checking with your sales r epresentative.

Terid i an Semiconductor Corp., 6440 Oak Canyon, Suite 100 , Irvine, CA 92618

TEL [phone], FAX [phone], http://www.teridian.com

2 Rev. 1.3

UM_8009C_059 73S8009C Demo Board User Man ual

Table of Contents

1 Introduction ................................................................................................................................... 5

1.1 Packa ge Contents.................................................................................................................... 5

1.2 Safety and ESD Notes ............................................................................................................. 5

1.3 Recommend ed Operating Conditions and Absolute Maximum Ratings ..................................... 6

1.4 Notes When Using a 73S12xxF Evaluation Board .................................................................... 6

2 Connections ................................................................................................................................... 7

3 Jumpers, Switches and Test Poin t s ............................................................................................. 9

4 Design Considerations ................................................................................................................ 12

4.1 Gener al Layout Rules ............................................................................................................ 12

4.2 Optimization for C ompl i ance with EMV ................................................................................... 12

4.3 Power Supply Input Configurations ........................................................................................ 12

4.3.1 USB Power ................................................................................................................. 12

4.3.2 Single Supply Power ................................................................................................... 12

4.4 ON/OFF Switch Operation ..................................................................................................... 13

5 73S8009C Demo Board Schematics, PCB Layouts and Bill of Materials .................................. 14

5.1 Schematics ............................................................................................................................ 14

5.2 73S8009C PCB Layouts ........................................................................................................ 15

5.3 73S 8009C D emo Board Bill of Material s................................................................................. 18

6 Errata ............................................................................................................................................ 18

7 Ordering Information ................................................................................................................... 19

8 Related Documentation ............................................................................................................... 19

9 Contact Information ..................................................................................................................... 19

Revision History .................................................................................................................................. 20

Rev. 1.3 3

73S 8009C D emo Board User Man ual UM_8009C_059

Figures

Figure 1: 73S800 9C Demo Board
Figure 2: 73S800 9C Demo Board External Con nector s
Figure 3: 73S8009C Demo Board Description
Figure 4: 73S8009C Electrical Schematic
Figure 5: 73S800 9C Demo Board: Top View
Figure 6: 73S800 9C Demo Board: Bottom V iew
Figure 7: 73S8009C Demo Board: Top Signal Layer
Figure 8: 73S8009C Demo Board: Middle Layer 1, Ground Plane
Figure 9: 73S8009C Demo Board: Middle Layer 2, Supply Plane
Figure 10: 73S80 09C Demo Board: Bottom Signal Layer

Tables

Table 1: Recommended Oper ating Condi tions
Table 2: Absolute Maximum Rati ngs
Table 3: J4 Pin Descriptions
Table 4: J2 Pin Descriptions
Table 5: 73S8009C Demo Board Descr i ption
Table 6: 73S8009C Demo Board Bill of Materials
Table 7: 73S8009C Demo Board Order Number

............................................................................................................ 5

............................................................................ 7

.......................................................................................... 9

.............................................................................................. 14

.......................................................................................... 15

..................................................................................... 15

.............................................................................. 16

.......................................................... 16

........................................................... 17

....................................................................... 17

......................................................................................... 6

........................................................................................................ 6

.................................................................................................................... 7

.................................................................................................................... 8

......................................................................................... 10

................................................................................... 18

.................................................................................... 19

4 Rev. 1.3

UM_8009C_059 73S8009C Demo Board User Man ual

1 Introduction

The Teridian Semiconductor Corpor ation 73S8009C Demo Board is a platform for evaluating the Teridian
73S8009C 32-pin QFN Smart Card Interface IC . It incorporates the 7 3S8009C integrated ci r cuit, and it is
desi gned to operate either as a standalone platform (t o be used in conjunction with an external
microcontroller) or as a d aughter car d to be used in conjunction with the 73S12xxF evaluation platform.

1.1 Package Contents

Figure 1: 73S8009C Demo Board

The 73S8009C Demo Board Kit includes:

• A 73 S8009C D emo Board (R ev. 1)

• The following d ocument s:

• 73S8009C Data Sheet

• 73S8009C Demo Board User Ma n ual (this document)

1.2 Safety and ESD Notes

Connecting live voltages to the 73S8009C Demo Board system will result i n potentially hazardous
voltages on the boards.

Extreme caution should be taken when handling the 73S8009C Demo Board after
connection to live voltages!

The 73S8009C De mo Board is ESD sensitive! ESD precautions should be taken when
handling this board!

Rev. 1.3 5

73S 8009C D emo Board User Man ual UM_8009C_059

1.3 Recommended Operating Conditions and Absolute Maximum Ratings

Table 1: Recommended Operati ng Conditions

Parameter Rating

Sup ply Voltage VPC 2.7 to 6.5 VDC
Sup ply Voltage V
Sup ply Voltage V

4.4 to 5.5 VD C

BUS

4.0 to 6. 5 °C

BAT

Ambient Operating Temperature -40 °C to +85 °C

Table 2: Absolute Maximum Ratings

Parameter Rating

Sup ply Voltage V
Sup ply Voltage V

-0.5 to 6. 6 VDC

BUS

-0.5 to 6. 6 VDC

BAT

Sup ply Voltage VPC -0.5 to 6. 6 VDC
Input Voltage for Digital Inputs -0.3 to (VDD+0.5) VDC
Stor age Temp er ature -60 to 150 °C
Pin Voltag e ( except card interface) -0.3 to (VDD+0.5) VDC
Pin Voltag e ( card interface) -0.3 to (VCC+0.3) VDC
Pin Voltage, LIN pin 0.3 to 6.5 VD C
ESD Tolerance – Card interface pins ± 6 kV
ESD Tolerance – Other pins ± 2 kV
Pin Current ± 200 mA

Oper ation outsi de these r ating limits may cau se permanent damage to the d evice.
ESD test ing on Card pins is HBM condition, 3 pul ses, each pol ar ity referenced to ground .

1.4 Notes When Using a 73S12xxF Evaluation B oar d

The 73S12xxF Evaluation B oar d has two power supplies; 3.3 V and 5.0 V. Normally, t he 5.0 V supply is
tied to VPC IN on the 73S8009C board. The 73S8009C can supply the 3.3 V to the remainder of the
system by configuring the jumpers accordingly. The 73S8009C VDD output can be disconnected from
the r est of the evaluation board i f desired and the 3.3 V supply on the 73S12xxF Evalu ation Board ca n be
used. See t he jump er descri ptions for more details.

6 Rev. 1.3