The 78Q2120C09-DB is a design example for a
10/100BASE-TX Mbit/second Fast Ethernet MII
Interface adaptor. The 78Q2120C09 transceiver
provides the network physical interface and MII
(Medium Independent Interface) interface.
Teridian Semiconductor’s 78Q2120C09 is an autosensing, auto-switching 10/100BASE-TX Fast
Ethernet transceiver with full duplex operation
capability. The device interfaces directly to the
IEEE-802.3u MII port. Full-featured MII
management functions are included along with an
extended register set. A five bit configurable PHY
address is provided for multiple PHY architectures.
The 78Q2120C09 interfaces to CAT5 UTP cable via
a 1:1 transformer.
The transceiver’s transmitter includes on-chip the
pulse shaper and low power line driver. The
receiver incorporates a sophisticated combination of
real-time adaptive equalization, an adaptive DC
offset adjustment circuit and baseline wander
correction. Smart squelch circuitry further improves
the receiver’s noise rejection. Full featured autonegotiation or parallel detect modes are supported.
Using 0.18µm CMOS technology, the 78Q2120C09
operates at +3.3V. Intelligent power management
and power down modes minimize power
consumption. The demo board requires operation
with a +3.3V power supply.
Design Kit contains:
√ 78Q2120C09 MII Demo Board
√ Demo Board Parts List
√ P.C.B. Gerber Files
√ Demo Board schematic
√ 78Q2120C09 Data Sheet
Pin Assignment:
(40 Pin Male Subminiature D, 0.050)
Pin
Signal Pin Signal
1 +3.3V 21 +3.3V
2 MDIO 22 COMMON
3 MDC 23 COMMON
4 RXD3 24 COMMON
5 RXD2 25 COMMON
6 RXD1 26 COMMON
7 RXD0 27 COMMON
8 RXDV 28 COMMON
9 RXCLK 29 COMMON
10 RXER 30 COMMON
11 TXER 31 COMMON
12 TXCLK 32 COMMON
13 TXEN 33 COMMON
14 TXD0 34 COMMON
15 TXD1 35 COMMON
16 TXD2 36 COMMON
17 TXD3 37 COMMON
18 COL 38 COMMON
19 CRS 39 COMMON
20 +3.3V 40 +3.3V
Switch Positions
The OFF switch position sets a logic level = “1” and conversely, the ON position sets a logic level = “0”.
Some DIP switch markings are different.
ON equals CLOSED.
OFF equals OPEN.
For normal operation switch SW2 should be set as follows:
ISO ON
ISODEF ON
TEST ON
PAD4:0 PHY Address = 0, the 78Q2120C09 responds to all accesses
PHY Address = non-zero, the 78Q2120C09 responds only to its unique address
For normal operation the following SW1 switches should be set as follows:
N/U OFF (not used)
PCSBP ON
PWRDN ON
Switch SW1 positions ANEGA and TECH0:2 set the line interface technology capabilities.
Refer to the data sheet for a complete description.
For full Auto-Negotiation capabilities, set ANEGA and TECH0:2 to OFF.
Use With the Netcom Smart-Bits
The Netcom expects to be the master and defaults to 100BASE-TX Half-Duplex operation. To allow Fast-Ether
Windows to reconfigure the 78Q2120C09’s control register MR0 bits, set ANEGA and TECH0:2 all to OFF. If the
78Q2120C09’s technology pins are set to anything else, the 78Q2120C09 will disable some modes and prevent
the Netcom from reconfiguring the 78Q2120C09 and data errors may be observed.
After initialization the 78Q2120C09 defaults to 100BASE-TX Full-Duplex operation. When connected to another
fully capable transceiver, the transceivers will be in full-duplex mode. The default configuration of the Netcom is
100BASE-TX Half-Duplex operation. If data transfers were to commence, the Netcom would display Collision
errors (because it does not automatically read the transceivers and reconfigure).
If a transceiver is used which defaults to 100BASE-TX Half-Duplex operation, the 78Q2120C09 will adjust itself
for half-duplex operation (assuming the 78Q2120C09 is setup for the proper technologies).
To establish proper operation between the 78Q2120C09 and the Netcom, click on the “Options” button followed
by selecting “Full Duplex MII”. Repeat selecting “Full Duplex MII” twice to ensure that everything is configured
identically.
The 78Q2120C09 can be configured for half-duplex operation (ANEGA = ON and TECH0:2 = ON, OFF, ON) to
minimize incompatibilities with other transceivers and the Netcom.
The line interface for the 78Q2120C09 requires a pair of 1:1 isolation transformers. Integrated common-mode
chokes are recommended for satisfying FCC radiated EMI requirements. Additional filtering is not required with
the 78Q2120C09 due to internal waveform shaping circuitry. The line transformer characteristics are outlined
below:
Name Value Condition
Turns Ratio 1 CT : 1 CT
Open-Circuit Inductance 350 µH (min)
See Note 1.
Leakage Inductance 0.40 µH (max) @ 1 Mhz (min)
Inter-Winding Capacitance 25 pF (max)
D.C. Resistance 0.9 ohm (max)
Insertion Loss 1.1 dB (typ) 0 - 100 Mhz
HIPOT 1500 Vrms
Note 1: The receive line transformer’s Open-Circuit Inductance can be as low as 100 µH for the 78Q2120C09.
The 78Q2120C09 incorporates baseline wander correction circuitry which allows the receiver to track the
incoming data signal when there is excessive transformer droop.
For Commercial Temperature (0°C ~ 70°C)
Teridian Semiconductor has performed line testing with the following transformers and found their performance
acceptable with the 78Q2120C09:
Manufacturer
Part Number
TDK TLA-6T103
Bel-Fuse S558-5999-46
Halo TG22-3506ND
Pulse PE-68515
Valor ST6118
YCL 20PMT04
The following transformers are low profile packages (0.100 in/2.5 mm or less).
TDK TLA-6T118
Halo TG110-S050
PCA EPF8023G
1. The letters stand for different footprint drawings
2. Lower case is for the tab-down version. Upper case is for tab-up version.
3. The compatible connectors are labeled with the same letter.
The above evaluations were performed using Netcom’s Smart-Bits Fast Ethernet Analyzer. The Teridian
Semiconductor 78Q2120C09 MII Adapter and Lancast Fast Ethernet Adapter were attached to the Netcom’s
Ports A & B respectively. Twisted pair Category 5 General Cable P/N 459360 was used to connect the two
transceivers. 100 Mbps performance was measured using cable lengths of both 12 inches and 115 meters. 10
Mbps performance was evaluated using 100 meters of Category 3 cable.
The Netcom was configured to use the Baseline Wander Packet file. Packet length was 1500 bytes.
All transformers listed above met or exceeded IEEE’s 802.3 Bit Error Rate requirements of 10