Terasic ALTERA VEEK-MT, MTLC User Manual
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CONTENTS
CHAPTER 1
INTRODUCTION OF THE VEEK-MT..............................................................................1
1.1 About the Kit ..............................................................................................................................................5
1.2 Setup License for Terasic Multi-touch IP...................................................................................................6
1.3 Getting Help...............................................................................................................................................7
CHAPTER 2
ARCHITECTURE ..........................................................................................................8
2.1 Layout and Components.............................................................................................................................8
2.2 Block Diagram of the VEEK-MT-MT........................................................................................................9
CHAPTER 3
USING VEEK-MT
............................................................................................................10
3.1 Configuring the Cyclone IV E FPGA.......................................................................................................10
3.2 Bus Controller ..........................................................................................................................................13
3.3 Using the 7” LCD Capacitive Touch Screen............................................................................................14
3.4 Using 5-megapixel Digital Image Sensor.................................................................................................16
3.5 Using the Digital Accelerometer..............................................................................................................17
3.6 Using the Ambient Light Sensor ..............................................................................................................17
3.7 Using Terasic Multi-touch IP ...................................................................................................................18
CHAPTER 4
VEEK-MT DEMONSTRATIONS
.................................................................................20
4.1 System Requirements...............................................................................................................................20
4.2 Factory Configuration ..............................................................................................................................20
4.3 Painter Demonstration..............................................................................................................................21
4.4 Picture Viewer..........................................................................................................................................25
4.5 Video and Image Processing.....................................................................................................................27
4.6 Camera Application..................................................................................................................................30
4.7 Video and Image Processing for Camera..................................................................................................33
4.8 Digital Accelerometer Demonstration......................................................................................................36
CHAPTER 5
APPLICATION SELECTOR
............................................................................................39
5.1 Ready to Run SD Card Demos.................................................................................................................39
5.2 Running the Application Selector.............................................................................................................40
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5.3 Application Selector Details.....................................................................................................................40
5.4 Restoring the Factory Image ....................................................................................................................42
CHAPTER 6
APPENDIX
....................................................................................................................45
6.1 Revision History.......................................................................................................................................45
6.2 Copyright Statement.................................................................................................................................45
Chapter 1
Introduction
The Video and Embedded Evaluation Kit - Multi-touch (VEEK-MT) is a comprehensive design
environment with everything embedded developers need to create processing-based systems.
VEEK-MT delivers an integrated platform that includes hardware, design tools, intellectual
property (IP) and reference designs for developing embedded software and hardware platform in a
wide range of applications. The fully integrated kit allows developers to rapidly customize their
processor and IP to best suit their specific application. The VEEK-MT features the DE2-115
development board targeting the Cyclone IV E FPGA, as well as a capacitive LCD multimedia
color touch panel which natively supports multi-touch gestures. A 5-megapixel digital image sensor,
ambient light sensor, and 3-axis accelerometer make up the rich feature-set.
The VEEK-MT is preconfigured with an FPGA hardware reference design including several
ready-to-run demonstration applications stored on the provided SD card. Software developers can
use these reference designs as their platform to quickly architect, develop and build complex
embedded systems. By simply scrolling through the demos of your choice on the LCD touch panel,
you can evaluate numerous processor system designs.
The all-in-one embedded solution offered on the VEEK-MT, in combination of the LCD touch
panel and digital image module, provides embedded developers the ideal platform for multimedia
applications with unparalleled processing performance. Developers can benefit from the use of
FPGA-based embedded processing system such as mitigating design risk and obsolescence, design
reuse, reducing bill of material (BOM) costs by integrating powerful graphics engines within the
FPGA, and lower cost.
Figure 1-1 shows a photograph of VEEK-MT.
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Figure 1-1 Video and Embedded Development Kit – Multi-touch
The key features of the board are listed below:
DE2-115 Development Board
• Cyclone IV EP4CE115 FPGA
o 114,480 LEs
o 432 M9K memory blocks
o 3,888 Kb embedded memory
o 4 PLLs
• Configuration
o On-board USB-Blaster circuitry
o JTAG and AS mode configuration supported
o EPCS64 serial configuration device
• Memory Devices
o 128MB SDRAM
o 2MB SRAM
o 8MB Flash with 8-bit mode
o 32Kb EEPROM
• Switches and Indicators
o 18 switches and 4 push-buttons
o 18 red and 9 green LEDs
o Eight 7-segment displays
• Audio
o 24-bit encoder/decoder (CODEC)
o 3.5mm line-in, line-out, and microphone-in jacks
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• Character Display
o 16x2 LCD module
• On-board Clocking Circuitry
o Three 50MHz oscillator clock inputs
o SMA connectors (external clock input/output)
• SD Card Socket
o Provides SPI and 4-bit SD mode for SD Card access
• Two Gigabit Ethernet Ports
o Integrated 10/100/1000 Ethernet
• High Speed Mezzanine Card (HSMC)
o Configurable I/O standards (voltage levels: 3.3/2.5/1.8/1.5V)
• USB Type A and B
o Provides host and device controller compliant with USB 2.0
o Supports data transfer at full-speed and low-speed
o PC driver available
• 40-pin Expansion Port
o Configurable I/O standards (voltage levels: 3.3/2.5/1.8/1.5V)
• VGA-out Connector
o VGA DAC (high speed triple DACs)
• DB9 Serial Connector
o RS232 port with flow control
• PS/2 Connector
o PS/2 connector for connecting a PS2 mouse or keyboard
• TV-in Connector
o TV decoder (NTSC/PAL/SECAM)
• Remote Control
o Infrared receiver module
• Power
o 12V DC input
o Switching and step-down regulators LM3150MH
Capacitive LCD Touch Screen
• Equipped with an 7-inch amorphous-TFT-LCD (Thin Film Transistor Liquid Crystal Display)
module
• Module composed of LED backlight
• Supports 24-bit parallel RGB interface
• Converting the X/Y touch coordinates to corresponding digital data via Touch controller.
Table 1-1 shows the general physical specifications of the touch screen (Note*).
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Table 1-1 General Physical Specifications of the LCD
Item Specification Unit
LCD size 7-inch (Diagonal) Resolution 800 x3(RGB) x 480 dot
Dot pitch 0.1926(H) x0.1790 (V) mm
Active area 154.08 (H) x 85.92 (V) mm
Module size 164.9(H) x 100.0(V) x 5.7(D) mm
Surface treatment Glare Color arrangement RGB-stripe Interface Digital -
5-Megapixel Digital Image Sensor
• Superior low-light performance
• High frame rate
• Low dark current
• Global reset release, which starts the exposure of all rows simultaneously
• Bulb exposure mode, for arbitrary exposure times
• Snapshot-mode to take frames on demand
• Horizontal and vertical mirror image
• Column and row skip modes to reduce image size without reducing field-of-view
• Column and row binning modes to improve image quality when resizing
• Simple two-wire serial interface
• Programmable controls: gain, frame rate, frame size, exposure
Table 1-2 shows the key parameters of the CMOS sensor (Note*).
Table 1-2 Key Performance Parameters of the CMOS sensor
Parameter Value
Active Pixels 2592Hx1944V
Pixel size 2.2umx2.2um
Color filter array RGB Bayer pattern
Shutter type Global reset release(GRR)
Maximum data rate/master clock 96Mp/s at 96MHz
Full resolution Programmable up to 15 fps
Frame rate
VGA mode Programmable up to 70 fps
ADC resolution 12-bit
Responsivity 1.4V/lux-sec(550nm)
Pixel dynamic range 70.1dB
SNRMAX 38.1dB
Power 3.3V
Supply Voltage
I/O 1.7V～3.1V
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Digital Accelerometer
Digital Accelerometer
• Up to 13-bit resolution at +/- 16g
• SPI (3- and 4-wire) digital interface
• Flexible interrupts modes
Ambient Light Sensor
Ambient Light Sensor
• Approximates human-eye response
• Precise luminance measurement under diverse lighting conditions
• Programmable interrupt function with user-defined upper and lower threshold settings
• 16-bit digital output with I2C fast-mode at 400 kHz
• Programmable analog gain and integration time
• 50/60-Hz lighting ripple rejection
Note: for more detailed information of the LCD touch panel and CMOS sensor module,
please refer to their datasheets respectively.
1.1
1.1
About the Kit
About the Kit
The kit includes everything users need to run the demonstrations and develop custom designs, as
shown in Figure 1-2.
The system CD contains technical documents of the VEEK-MT which includes component
datasheets, demonstrations, schematic, and user manual.
Figure 1-2 VEEK-MT kit package contents
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1.2
1.2
Setup License for Terasic Multi-Touch IP
Setup License for Terasic Multi-Touch IP
To utilize the multi-touch panel in a Quartus II project, the Terasic Multi-Touch IP is required for
operation. Error messages will be displayed if the license file for the Multi-Touch IP is not added
before compiling projects. The license file is located at:
VEEK-MT System CD\License\license_multi_touch.dat
There are two ways to install the license. The first one is to add the license file
(license_multi_touch.dat) to the “License file” listed in Quartus II, as shown in Figure 1-3. In order
to reach this window, please navigate through to Quartus II Æ T ools Æ License Setup.
Figure 1-3 License Setup
The second way is to add license content to the existing license file. The procedures are listed
below:
Use Notepad or other text editing software to open the file license_multi_touch.dat.
1. The license contains the FEATURE lines required to license the IP Cores as shown in Figure
1-4.
Figure 1-4 Content of license_multi_touch.dat
2. Open your Quartus II license.dat file in a text editor.
3. Copy everything under license_multi_touch.dat and paste it at the end of your Quartus II
license file. (Note: Do not delete any FEATURE lines from the Quartus II license file. Doing
so will result in an unusable license file.) .
4. Save the Quartus II license file.
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1.3
1.3
Getting Help
Getting Help
Here is information of how to get help if you encounter any problem:
• Terasic Technologies
• Tel: +886-3-550-8800
• Email: support@terasic.com
Chapter 2
Architecture
This chapter describes the architecture of the Video and Embedded Evaluation Kit – Multi-touch
(VEEK-MT) including block diagram and components.
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2.1
2.1
Layout and Components
Layout and Components
The picture of the VEEK-MT is shown in Figure 2-1 and Figure 2-2. It depicts the layout of the
board and indicates the locations of the connectors and key components.
Figure 2-1 VEEK-MT PCB and Component Diagram (T op)
Figure 2-2 VEEK-MT PCB and Component Diagram (Bottom)
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2.2
2.2
Block Diagram of the VEEK-MT
Block Diagram of the VEEK-MT
Figure 2-3 gives the block diagram of the VEEK-MT board. To provide maximum flexibility for
the user, all connections are made through the Cyclone IV E FPGA device. Thus, the user can
configure the FPGA to implement any system design.
Figure 2-3 Block Diagram of VEEK-MT
Chapter 3
Using VEEK-MT
This section describes the detailed information of the components, connectors, and pin assignments
of the VEEK-MT.
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3.1
3.1
Configuring the Cyclone IV E FPGA
Configuring the Cyclone IV E FPGA
The Video and Embedded Evaluation Kit (VEEK-MT) contains a serial configuration device that
stores configuration data for the Cyclone IV E FPGA. This configuration data is automatically
loaded from the configuration device into the FPGA every time while power is applied to the board.
Using the Quartus II software, it is possible to reconfigure the FPGA at any time, and it is also
possible to change the non-volatile data that is stored in the serial configuration device. Both types
of programming methods are described below.
1. JTAG programming: In this method of programming, named after the IEEE standards Joint
Test Action Group, the configuration bit stream is downloaded directly into the Cyclone IV E
FPGA. The FPGA will retain this configuration as long as power is applied to the board; the
configuration information will be lost when the power is turned off.
2. AS programming: In this method, called Active Serial programming, the configuration bit
stream is downloaded into the Altera EPCS64 serial configuration device. It provides
non-volatile storage of the bit stream, so that the information is retained even when the power
supply to the VEEK-MT is turned off. When the board’s power is turned on, the configuration
data in the EPCS64 device is automatically loaded into the Cyclone IV E FPGA.
JTAG Chain on VEEK-MT
To use the JTAG interface for configuring FPGA device, the JTAG chain on the VEEK-MT must
form a closed loop that allows Quartus II programmer to detect the FPGA device. Figure 3-1
illustrates the JTAG chain on the VEEK-MT. Shorting pin1 and pin2 on JP3 can disable the JTAG
signals on the HSMC connector that will form a close JTAG loopback on DE2-115 (See Figure
3-2). Thus, only the on-board FPGA device (Cyclone IV E) will be detected by Quartus II
programmer. By default, a jumper is placed on pin1 and pin2 of JP3. To prevent any changes to the
bus controller (Max II EPM240) described in later sections, users should not adjust the jumper on
JP3.
Figure 3-1 JTAG Chain
Figure 3-2 JTAG Chain Configuration Header
Configuring the FPGA in JTAG Mode
Figure 3-3 illustrates the JTAG configuration setup. To download a configuration bit stream into
the Cyclone IV E FPGA, perform the following steps:
• Ensure that power is applied to the VEEK-MT
• Configure the JTAG programming circuit by setting the RUN/PROG slide switch (SW19) to
the RUN position (See Figure 3-4)
• Connect the supplied USB cable to the USB-Blaster port on the VEEK-MT
• The FPGA can now be programmed by using the Quartus II Programmer module to select a
configuration bit stream file with the .sof filename extension
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Figure 3-3 JTAG Chain Configuration Scheme
Figure 3-4 The RUN/PROG Switch (SW19) Set to JTAG Mode
Configuring the EPCS64 in AS Mode
Figure 3-5 illustrates the AS configuration set up. To download a configuration bit stream into the
EPCS64 serial configuration device, perform the following steps:
• Ensure that power is applied to the VEEK-MT
• Connect the supplied USB cable to the USB-Blaster port on the VEEK-MT
• Configure the JTAG programming circuit by setting the RUN/PROG slide switch (SW19) to
the PROG position
• The EPCS64 chip can now be programmed by using the Quartus II Programmer module to
select a configuration bit stream file with the .pof filename extension
• Once the programming operation is finished, set the RUN/PROG slide switch back to the RUN
position and then reset the board by turning the power switch off and back on; this action
causes the new configuration data in the EPCS64 device to be loaded into the FPGA chip
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