Terasic DE1-SoC-MTL2 User Manual
DE1-SoC-MTL2 User Manual
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CONTENTS
CHAPTER 1
INTRODUCTION
............................................................................................................. 3
1.1 Key Features ............................................................................................................................................... 4
1.2 About the Kit .............................................................................................................................................. 6
1.3 Power On Test ............................................................................................................................................ 7
1.4 System CD and Linux BSP ........................................................................................................................ 8
1.5 Getting Help ............................................................................................................................................... 8
CHAPTER 2
ARCHITECTURE
............................................................................................................ 9
2.1 Layout and Components ............................................................................................................................. 9
2.2 Block Diagram .......................................................................................................................................... 10
2.3 ITG Adapter .............................................................................................................................................. 11
CHAPTER 3
USING DE1-SOC-MTL2
................................................................................................ 13
3.1 Using FPGA ............................................................................................................................................. 13
3.2 Pin Definition of 2x20 GPIO Connector .................................................................................................. 13
3.3 Using LCD................................................................................................................................................ 15
3.4 Using Terasic Multi-touch IP .................................................................................................................... 17
CHAPTER 4
LINUX BSP
................................................................................................................... 20
4.1 Board Support Package ............................................................................................................................ 20
4.2 Linux Image Files ..................................................................................................................................... 21
4.3 Quarts Project ........................................................................................................................................... 21
4.4 QT Libraries ............................................................................................................................................. 22
CHAPTER 5
PAINTER DEMONSTRATION
....................................................................................... 23
5.1 Operation Description .............................................................................................................................. 23
5.2 System Description ................................................................................................................................... 25
5.3 Demonstration Setup ................................................................................................................................ 25
5.4 Demonstration Source Code ..................................................................................................................... 26
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CHAPTER 6
APPENDIX
.................................................................................................................... 27
6.1 Revision History ....................................................................................................................................... 27
6.2 Copyright Statement ................................................................................................................................. 27
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Chapter 1
Introduction
The DE1-SoC-MTL2 Development Kit is a comprehensive design environment with everything
embedded developers need to create processing-based systems. The DE1-SoC-MTL2 delivers an
integrated platform including hardware, design tools, and reference designs for developing
embedded software and hardware platforms in a wide range of applications. The fully integrated kit
allows developers to rapidly customize their processor and IP to best suit their specific application.
The DE1-SoC-MTL2 features a DE1-SoC development board targeting Altera Cyclone® V SoC
FPGA, as well as a 5-Point capacitive LCD multimedia color touch panel which natively supports
five points multi-touch and gestures.
The all-in-one embedded solution offered on the DE1-SoC-MTL2, in combination of a LCD touch
panel and digital image module, provides embedded developers the ideal platform for multimedia
applications with unparallel processing performance. Developers can benefit from the use of
FPGA-based embedded processing system such as mitigating design risk and obsolescence, design
reuse, lowering bill of material (BOM) costs by integrating powerful graphics engines within the
FPGA.
For SoC reference design in Linux for touch-screen display, please refer to the “Programming
Guide for Touch-Screen Display” document in the System CD of DE1-SoC-MTL2.
Figure 1-1 shows a photo of DE1-SoC-MTL2.
Figure 1-1 The DE1-SoC-MTL2 platform
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The key features of this kit are listed below:
Cyclone V SE SoC—5CSEMA5F31C6N
o Dual-core ARM Cortex-A9 (HPS)
o 85K programmable logic elements
o 4,450 Kbits embedded memory
o 6 fractional PLLs
o 2 hard memory controllers
Configuration Sources
o Quad serial configuration device – EPCS128 for the FPGA
o On-board USB Blaster II (normal type B USB connector)
Memory Devices
o 64MB (32Mx16) SDRAM for the FPGA
o 1GB (2x256MBx16) DDR3 SDRAM for the HPS
o microSD card socket for the HPS
Peripherals
o Two port USB 2.0 Host (ULPI interface with USB type A connector)
o UART to USB (USB Mini B connector)
o 10/100/1000 Ethernet
o PS/2 mouse/keyboard
o IR emitter/receiver
o I2C multiplexer
Connectors
o Two 40-pin expansion headers
o One 10-pin ADC input header
o One LTC connector (one Serial Peripheral Interface (SPI) master ,one I2C bus, and one
GPIO interface)
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Display
o 24-bit VGA DAC
Audio
o 24-bit CODEC, line-in, line-out, and microphone-in jacks
Video Input
o TV decoder (NTSC/PAL/SECAM) and Video-in connector
ADC
o Fast throughput rate: 1 MSPS
o Channel number: 8
o Resolution: 12-bit
o Analog input range : 0 ~ 2.5 V or 0 ~ 5V by selecting the RANGE bit in the control register
Switches, Buttons and LEDs
o 5 user keys (4 for the FPGA and 1 for the HPS)
o 10 user switches for the FPGA
o 11 user LEDs (10 for the FPGA and 1 for the HPS)
o 2 HPS reset buttons (HPS_RESET_n and HPS_WARM_RST_n)
o Six 7-segment displays
Sensor
o G-sensor for the HPS
Power
o 12V DC input
Capacitive LCD Touch Screen
o Equipped with an 7-inch Amorphous-TFT-LCD (Thin Film Transistor Liquid
Crystal Display) module
o 800x600x3(RGB) Resolution
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o 24-bit parallel RGB interface
o Supports 5-point touch
Table 1-1 shows the general physical specifications of the touch-screen (Note*).
Table 1-1 General physical specifications of the LCD
Item
Specification
Unit
LCD size
7-inch (Diagonal)
-
Resolution
800 x3(RGB) x 480
dot
Display mode
Normally White, Transmissive
-
Dot pitch
0.0642(W) x0.1790 (H)
mm
Active area
154.08 (W) x 85.92 (H)
mm
Module size
179.4(W) x 117.4(H) x 7.58(D)
mm
Surface treatment
Anti-Glare
-
Color arrangement
RGB-stripe
-
Interface
Digital
-
Backlight power
consumption
1.674(Typ.)
W
Panel power
consumption
0.22(Typ.)
W
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The kit includes everything users need to run the demonstrations and develop custom designs, as shown
in Figure 1-2.
Figure 1-2 Contents of DE1-SoC-MTL2 kit package
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The 8GB microSD card included in the kit is pre-programmed with LXDE Linux desktop. Users
can perform a power on test from the microSD card. The procedures to perform the power on test
are:
1. Please make sure the microSD card is inserted to the microSD card socket (J11) onboard.
2. Set MSEL[4:0] = 00000, as shown in Figure 1-3.
3. Plug in a USB keyboard to the USB host on the DE1-SoC board.
4. Plug in the 12V DC power supply to the DE1-SoC board.
5. Power on the DE1-SoC board.
6. The LXDE Desktop will appear on the LCD display.
7. Use the touch-screen to select the system menu, as shown in Figure 1-4.
Figure 1-3 MSEL[4:0] = 00000
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Figure 1-4 LXDE desktop on DE1-SoC-MTL2 platform
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The DE1-SoC-MTL2 System CD contains the touch-screen documentations and supporting
materials, including the user manual, reference designs, and device datasheets. Users can download
the System CD form the link: http://cd-de1-soc-mtl2.terasic.com. This site also provides the Linux
image files for creating a bootable microSD card. Table 1-1 shows the contents of DE1-SoC-MTL2
System CD. For the system CD of DE1-SoC mainboard, users can download it from the link:
http://cd-de1-soc.terasic.com.
Table 1-1 Contents of DE1-SoC-MTL2 System CD
Folder Name
Description
Datasheet
Specifications for major components on the touch-screen display module
Demonstrations
FPGA and SoC design examples
Manual
Including user manual and software programming guide
Schematic
Schematic of the touch-screen display module
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Here is the contact information should you encounter any problem:
Terasic Technologies
Tel: +886-3-575-0880
Email: support@terasic.com
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