Terasic D8M-GPIO User Manual
1
Terasic Inc.
D8M-GPIO User Manual
www.terasic.com
September 26, 2018
2
Terasic Inc.
D8M-GPIO User Manual
www.terasic.com
September 26, 2018
Chapter 1 D8M Development Kit ............................................................ 4
1.1 Package Contents ................................................................................... 4
1.2 D8M System CD ...................................................................................... 5
1.3 Assemble the Camera ............................................................................. 5
1.4 Getting Help ............................................................................................. 6
Chapter 2 Introduction of the D8M Board ............................................. 7
2.1 Features .................................................................................................. 7
2.2 Block Diagram of the D8M Board ............................................................ 8
Chapter 3 Using the D8M Board............................................................. 9
3.1 MIPI Camera Module ............................................................................... 9
3.2 MIPI Decoder ..........................................................................................11
3.3 GPIO Connector .................................................................................... 12
3.4 Clock Tree ............................................................................................. 14
3.5 Camera Configuration ............................................................................ 14
Chapter 4 RTL Example Codes ............................................................ 16
4.1 Using LINE- BUFFER ............................................................................ 16
4.2 Using FRAME - BUFFER ...................................................................... 21
Chapter 5 NIOS Based Example Codes ............................................... 24
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D8M-GPIO User Manual
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5.1 DE1_SOC and DE2-115 D8M_VIP Demonstration ................................ 24
5.2 DE1_SOC_D8Mx2_VIP Demonstration ................................................. 28
5.3 C5G_D8M_VIP Demonstration .............................................................. 34
Chapter 6 Appendix .............................................................................. 38
6.1 Revision History ..................................................................................... 38
6.2 Copyright Statement .............................................................................. 38
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Terasic Inc.
D8M-GPIO User Manual
www.terasic.com
September 26, 2018
Chapter 1
D8M Development Kit
erasic D8M is an 8 Mega Pixel Digital Camera Development Package. The user can
connect this camera module onto the FPGA development kit via the 2x20 Pin GPIO
connector for image capturing, image processing & image output.
The D8M provides the Camera Module with the high speed MIPI interface, which also
supports the simple 10Bit Parallel Bayer Pattern Data solution after the MIPI Decoder
conversion. It is able to control the D8M module by FPGA via I2C interface for output
resolution, ALBC, Frame rate, etc. The D8M also features an Auto-focus function.
We do provide demo source codes for the D8M working with different FPGA
development kits. These demos are created by using RTL & ALTERA VIP, By referring
these demos, the user can quickly learn how to work with this D8M on his/her own
application.
1.1 Package Contents
Figure 1-1 The D8M package contents
The D8M package includes:
⚫ Product Box
T
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D8M-GPIO User Manual
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September 26, 2018
⚫ System CD Download Guide
⚫ One D8M Module
⚫ 40-Pin IDC To Box Header Cable
1.2 D8M System CD
The D8M System CD contains all the documents and supporting materials associated
with D8M, including the user manual, reference designs, and device datasheets. Users
can download this system CD from the link: http://d8m.terasic.com/cd.
1.3 Assemble the Camera
Terasic D8M is able to connect on to any FPGA development kit that is equiped with a
2x20 Pin GPIO connector. The pictures below show the connections allowing the D8M
to connect to 3 different Terasic FPGA Boards:
Figure 1-2 Connect the D8M to DE2-115 board’s expansion port
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Figure 1-3 Connect the D8M to DE1-SoC board’s expansion port
Figure 1-4 Connect the D8M to C5G board’s expansion port
1.4 Getting Help
Here are the addresses where you can get help if you encounter any problems:
Terasic Technologies
9F., No.176, Sec.2, Gongdao 5th Rd, East Dist, Hsinchu City, 30070. Taiwan
Email: support@terasic.com
Tel.: +886-3-575-0880
Website: http://d8m.terasic.com
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Terasic Inc.
D8M-GPIO User Manual
www.terasic.com
September 26, 2018
Chapter 2
Introduction of the
D8M Board
2.1 Features
Figure 2 1 shows a photograph of the board.
Figure 2-1 shows a photograph of the board.
The D8M board has many features that allow users to implement a wide range of
designed circuits, from simple circuits to various multimedia projects.
The following hardware is provided on the board:
⚫ Package Interface：2x20 GPIO, 3.3V I/O-standard.
⚫ MIPI Camera Module：
◼ Chip P/N：OV8865
◼ Color Filter Arrangement：Bayer Pattern
◼ View Angel：70 °
◼ Pixels：3268x2448 (8-Mega Pixels)
◼ Frame Rate：8-Mega Pixels @30fps
◼ Support Focus Control
◼ Programmable controls for frame rate, mirror and flip, cropping, and
windowing
⚫ MIPI Decoder：
◼ Chip P/N：TC358748XBG
◼ MIPI CSI-2 Compliant
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September 26, 2018
◼ MIPI to Parallel Port Converter
◼ Supports up to 4 data lanes
◼ Package Size：73.4x60.0 mm
⚫ Package Size：73.4x60.0 mm
2.2 Block Diagram of the D8M Board
Below Figure 2-2 shows the D8M Block Diagram. MIPI Camera Module outputs 4
Lanes MIPI interface image data, which can be converted to Parallel data by passing
through the MIPI Decoder IC to the GPIO interface. Both MIPI Camera Module and
MIPI Decoder can be controlled by FPGA I2C interface.
Figure 2-2 Block diagram of D8M Board
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September 26, 2018
Chapter 3
Using the D8M Board
his chapter provides instructions on how to use the MIPI camera module, MIPI
Decoder and GPIO connector on the D8M board.
3.1 MIPI Camera Module
Terasic D8M board equips with an 8M pixel MIPI camera module named OV8865 (See
Figure 3-1). The OV8865 color image sensor is a high performance, 8 megapixel RAW
image sensor that delivers 3264x2448. It provides options for multiple resolutions while
maintaining full field of view. Users can program image resolution, frame rate, and
image quality parameters. Camera functions are controlled via I2C bus
(CAMERA_I2C_SDA and CAMERA_I2C_SCL). The I2C device address is 0x6C.
Figure 3-1 MIPI Camera Module
Figure 3-2 shows a cross-section of the image sensor array. The color filter is
arranged in a Bayer pattern. Of the 8,332,288 pixels, 7990,272 (3264x2448) are active
pixels and can be output. The other pixels are used for black level calibration and
interpolation.
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September 26, 2018
Figure 3-2 Sensor Array Region color filter Layout (From Camera Datasheet)
For more hardware description and register information about this camera module,
please refer to the datasheet named OV8865 Data Sheet.pdf in the D8M System CD.
In addition, there is a Voice Coil Motor (VCM) driver chip named VM149C on the MIPI
camera module. Users can use the same I2C bus (I2C device address is 0x18) to
modify the DAC value in the VCM driver chip that can allow the VCM to move its lens to
the desired position for getting a sharp image and realizing the Auto Focus (AF) feature.
Terasic also provides an AF demonstration and IP in the System CD. See section 4.x
for details. The datasheet of this VMC driver IC named VM149C VCM Driver IC.pdf
also can be found in the System CD.
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3.2 MIPI Decoder
The MIPI camera module output interface is MIPI interface, which cannot directly
connect to the Terasic FPGA board; therefore, a MIPI Decoder (TC358748XBG) is
added to convert MIPI interface to a parallel port interface (See Figure 3-3). Decoder
users can quickly obtain the image data and process it. MIPI Decoder can convert MIPI
Interface up to 24-bit data. The Camera module used on the D8M can only output 10
bit data, MIPI_PIXEL_D[9:0] the GPIO connector is the camera image output data bus,
and MIPI_PIXEL_D[13:10] is reserved for an alternative camera module with more
output bits.
Figure 3-3 System Overview with MIPI Decoder in CSI-2 RX to Parallel Port
Configuration
FPGA also can read/write MIPI Decoder through a I2C bus (MIPI_I2C_SDA /
MIPI_I2C_SCL ; I2C device address is 0x1C), which is different from the camera
module I2C bus. On the D8M board, MIPI Decoder can output clocks to the MIPI
camera and FPGA board. So in the demonstrations, most of them show how to control
IC PLL parameters as well as others. You can refer to section 3-4 clock tree for details.
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3.3 GPIO Connector
Figure 3-4 and Table 3-1 shows the pin out and pin definitions of the GPIO connector.
Figure 3-4 Pin-out of the 40-pin connector on D8M
Table 3-1 Pin Assignment of D8M GPIO Interface
Signal Name
Connector
Pin No.
Description
Pin Direction
I/O Standard
MIPI_PIXEL_D[0]
4
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[1]
5
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[2]
6
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[3]
7
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[4]
8
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[5]
9
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[6]
10
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[7]
13
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[8]
14
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[9]
15
Parallel Port Data
Output
3.3V
MIPI_PIXEL_D[10]
16
Reserve
Output
3.3V
MIPI_PIXEL_D[11]
17
Reserve
Output
3.3V
MIPI_PIXEL_D[12]
18
Reserve
Output
3.3V
MIPI_PIXEL_D[13]
22
Reserve
Output
3.3V
MIPI_RESET_n
27
Master Reset signal for MIPI
Input
3.3V
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