Terasic ALTERA HSMC-DVI User Manual

CONTENTS

Chapter 1 Introduction of the HSMC-DVI ................................................................................................. 2

1.1 Features........................................................................................................................................................ 2

1.2 About the KIT .............................................................................................................................................. 3

1.3 Assemble the HSMC-DVI Board ................................................................................................................ 4

Chapter 2 HSMC-DVI Card Architecture .................................................................................................. 7

2.1 Layout and Components .............................................................................................................................. 7

2.2 Block Diagram of the DVI Board ................................................................................................................ 9

Chapter 3 Board Components ............................................................................................................. 10

3.1 HSMC Expansion Connector .................................................................................................................... 10

Chapter 4 Demonstrations ................................................................................................................... 17

4.1 Introduction ............................................................................................................................................... 17

4.2 System Requirements ................................................................................................................................ 18

4.3 Hardware Setup ......................................................................................................................................... 18

4.4 Configure FPGA ........................................................................................................................................ 18

4.5 Demo Operation ........................................................................................................................................ 19

4.6 Design Concept ......................................................................................................................................... 19

Chapter 5 Appendix ............................................................................................................................. 22

5.1 Revision History ........................................................................................................................................ 22

5.2 Always Visit HSMC-DVI Webpage for New Main board ......................................................................... 22

Chapter 1

Introduction of the HSMC-DVI

The Terasic HSMC-DVI is a DVI transmitter/receiver board with a High Speed Mezzanine
Connector (HSMC) interface. It is designed to allow developers to access high quality and high
resolution video signals in their FPGA. It gives the flexibility required in high resolution image
processing systems by combining both the DVI transmitter and receiver onto the same card. Lastly,
the HSMC-DVI daughter board can be connected to any HSMC interface host boards.

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Figure 1-1 shows the photo of the HSMC-DVI board. The important features are listed below:

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 One DVI transmitter with single transmitting port
 Digital Visual Interface (DVI) Compliant
 Supports resolutions from VGA to UXGA (25 MHz – 165 MHz Pixel Rates)
 Universal Graphics Controller Interface

。 12-Bit, Dual-Edge and 24-Bit, Single-Edge Input Modes
。 Standard 3.3 V CMOS Input Signal Levels
。 Fully Differential and Single-Ended Input Clocking Modes
。 Standard Intel 12-Bit Digital Video Port Compatible as on Intel™ 81x Chipsets

 Enhanced PLL Noise Immunity

。 On-Chip Regulators and Bypass Capacitors for Reducing System Costs

 Enhanced Jitter Performance

。 No HSYNC Jitter Anomaly
。 Negligible Data-Dependent Jitter

 Programmable Using I²C Serial Interface
 Single 3.3-V Supply Operation

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 One DVI receiver with single receiving port
 Supports UXGA Resolution (Output Pixel Rates Up to 165 MHz)
 Digital Visual Interface (DVI) Specification Compliant
 True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
 Laser Trimmed Internal termination Resistors for Optimum Fixed Impedance Matching
 4x Over-Sampling
 Reduced Ground Bounce Using Time Staggered Pixel Outputs

Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging.

Figure 1-1 Layout of the DVI-HSMC card

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This section describes the package content:

 HSMC-DVI board x 1
 System CD-ROM x 1

The CD contains technical documents of the HSMC-DVI, and one reference design along with the
source code. The source code of reference design are available for the following FPGA main board:

 A5SK: Arria V Starter Kit

 S5GFP: Stratix V GX FPGA Programmable Board
 C5EFP: Cyclone V E FPGA Programmable Board
 C5GFP: Cylone V GX FPGA Programmable Board

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The Figure 1-1, Figure 1-1, Figure 1-1, and Figure 1-1 show how to connect the HSMC-DVI
daughter board to main boards.

Figure 1-2 The HSMC-DVI board connects with A5SK

Figure 1-3 The HSMC-DVI board connects with S5GFP

Figure 1-4 The HSMC-DVI board connects with C5EFP

Figure 1-2 The HSMC-DVI board connects with C5GFP

Note. Do not attempt to connect/remove the HSMC-DVI daughter board to/from the main the
main board when the power is on, or else the hardware could be damaged.

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Here are some places to get help if you encounter any problem:

• Email to [e-mail]

• Taiwan & China: [phone]

• Korea : [phone]

• Japan: [phone]