The integrated circuit U209B3, is designed as a phase
control circuit in bipolar technology. It has also protection
circuit for the supply. Due to integration of many
functions, it leads to significant cost and space saving as
Features
Internal frequency to voltage converter
Externally controlled integrated amplifier
Automatic soft start with minimised ”dead time”
Voltage and current synchronisation
Retriggering
well as increased reliability . At the same time, it gives the
designer free hand to select varieties of regulators to
choose from and switching characteristics according to its
choice.
Triggering pulse typ. 155 mA
Internal supply voltage monitoring
Temperature compensated reference source
Current requirement ≤ 3 mA
Package: DIP14, SO16
10(10)
9(9)
14(16)1(1)
Voltage / Current
detector
Control
amplifier
+
–
Automatic
retriggering
Output
pulse
Phase
control unit
= f (V12)
Frequency
Soft start
s
to voltage
converter
Supply
voltage
limitation
Reference
voltage
Voltage
monitoring
4(4)
5(5)
6(6)
3(3)
2(2)
13(15)
–V
GND
S
11(11)12(12)8(8)7(7)
95 10691
Figure 1. Block diagram – SO 16 in bracket
Rev . A1: 01.09.19951 (15)
Preliminary Information
TELEFUNKEN Semiconductors
U209B3/ U209B3–FP
L
M
1
D
18 k
BYT51J
R
1
2 W
AEG
95 10692
TW11
=
M
V
N600
10
R
230 V ~
4
pulse
Output
220
680 k
2
R
5
3.3 nF
6
2
C
3
Supply
N
F
25 V
22
1
C
S
–V
2
voltage
F
16 V
2.2
10
C
GND
voltage
limitation
Reference
13
Voltage
monitoring
converter
to voltage
Frequency
220 nF
4
C
5
C
Speed sensor
R
1 k
1 nF
5
)
12
Automatic
retriggering
4
R
470 k
Phase
= f (V
control unit
Soft start
s
C
111287
8
F
3
2.2
C
220 nF
7
R
16 V
22 k
7
C
F
16 V
8
2 M
speed
Actual
2.2
6
R
68 k
6
C
voltage
100 nF
R
3
220 k
141
9
R
47 k
detector
Voltage / Current
11
R
Set speed
voltage
10
31
R
R
100 k
100 k
56 k
Control
amplifier
10
9
C
–
+
R
9
F
2.2 /16 V
Figure 2. Block diagram with typical circuitry for speed regulation
Rev . A1: 01.09.19953 (15)
Preliminary Information
U209B3/U209B3–FP
Description
Mains Supply
The U209B is designed with voltage limiting and can
therefore be supplied directly from the mains. The supply
voltage between Pin 2 (+ pol/) and Pin 3 builds up
and R
across D
1
series resistance can be approximated using (Figure 2):
Further information regarding the design of the mains
supply can be found in the data sheets in the appendix.
The reference voltage source on Pin 13 of typ. –8.9 V
derived from the supply voltage and represents the reference level of the control unit.
Operation using an externally stabilised DC voltage is not
recommended.
If the supply cannot be taken directly from the mains
because the power dissipation in R
then the circuit shown in the following Figure 3 should be
employed.
~
24 V~
Figure 3. Supply voltage for high current requirements
Phase Control
The function of the phase control is largely identical to
that of the well known integrated circuit U211B. The
phase angle of the trigger pulse is derived by comparing
the ramp voltage, which is mains synchronised by the
voltage detector, with the set value on the control input
Pin 4. The slope of the ramp is determined by C
charging current. The charging current can be varied
using R
also be adjusted using R
on Pin 5. The maximum phase anglea
2
and is smoothed by C1. The value of the
1
VM – Vs
R1 =
2 I
S
would be too large,
1
U21 1B
123
C
R
1
.
2
1
4
5
95 10362
and its
2
max
is
can
TELEFUNKEN Semiconductors
When the potential on Pin 6 reaches the nominal value
predetermined at Pin 11, then a trigger pulse is generated
whose width t
and hence the pulse width can be evaluated by
of C
2
is determined by the value of C
p
(the value
2
assuming 8 ms/nF.
The current sensor on Pin 1 ensures that, for operation
with inductive loads, no pulse will be generated in a new
half cycle as long as current from the previous half cycle
is still flowing in the opposite direction to the supply
voltage at that instant. This makes sure that ”Gaps” in the
load current are prevented.
The control signal on Pin 11 can be in the range 0 V to
–7 V (reference point Pin 2).
= –7 V then the phase angle is at maximum = a
If V
11
max
i. e. the current flow angle is a minimum. The minimum
phase anglea
is when V
min
11
= V
pin2
.
Voltage Monitoring
As the voltage is built up, uncontrolled output pulses are
avoided by internal voltage surveillance. At the same
time, all of the latches in the circuit (phase control, soft
start) are reset and the soft–start capacitor is short
circuited. Used with a switching hysteresis of 300 mV,
this system guarantees defined start–up behaviour each
time the supply voltage is switched on or after short
interruptions of the mains supply .
Soft–Start
As soon as the supply voltage builds up (t1), the integrated
soft–start is initiated. The figure below shows the
behaviour of the voltage across the soft–start capacitor
and is identical with the voltage on the phase control input
on Pin 11. This behaviour guarantees a gentle start–up for
the motor and automatically ensures the optimum run–up
time.
is first charged up to the starting voltage Vo with
C
3
typically 30 mA current (t
charging current to approx. 4 mA, the slope of the charging
function is substantially reduced so that the rotational
speed of the motor only slowly increases. The charging
current then increases as the voltage across C
giving a progressively rising charging function which
more and more strongly accelerates the motor with
increasing rotational speed. The charging function
determines the acceleration up to the set–point. The
charging current can have a maximum value of 50 mA.
). By then reducing the
2
increases
3
Preliminary Information
Rev . A1: 31.09.19954 (15)
TELEFUNKEN Semiconductors
U209B3/ U209B3–FP
V
C3
V
1
2
V
0
t
1
t
2
Figure 4. Soft–start
t
3
t
tot
95 10272
t
Frequency to Voltage Converter
The internal frequency to voltage converter
(f/V-converter) generates a DC signal on Pin 9 which is
proportional to the rotational speed using an AC signal
from a tacho–generator or a light beam whose frequency
is in turn dependent on the rotational speed. The high
impedance input with a switch–on threshold of typ. –
100 mV gives very reliable operation even when
relatively simple tacho–generators are employed. The
tacho-frequency is given by:
n
60
p[Hz]
5
at the converter
6
(Pin 9) and the
6
.
i
is internally
f =
n = revolutions per minute
p
= number of pulses per revolution
The converter is based on the charge pumping principle.
With each negative half wave of the input signal, a
quantity of charge determined by C
amplified and then integrated by C
output on Pin 9.
, its charging voltage of Vch, R
by C
5
The conversion constant is determined
internally adjusted charge amplification G
k = G
.
C
i
.
.
R
V
5
6
ch
The analog output voltage is given by
= k . f.
V
o
whereas:V
= 6.7 V
ch
G
= 8.3
i
and C
The values of C
5
must be such that for the highest
6
possible input frequency, the maximum output voltage
does not exceed 6 V. While C
does V
R
0
on Pin 8 is approx. 6 kΩ. T o obtain good linearity of the
i
f/V converter the time constant resulting from R
is charging up the
5
and C
i
should be considerably less (1/5) than the time span of the
negative half cycle for the highest possible input
frequency. The amount of remaining ripple on the output
, C
voltage on Pin 9 is dependent on C
and the internal
5
6
charge amplification.
G
=
∆V
o
The ripple ∆V
, however, the maximum conversion speed will than
C
6
o
.
. V
C
i
can be reduced by using larger values of
5
ch
C
6
also be reduced.
The value of this capacitor should be chosen to fit the
particular control loop where it is going to be used.
Control Amplifier
The integrated control amplifier with differential input
compares the set value (Pin 10) with the instantaneous
value on Pin 9
and generates a regulating voltage on the
output Pin 11 (together with external circuitry on Pin 12)
which always tries to hold the real voltage at the value of
the set voltages. The amplifier has a transmittance of typically 110 A/V and a bipolar current source output on Pin
11 which operates with typically ±100 A. The
amplification and frequency response are determined by
R
7
, C7, C
and R
8
power divider, C
left out. Pin 9
(can be left out). For operation as a
8
, C5, R6, C6, R7, C7, C
4
should be connected with Pin 11 and Pin 7
and R
8
can be
8
with Pin 2. The phase angle of the triggering pulse can be
adjusted using the voltage on Pin 10. An internal limiting
circuit prevents the voltage on Pin 11 from becoming
more negative than V
+ 1 V.
13
Pulse Output Stage
The pulse output stage is short circuit protected and can
typically deliver currents of 125 mA. For the design of
smaller triggering currents, the function I
= f (RGT) has
GT
been given in the data sheets in the appendix.
Automatic Retriggering
The automatic retriggering prevents half cycles without
current flow, even if the triacs is turned of f earlier e.g. due
to not exactly centred collector (brush lifter) or in the
event of unsuccessful triggering. If it is necessary, another
triggering pulse is generated after a time lapse of
= 4.5 tP and this is repeated until either the triac fires
t
PP
or the half cycle finishes.
5
Rev . A1: 01.09.19955 (15)
Preliminary Information
U209B3/U209B3–FP
TELEFUNKEN Semiconductors
General Hints and Explanation of Terms
To ensure safe and trouble–free operation, the following
points should be taken into consideration when circuits
are being constructed or in the design of printed circuit
boards.
The connecting lines from C
to Pin 6 and Pin 2 should
2
be as short as possible, and the connection to Pin 2
should not carry any additional high current such as
the load current. When selecting C
, a low tempera-
2
ture coefficient is desirable.
The common (earth) connections of the set–point gen-
erator, the tacho–generator and the final interference
suppression capacitor C
of the f/V converter should
4
not carry load current.
The tacho generator should be mounted without
influence by strong stray fields from the motor.
Absolute Maximum Ratings
Reference point Pin 2, unless otherwise specified
V
Mains
Supply
V
GT
Trigger
Pulse
V
L
Load
Voltage
I
L
Load
Current
Figure 5. Explanation of terms in phase relationship
p/2p3/2p2p
t
p
t
= 4.5 t
pp
p
f
F
95 10716
ParametersSymbolValueUnit
Current requirementPin 3
t ≤ 10 ms
Synchronisation currentPin 1
Pin 14
t < 10 msPin 1
t < 10 msPin 14
–I
–i
I
syncI
I
syncV
±i
±i
f/V converter:
Input currentPin 7
t < 10 ms
I
±i
Phase control:Pin 11
Input voltage
Input current
–V
±I
Soft–start:
Input voltagePin 12
–V
Pulse output:
Reverse voltagePin 4
V
Amplifier
Input voltagePin 10–V
Pin 8 openPin 9–V
Reference voltage source
Output currentPin 13I
T
amb
amb
=45 °C
=80 °C
P
Power dissipationT
Storage temperature rangeT
Junction temperatureT
Ambient temperature rangeT
amb
eff
o
tot
stg
S
S
30
100
5
mA
mA
5
i
v
i
I
I
I
R
I
I
35
35
3
mA
13
0 to 7
500
mA
|V13| to 0V
V
to 5V
S
|VS|
|V13| to 0V
V
7.5mA
570
mW
320
–40 to +125°C
j
125
–10 to +100
Preliminary Information
Rev . A1: 31.09.19956 (15)
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