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TSS463
Technical data
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TEMIC TSS463, TSS461C Technical data

查询TS80C31X2供应商
Qualpack TSS463 / TSS461C
TSS463 VAN Van Controller Serial Interface TSS461C VAN Van Controller
TSS463/TSS461C
VAN Controllers
TEMIC SEMICONDUCTORS IS AN ATMEL COMPANY
Rev. 2 – January 1999 1
Qualpack TS80C31X2/C32X2
1. Contents
1. Contents........................................................................................................................................................ 2
2. General Information ..................................................................................................................................... 3
3. Technology Information .............................................................................................................................. 4
3.1 W
AFER PROCESS TECHNOLOGY ..................................................................................................................... 4
3.2 P
RODUCT DESIGN .......................................................................................................................................... 5
3.3 P
ACKAGE TECHNOLOGY ................................................................................................................................. 6
3.3.1 SOIC.300 16 leads ............................................................................................................................... 6
3.3.2 Other available packages .................................................................................................................... 7
3.4 T
EST ............................................................................................................................................................. 7
EVICE CROSS SECTION ................................................................................................................................8
3.5 D
3.6 W
AFER PROCESS CONTROL ........................................................................................................................... 9
4. Qualification ............................................................................................................................................... 10
HANGE PROCEDURE................................................................................................................................... 11
4.1 C
4.2 Q
UALIFICATION FLOW ................................................................................................................................... 12
AFER PROCESS QUALIFICATION ................................................................................................................. 13
4.3 W
4.4 P
ACKAGE QUALIFICATION ............................................................................................................................. 14
4.5 D
EVICE QUALIFICATION ................................................................................................................................16
4.5.1 ESD and Latch-up results .................................................................................................................. 17
4.5.2 Failure Mechanisms and Corrective Actions ..................................................................................... 17
4.5.3 Qualification status............................................................................................................................. 17
4.6 O
UTGOING QUALITY AND RELIABILITY ............................................................................................................ 18
4.6.1 AOQ (Average Outgoing Quality) ...................................................................................................... 18
4.6.2 EFR (Early Failure Rate).................................................................................................................... 19
4.6.3 LFR (Latent Failure Rate) .................................................................................................................. 19
5. User Information ........................................................................................................................................ 20
5.1 S
OLDERING RECOMMENDATIONS .................................................................................................................. 20
5.2 DRY PACK O
5.3 ESD
CAUTION .............................................................................................................................................. 20
RDERING RULES ..................................................................................................................... 20
6. Environmental Information ....................................................................................................................... 21
7. Other Data ................................................................................................................................................... 22
7.1 ISO9001 A
ATABOOK REFERENCE................................................................................................................................23
7.2 D
7.3 A
DDRESS REFERENCE .................................................................................................................................. 23
PPROVAL CERTIFICATE................................................................................................................ 22
8. Revision History......................................................................................................................................... 24
2 Rev. 2 – January 1999
Qualpack TSS463 / TSS461C
2. General Information
Product Name: TSS463 / TSS461C Function: Van Controllers
Specific features: Serial Interface (TSS463)
Wafer process: Z86E
Available plastic package types: SOIC16 (TSS463), SOIC24 (TSS461C)
Locations:
Process, product development TEMIC Semiconductors Nantes, France Wafer plant TEMIC Semiconductors Nantes, France QC responsability TEMIC Semiconductors Nantes, France Assembly ANAM, Korea, Philippines
Probe test TEMIC Semiconductors Nantes, France Final test GATEWAY Philippines
Quality Assurance TEMIC Semiconductors Nantes, France Reliability testing TEMIC Semiconductors Nantes, France Failure analysis TEMIC Semiconductors Nantes, France
Quality Assurance Management Nantes
Signed..........................................................
ANAM Korea
Rev. 2 – January 1999 3
Qualpack TS80C31X2/C32X2
3. Technology Information
3.1 Wafer Process Technology
Process type (Name): CMOS (SCMOS1/2 - Z86E) Base material: Silicon Epi substrate type
Wafer Thickness (final) 475um
Wafer diameter 150mm Number of masks 13 Gate oxide
Material Silicon dioxide
Thickness 195 A Polysilicon
Number of layers 1
Thickness 3000 A Metal
Number of layers 2
Layer 1 material TiN/W
Layer 1 thickness 600 + 5000 A Layer 2 material Ti/AlCu
Layer 2 thickness 7000 A Passivation
Material Si
Thickness 10000 A
on SiO2
3N4
4 Rev. 2 – January 1999
Qualpack TSS463 / TSS461C
3.2 Product Design
Die size (TSS463) 11.15mm2 (3610µm*3280µm) Die size (TSS461C) 8.46mm2 (3480µm*2610µm) Logic Effective channel length 0.8µm Gate poly width 0.8µm Gate poly spacing 1.2µm
Metal 1 width 1.3um Metal 1 spacing 1.5um Metal 2 width 1.6um Metal 2 spacing 1.6um
Contact size 1.0µm
Via size 1.4µm
Rev. 2 – January 1999 5
Qualpack TS80C31X2/C32X2
3.3 Package Technology
3.3.1 SOIC.300 16 leads
Package weight 0,43 g Chip separation method Sawing Lead frame
Material Cu
Thickness 10 mils
Size 270*270 mils
Lead plating Electroplated Sn/Pb 85/15 Die attach
Material Silver epoxy
Type Ablestick 84-1 LMISR4 Wire bonding
Material Gold
Diameter 33um
Method Thermosonic Molding
Material Nitto MP8000AN
Flammability rating UL94V-0 Marking
Method Printed ink
Coding example TEMIC
optional special customer marking
TSS463 YY MM
2
Dry packing No Tube packed
Primary Tube
Material Antistatic PVC
Number per unit 47
Secondary Box
Material Cardboard
Number per unit 1692
Labelling (minimum) Device type, Quantity, Date Code, Prod. code
Bar coding Code 39 to EIA-556-A
6 Rev. 2 – January 1999
Tape packed
Primary Tape
Material Antistatic PVC
Number per unit 31
Secondary Box
Material Cardboard
Number per unit 1116
Labelling (minimum) Device type, Quantity, Date Code, Prod. code
Bar coding Code 39 to EIA-556-A
3.3.2 Other available packages
No other package available
Dry packing
SOIC 16 No
SOIC 24 No
Qualpack TSS463 / TSS461C
3.4 Test
Probe equipement Sentry 15 Probe temperature 125°C
Test equipement Sentry 15 Test temperature 25°C, 125°C(sampling)
Rev. 2 – January 1999 7
Qualpack TS80C31X2/C32X2
3.5 Device Cross Section
NNNNNN
NMOS
P
PMOS
PPP
N -
Epi Substrate
Thin Oxide
Polysilicon
Planararization
Transversal Isolation Oxide
Passivation
Metal 2Metal 1
8 Rev. 2 – January 1999
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