Telit Wireless Solutions GC864-QUAD V2, GC864-DUAL V2 Hardware User's Manual

GC864 QUAD V2 and GC864 DUAL V2 Hardware User Guide

1vv0300874 Rev.1 – 2010-03-29
GC864 Hardware User Guide
1vv0300874 Rev.1 – 2010-03-29

APPLICABILITY TABLE

PRODUCT
GC864-QUAD V2
GC864-DUAL V2
GC864-QUAD V2 with SH
GC864 Hardware User Guide
1vv0300874 Rev.1 – 2010-03-29
DISCLAIMER
The information contained in this document is the proprietary information of Telit Communications S.p.A. and its affiliates (“TELIT”).
The contents are confidential and any disclosure to persons other than the officers, employees, agents or subcontractors of the owner or licensee of this document, without the prior written consent of Telit, is strictly prohibited.
Telit makes every effort to ensure the quality of the information it makes available. Notwithstanding the foregoing, Telit does not make any warranty as to the information contained herein, and does not accept any liability for any injury, loss or damage of any kind incurred by use of or reliance upon the information.
Telit disclaims any and all responsibility for the application of the devices characterized in this document, and notes that the application of the device must comply with the safety standards of the applicable country, and where applicable, with the relevant wiring rules.
Telit reserves the right to make modifications, additions and deletions to this document due to typographical errors, inaccurate information, or improvements to programs and/or equipment at any time and without notice.
Such changes will, nevertheless be incorporated into new editions of this document.
Copyright: Transmittal, reproduction, dissemination and/or editing of this document as well as utilization of its contents and communication thereof to others without express authorization are prohibited. Offenders will be held liable for payment of damages. All rights are reserved.
Copyright © Telit Communications SpA 2010.©
GC864 Hardware User Guide
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Contents

APPLICABILITY TABLE .............................................................................................................................................. 2
1. INTRODUCTION................................................................................................................................6
1.1. SCOPE .................................................................................................................................................................. 6
1.2. AUDIENCE............................................................................................................................................................. 6
1.3. CONTACT INFORMATION, SUPPORT ........................................................................................................................ 6
1.4. DOCUMENT ORGANIZATION.................................................................................................................................... 7
1.5. TEXT CONVENTIONS .............................................................................................................................................. 8
1.6. RELATED DOCUMENTS........................................................................................................................................... 8
1.7. DOCUMENT HISTORY ............................................................................................................................................. 9
2. OVERVIEW...................................................................................................................................... 10
3. GC864 MECHANICAL DIMENSIONS................................................................................................ 11
3.1. MECHANICAL VIEW OF TELIT GC864-QUAD V2 WITH SIM HOLDER..................................................................... 12
3.2. GC864-QUAD V2 / GC864-DUAL V2 MODULE CONNECTIONS...................................................................... 12
3.3. PIN-OUT........................................................................................................................................................... 13
3.3.1. GC864-QUAD V2 / GC864-DUAL V2 Antenna Connector
.................................................................. 16
4. HARDWARE COMMANDS................................................................................................................ 17
4.1. TURNING ON THE GC864-QUAD V2 / GC864-DUAL V2 ................................................................................... 17
4.2. TURNING OFF THE GC864-QUAD V2 / GC864-DUAL V2 ................................................................................. 19
4.2.1. Hardware Unconditional Restart
5. POWER SUPPLY............................................................................................................................. 22
5.1. POWER SUPPLY REQUIREMENTS ......................................................................................................................... 22
5.2. GENERAL DESIGN RULES .................................................................................................................................... 23
5.2.1. Electrical Design Guidelines
5.2.2. Thermal Design Guidelines
5.2.3. Power Supply PCB Layout Guidelines
5.2.4. Parameters for ATEX Applications
6. ANTENNA ...................................................................................................................................... 31
6.1. GSM ANTENNA REQUIREMENTS.......................................................................................................................... 31
6.2. GSM ANTENNA – INSTALLATION GUIDELINES ...................................................................................................... 32
7. LOGIC LEVEL SPECIFICATIONS...................................................................................................... 33
7.1. RESET SIGNAL .................................................................................................................................................... 34
8. SERIAL PORTS............................................................................................................................... 35
8.1. MODEM SERIAL PORT.................................................................................................................................... 35
8.2. RS232 LEVEL TRANSLATION............................................................................................................................. 37
8.3. 5V UART LEVEL TRANSLATION........................................................................................................................... 39
........................................................................................................ 20
............................................................................................................... 23
................................................................................................................. 27
............................................................................................... 28
.................................................................................................... 29
9. AUDIO SECTION OVERVIEW............................................................................................................ 41
9.1. SELECTION MODE............................................................................................................................................... 41
9.2. ELECTRICAL CHARACTERISTICS ........................................................................................................................ 43
9.2.1. Input Lines Characteristics ...................................................................................................................... 43
9.2.2. Output Lines Characteristics.................................................................................................................... 44
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10. GENERAL PURPOSE I/O ............................................................................................................. 46
10.1. GPIO LOGIC LEVELS .........................................................................................................................................47
10.2. USING A GPIO PAD AS INPUT........................................................................................................................ 48
10.3. USING A GPIO PAD AS OUTPUT .................................................................................................................... 48
10.4. USING THE RF TRANSMISSION CONTROL GPIO4..............................................................................................48
10.5. USING THE RFTXMON OUTPUT GPIO5.......................................................................................................... 48
10.6. USING THE ALARM OUTPUT GPIO6................................................................................................................... 49
10.7. USING THE BUZZER OUTPUT GPIO7................................................................................................................ 49
10.8. MAGNETIC BUZZER CONCEPTS......................................................................................................................... 50
10.8.1. Short Description
1.1.1 Frequency Behavior
10.8.2. Power Supply Influence
10.8.3. Warning
.................................................................................................................................................. 51
10.8.4. Working Current Influence
10.9. USING THE TEMPERATURE MONITOR FUNCTION............................................................................................... 52
10.9.1. Short Description
10.9.2. Allowed GPIO
10.10. INDICATION OF NETWORK SERVICE AVAILABILITY............................................................................................. 53
10.11. RTC BYPASS OUT........................................................................................................................................... 54
10.12. DAC CONVERTER............................................................................................................................................ 55
10.12.1. Description
10.12.2. Enabling DAC
10.12.3. Low Pass Filter Example
10.13. ADC CONVERTER............................................................................................................................................ 56
10.13.1. Description
10.13.2. Using ADC Converter
.................................................................................................................................. 50
..................................................................................................................................... 51
....................................................................................................................... 51
.................................................................................................................. 52
.................................................................................................................................. 52
......................................................................................................................................... 52
......................................................................................................................................... 55
..................................................................................................................................... 55
................................................................................................................. 56
......................................................................................................................................... 56
........................................................................................................................ 57
11. ASSEMBLY THE GC864-QUAD V2 / GC864-DUAL V2 ON THE BOARD .......................................... 58
11.1.1. Debug of the GC864-QUAD V2 / GC864-DUAL V2 in Production
12. PACKING SYSTEM ...................................................................................................................... 60
13. CONFORMITY ASSESSMENT ISSUES.......................................................................................... 61
14. SAFETY RECOMMENDATIONS .................................................................................................... 63
..................................................... 59

1. Introduction

1.1. Scope

The aim of this document is the description of some hardware solutions useful for developing a product with the Telit GC864-QUAD V2 / GC864-DUAL V2 module.

1.2. Audience

This document is intended for Telit customers, who are integrators, about to implement their applications using our GC864-QUAD V2 / GC864-DUAL V2 module.

1.3. Contact Information, Support

For general contact, technical support, to report documentation errors and to order manuals, contact Telit Technical Support Center (TTSC) at:
GC864 Hardware User Guide
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TS-EMEA@telit.com TS-NORTHAMERICA@telit.com TS-LATINAMERICA@telit.com TS-APAC@telit.com
Alternatively, use:
http://www.telit.com/en/products/technical-support-center/contact.php
For detailed information about where you can buy the Telit modules or for recommendations on accessories and components visit:
http://www.telit.com
To register for product news and announcements or for product questions contact Telits Technical Support Center (TTSC).
Our aim is to make this guide as helpful as possible. Keep us informed of your comments and suggestions for improvements.
Telit appreciates feedback from the users of our information.

1.4. Document Organization

This document contains the following chapters:
GC864 Hardware User Guide
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Chapter 1: “Introduction” contact and support information, and text conventions.
Chapter 2: “Overview”
Chapter 3: “GC864-QUAD V2 / GC864-DUAL V2 Mechanical Dimensions”
Chapter 4: “GC864-QUAD V2 / GC864-DUAL V2 Module Connections” pin out configuration and layout.
Chapter 5: “Hardware Commands”
Chapter 6: “Power supply”
Chapter 7: “Antenna” important parts in the full product design
Chapter 8: “Logic Level specifications” of logic levels for this module.
Chapter 9: “Serial ports” interface between the module and OEM hardware
Chapter 10: “Audio Section overview” Chip of the GC864 Telit Modules.
Chapter 11: “General Purpose I/O” configured.
Chapter 12 “DAC and ADC Section”
provides a scope for this document, target audience,
provides an overview of the document.
deals with the
How to control the module via hardware.
Power supply requirements and general design rules.
The antenna connection and board layout design are the most
Specific values adopted in the implementation
The serial port on the Telit GC864 is the core of the
Refers to the audio blocks of the Base Band
How the general purpose I/O pads can be
Deals with these two kind of converters.
Chapter 13: Mounting the GC864-QUAD V2 / GC864-DUAL V2 on the application board Recommendations and specifics on how to mount the module on the users board.

1.5. Text Conventions

Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur.
Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction.
Tip or Information – Provides advice and suggestions that may be useful when
integrating the module.
GC864 Hardware User Guide
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All dates are in ISO 8601 format, i.e. YYYY-MM-DD.

1.6. Related Documents

Telit's GSM/GPRS Family Software User Guide, 1vv0300784
Audio settings application note , 80000NT10007a
Digital voice Interface Application Note, 80000NT10004a
Product description, 80331ST10074a
SIM Holder Design Guides, 80000NT10001a
AT Commands Reference Guide, 80000ST10025a
Telit EVK2 User Guide, 1vv0300704

1.7. Document History

RReevviissiioonn DDaattee
ISSUE#0 2010-01-25 Release First ISSUE# 0 ISSUE#1 2010-03-29 Updated Par.4.1, Par.5.1, Par.6.1
CChhaannggeess
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2. Overview

In this document all the basic functions of a mobile phone are taken into account; for each one of them a proper hardware solution is suggested and eventually the wrong solutions and common errors to be avoided are evidenced. Obviously this document cannot embrace the whole hardware solutions and products that may be designed. The wrong solutions to be avoided shall be considered as mandatory, while the suggested hardware configurations shall not be considered mandatory, instead the information given shall be used as a guide and a starting point for properly developing your product with the Telit GC864-QUAD V2 / GC864-DUAL V2 module. For further hardware details that may not be explained in this document refer to the Telit GC864-QUAD V2 / GC864-DUAL V2 Product Description document where all the hardware information is reported.
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NOTICE:
(EN) The integration of the GSM/GPRS GC864-QUAD V2 / GC864-DUAL V2 cellular module within user application shall be done according to the design rules described in this manual.
The information presented in this document is believed to be accurate and reliable. However, no responsibility is assumed by Telit Communications S.p.A. for its use, or any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent rights of Telit Communications S.p.A. other than for circuitry embodied in Telit products. This document is subject to change without notice.
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3. GC864 Mechanical Dimensions

The Telit GC864-QUAD V2 / GC864-DUAL V2 module overall dimensions are:
Length: 36.2 mm
Width: 30 mm
Thickness: 3.2 mm
Weight: 4.8g
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GC864 Hardware User Guide
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3.1. Mechanical View of Telit GC864-QUAD V2 with SIM Holder

3.2. GC864-QUAD V2 / GC864-DUAL V2 Module Connections

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3.3. PIN-OUT

The GC864-QUAD V2 / GC864-DUAL V2 uses a 80 pin Molex p.n. 53949-0878 male connector for the connections with the external applications. This connector matches the 54150-0878 models.
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Pin Signal I/O Function
Power Supply
1 VBATT - Main power supply Power
2 VBATT - Main power supply Power
3 VBATT - Main power supply Power
4 VBATT - Main power supply Power
5 GND - Ground Power
6 GND - Ground Power
7 GND - Ground Power
Audio
8 AXE I Handsfree switching 100KΩ CMOS 2.8V
9 EAR_HF+ AO Handsfree ear output, phase + Audio
10 EAR_HF- AO Handsfree ear output, phase - Audio
11 EAR_MT+ AO Handset earphone signal output, phase + Audio
12 EAR_MT- AO Handset earphone signal output, phase - Audio
13 MIC_HF+ AI Handsfree microphone input; phase Audio
14 MIC_HF- AI Handsfree microphone input; phase Audio
15 MIC_MT+ AI Handset microphone signal input; phase+ Audio
16 MIC_MT- AI Handset microphone signal input; phase- Audio
SIM Card Interface
181 SIMVCC - External SIM signal – Power supply for the SIM 1.8 / 3V
19 SIMRST O External SIM signal – Reset 1.8 / 3V
20 SIMIO I/O External SIM signal - Data I/O 1.8 / 3V
21 SIMIN I External SIM signal - Presence (active low) 47KΩ 1.8 / 3V
22 SIMCLK O External SIM signal – Clock 1.8 / 3V
Trace
23 RX_TRACE I RX Data for debug monitor CMOS 2.8V
24 TX_TRACE O TX Data for debug monitor CMOS 2.8V
Servicepinshallbeusedtoupgradethe modulefromASC1(RX_TRACE,
47 SERVICE I
Prog. / Data + Hw Flow Control
TX_TRACE). Thepinshallbetiedlowtoenablethefeature onlyincaseofa SWUpdateactivity.Itis required,fordebugpurpose,tobeconnected toatestpadonthefinalapplication.
Internal Pull up
CMOS 2.8V
Type
1
On this line a maximum of 10nF bypass capacitor is allowed
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Pin Signal I/O Function
25 C103/TXD I Serial data input (TXD) from DTE CMOS 2.8V
26 C104/RXD O Serial data output (RXD) to DTE CMOS 2.8V
27 C107/DSR O Output for Data set ready signal (DSR) to DTE CMOS 2.8V
28 C106/CTS O Output for Clear to send signal (CTS) to DTE CMOS 2.8V
29 C108/DTR I Input for Data terminal ready signal (DTR) from DTE CMOS 2.8V
30 C125/RING O Output for Ring indicator signal (RI) to DTE CMOS 2.8V
31 C105/RTS I Input for Request to send signal (RTS) from DTE CMOS 2.8V
32 C109/DCD O Output for Data carrier detect signal (DCD) to DTE CMOS 2.8V
DAC and ADC
37 ADC_IN1 AI Analog/Digital converter input A/D
38 ADC_IN2 AI Analog/Digital converter input A/D
39 ADC_IN3 AI Analog/Digital converter input A/D
40 DAC_OUT AO Digital/Analog converter output D/A
Miscellaneous Functions
45 STAT_LED O Status indicator led CMOS 1.8V
46 GND - Ground Ground
49 PWRMON O Power ON Monitor CMOS 2.8V
Input command for switching power ON or OFF (toggle command). The
53 ON/OFF* I
54 RESET* I Reset input
55 VRTC AO VRTC Backup capacitor Power
Telit GPIO / DVI
36 DVI_CLK - DVI_CLK (Digital Voice Interface Clock) CMOS 2.8V
59 TGPIO_04/TXCNTRL I/O Telit GPIO4 Configurable GPIO / RF Transmission Control CMOS 2.8V
63 TGPIO_10/DVI_TX I/O Telit GPIO10 Configurable GPIO / DVI_TX (Digital Voice Interface) CMOS 2.8V
65 DVI_RX I/O DVI_RX (Digital Voice Interface) CMOS 2.8V
66 TGPIO_03 I/O Telit GPIO3 Configurable GPIO CMOS 2.8V
67 TGPIO_08 I/O Telit GPIO8 Configurable GPIO CMOS 2.8V
68 TGPIO_06 / ALARM I/O Telit GPIO6 Configurable GPIO / ALARM CMOS 2.8V
70 TGPIO_01 I/O Telit GPIO1 Configurable GPIO CMOS 2.8V
71 DVI_WAO I/O DVI_WAO (Digital Voice Interface) CMOS 2.8V
73 TGPIO_07 / BUZZER I/O Telit GPIO7 Configurable GPIO / Buzzer CMOS 2.8V
74 TGPIO_02 / JDR I/O Telit GPIO02 I/O pin / Jammer detect report CMOS 2.8V
76 TGPIO_09 I/O Telit GPIO9 Configurable GPIO CMOS 2.8V
78 TGPIO_05/ RFTXMON I/O Telit GPIO05 Configurable GPIO / Transmitter ON monitor CMOS 2.8V
RESERVED
17 Reserved -
33 Reserved -
34 Reserved -
pulse to be sent to the GC864-QUAD V2 / GC864-DUAL V2 must be equal or greater than 1 second.
Internal Pull up
47KΩ Pull up to VBATT
Type
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Pin Signal I/O Function
35 Reserved -
41 Reserved -
42 Reserved -
43 Reserved -
44 Reserved -
48 Reserved
50 Reserved -
51 Reserved
52 Reserved
56 Reserved
57 Reserved
58 Reserved
60 Reserved
61 Reserved
62 Reserved
64 Reserved
69 Reserved -
72 Reserved
75 Reserved
77 Reserved
79 Reserved -
80 Reserved -
-
-
-
-
-
-
-
-
-
-
-
-
-
Internal Pull up
Type
NOTE:
The GC864-QUAD V2 / GC864-DUAL V2 Modules has one DVI ports on the system interface.
NOTE:
Reserved pins must not be connected.
NOTE:
RTS must be connected to the GND (on the module side) if flow control is not used.
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NOTE:
If not used, almost all pins must be left disconnected. The only exceptions are the following pins:
Pin Signal Function
1 VBATT Main power supply
2 VBATT Main power supply
3 VBATT Main power supply
4 VBATT Main power supply
5 GND Ground
6 GND Ground
7 GND Ground
46 GND Ground
25 C103/TXD Serial data input (TXD) from DTE
26 C104/RXD Serial data output to DTE
31 C105/RTS Input for Request to send signal (RTS) from DTE
53 ON/OFF* Input command for switching power ON or OFF (toggle command).
54 RESET* Reset input
23 RX_TRACE RX Data for debug monitor
24 TX_TRACE TX Data for debug monitor
47 SERVICE SERVICE connection

3.3.1. GC864-QUAD V2 / GC864-DUAL V2 Antenna Connector

The GC864-QUAD V2 / GC864-DUAL V2 module is equipped with a 50 RF connector from Murata, GSC type P/N MM9329-2700B. The counterpart suitable is Murata MXTK92 Type or MXTK88 Type.
Moreover, the GC864-QUAD V2 / GC864-DUAL V2 has the antenna pads on the back side of the PCB. This allows the manual soldering of the coaxial cable directly on the back side of the PCB. However, the soldering is not an advisable solution for a reliable connection of the antenna.
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4. Hardware Commands

4.1. Turning ON the GC864-QUAD V2 / GC864-DUAL V2

To turn the GC864-QUAD V2 / GC864-DUAL V2 on, the pad ON# must be tied low for at least 1000ms and then released. A pulse duration less than 1000ms should also start the power on procedure, but this is not guaranteed.
The maximum current that can be drained from the ON# pad is 0,1 mA.
A simple circuit to do it is:
TIP:
To check if the device has powered on, the hardware line PWRMON must be monitored. After 1000ms the line raised up the device could be considered powered on.
NOTE:
Do not use any pull up resistor on the ON# line, it is internally pulled up. Using pull up resistor may bring to latch up problems on the GC864-QUAD V2 / GC864-DUAL V2 power regulator and improper power on/off of the module. The line ON# must be connected only in open collector configuration.
In this document all the lines that are inverted, hence have active low signals are labeled with a name that ends with a "#" or with a bar over the name.
NOTE: When the power supply voltage is lower than 3.4V, to turn ON the module, the pad ON# must be tied low for at least 3 seconds.
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For example:
1- Let us assume you need to drive the ON# pad with a totem pole output of a +3/5 V
microcontroller (uP_OUT1):
2- Let us assume you need to drive the ON# pad directly with an ON/OFF button:
A flow chart with proper turn on procedure is detailed below:
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4.2. Turning OFF the GC864-QUAD V2 / GC864-DUAL V2

Turning off of the device can be done in three ways:
by software command (see GC864-QUAD V2 / GC864-DUAL V2 Software User Guide)
by tying low pin ON#
Either ways, the device issues a detach request to network informing that the device will not be reachable any more. To turn OFF the GC864 via pin ON#, this must be tied low for at least 1000ms and then released. The same circuitry and timing for the power on shall be used. The device shuts down after the release of the ON# pin.
The following flow chart shows the proper turnoff procedure:
TIP:
To check if the device has powered off, the hardware line PWRMON must be monitored. When PWRMON goes low, then the device has powered off.
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4.2.1. Hardware Unconditional Restart

WARNING:
The hardware unconditional Restart must not be used during normal operation of the device since it does not detach the device from the network. It shall be kept as an emergency exit procedure to be done in the rare case that the device gets stacked waiting for some network or SIM responses.
To unconditionally Restart the GC864-QUAD V2 / GC864-DUAL V2, the pad RESET# must be tied low for at least 200 ms and then released.
The maximum current that can be drained from the RESET# pad is 0,15 mA.
A simple circuit to do it is:
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NOTE:
Do not use any pull up resistor on the RESET* line nor any totem pole digital output. Using pull up resistor may cause latch up problems on the GC864-QUAD V2 / GC864­DUAL V2 power regulator and improper functioning of the module. The line RESET* must be connected only in open collector configuration.
TIP:
The unconditional hardware reboot must always be implemented on the boards and the software must use it as an emergency exit procedure.
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In the following flow chart is detailed the proper restart procedure:
For example:
1- Let us assume you need to drive the RESET# pad with a totem pole output of a
+3/5 V microcontroller (uP_OUT2):
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5. Power Supply

The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performances, hence read carefully the following requirements and guidelines for a proper design.

5.1. Power Supply Requirements

Condition Value
Nominal Supply Voltage 3.80 V Normal operating Voltage Range 3.40 V - 4.20 V Extended operating Voltage Range 3.22 V – 4.50 V
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The GC864-QUAD V2 / GC864-DUAL V2 power consumptions are:
Mode
SWITCHED OFF
Switched Off <62 uA
AT+CFUN=1 19.0 AT+CFUN=4 18.0
AT+CFUN=0 or =5
CSD TX and RX mode
GSM900 CSD PL5 300 DCS1800 CSD PL0 200
GPRS (class 10) 1TX
GSM900 PL5 260 DCS1800 PL0 170
GPRS (class 10) 2TX
GSM900 PL5 470 DCS1800 PL0 300
GC864-QUAD V2 / GC864-DUAL V2
Average
(mA)
Module supplied but Switched Off
IDLE mode
Normal mode: full functionality of the module Disabled TX and RX; module is not registered on the network
3.9 Paging Multiframe 2
2.9 Paging Multiframe 4
2.1 Paging Multiframe 6
1.9 Paging Multiframe 8
1.6 Paging Multiframe 9
GSM VOICE CALL
GPRS Sending data mode
GPRS Sending data mode
Mode description
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The GSM system is made in a way that the RF transmission is not continuous but it is packed into bursts at a base frequency of about 216 Hz. The relative current peaks can be as high as about 2A. Therefore the power supply has to be designed in order to withstand with these current peaks without big voltage drops; this means that both the electrical design and the board layout must be designed for this current flow.
If the layout of the PCB is not well designed, then a strong noise floor is generated on the ground and the supply; this will reflect on all the audio paths producing an audible and annoying noise at 216 Hz; if the voltage drop during the peak current absorption is too much, then the device may even shutdown as a consequence of the supply voltage drop.
TIP:
The power supply must be designed so that it is capable of a peak current output of at least 2 A.
TIP: the supply voltage is directly measured between VBATT and GND pins. It must stay within the Wide Supply Voltage tolerant range including any drop voltage and overshoot voltage (during the slot tx, for example).
NOTE: The Operating Voltage Range MUST never be exceeded also in power off condition; care must be taken in order to fulfill min/max voltage requirement
NOTE: When the power supply voltage is lower than 3.4V, to turn ON the module, the pad ON# must be tied low for at least 3 seconds.

5.2. General Design Rules

The principal guidelines for the Power Supply Design embrace three different design steps:
the electrical design
the thermal design
the PCB layout.

5.2.1. Electrical Design Guidelines

The electrical design of the power supply depends strongly from the power source where this power is drained. We will distinguish them into three categories:
+5V input (typically PC internal regulator output)
+12V input (typically automotive)
Battery
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5.2.1.1. +5V input Source Power Supply Design Guidelines
The desired output for the power supply is 3.8V, hence there is no big difference between the input source and the desired output. A linear regulator can be used. A switching power supply will not be suited because of the low drop out requirements.
When using a linear regulator, a proper heat sink shall be provided in order to dissipate the power generated.
A Bypass low ESR capacitor of adequate capacity must be provided in order to cut the current absorption peaks close to the GC864-QUAD V2 / GC864-DUAL V2, a 100F tantalum capacitor is usually suited.
Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V.
A protection diode can be inserted close to the power input, in order to save the GC864-QUAD V2 / GC864-DUAL V2 from power polarity inversion.
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An example of linear regulator with 5V input is:
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5.2.1.2. +12V input Source Power Supply Design Guidelines
The desired output for the power supply is 3.8V, hence, due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used. A switching power supply will be preferable because of its better efficiency especially with the 2A peak current load represented by the GC864-QUAD V2 / GC864-DUAL V2.
When using a switching regulator, a 500kHz (or more) switching frequency regulator is preferable, because of its smaller inductor size and its faster transient response. This allows the regulator to respond quickly to the current peaks absorption.
In any case the frequency and switching design selection is related to the application to be developed, due to the fact that the switching frequency could also generate EMC interferences.
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As far as car PB battery, the input voltage can rise up to 15.8V. This must be kept in mind when choosing components: all components in the power supply must withstand this voltage.
A Bypass low ESR capacitor of adequate capacity must be provided, in order to cut the current absorption peaks. A 100F tantalum capacitor is typically used.
Make sure the low ESR capacitor on the power supply output (usually a tantalum one) is rated at least 10V.
As far as car applications, a spike protection diode must be inserted close to the power input, in order to clean the supply from spikes.
A protection diode can be inserted close to the power input, in order to save the GC864-QUAD V2 / GC864-DUAL V2 from power polarity inversion. This can be the same diode used for spike protection.
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An example of switching regulator with 12V input is in the schematic below (split in 2 parts):
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5.2.1.3. Battery Source Power Supply Design Guidelines
The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.5V. A single 3.7V Li-Ion cell battery type is suited for supplying the power to the Telit GC864-QUAD V2 / GC864-DUAL V2 module.
CAUTION:
The three cells Ni/Cd or Ni/MH 3,6 V Nom. Battery types or 4V PB types MUST NOT BE USED DIRECTLY since their maximum voltage can rise over the absolute maximum voltage for the GC864-QUAD V2 / GC864-DUAL V2 and damage it.
CAUTION:
DO NOT USE any Ni-Cd, Ni-MH, and Pb battery types directly connected with GC864­QUAD V2 / GC864-DUAL V2. Their use can lead to overvoltage on the GC864-QUAD V2 / GC864-DUAL V2 and damage it. USE ONLY Li-Ion battery types.
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A Bypass low ESR capacitor of adequate capacity must be provided, in order to cut the current absorption peaks. A 100F tantalum capacitor is typically used.
Make sure the low ESR capacitor (usually a tantalum one) is rated at least 10V.
A protection diode can be inserted close to the power input, in order to save the GC864-QUAD V2 / GC864-DUAL V2 from power polarity inversion. Otherwise the battery connector must be done in a way to avoid polarity inversions when connecting the battery.
The battery capacity must be at least 500mAh in order to withstand the current peaks of 2A; the suggested capacity is from 500mAh to 1000mAh.

5.2.2. Thermal Design Guidelines

The thermal design for the power supply heat sink must be done with the following specifications:
Average current consumption during transmission @PWR level max: 500mA
Average current consumption during transmission @ PWR level min: 100mA
Average current during Power Saving (CFUN=5): from 1.6 to 3.9mA
Average current during idle (Power Saving disabled): 19mA
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NOTE:
The average consumption during transmissions depends on the power level at which the device is requested to transmit by the network. The average current consumption hence varies significantly.
Considering the very low current during idle, especially if Power Saving function is enabled, it is possible to consider from the thermal point of view that the device absorbs current significantly only during calls.
If we assume that the device stays into transmission for short periods of time (let us say few minutes) and then remains for a quite long time in idle (let us say one hour), then the power supply has always the time to cool down between the calls, and the heat sink could be smaller than the calculated one for 500mA maximum RMS current, or even could be the simple chip package (no heat sink).
Moreover, in the average network conditions, the device is requested to transmit at a lower power level than the maximum, hence the current consumption will be less than 500mA, usually around 150mA.
For these reasons the thermal design is rarely a concern and the simple ground plane where the power supply chip is placed grants a good thermal condition to avoid overheating as well.
As far as the heat generated by the GC864-QUAD V2 / GC864-DUAL V2, you can consider it to be during transmissions of 1W max during CSD/VOICE calls and 2W max during class10 GPRS upload.
This generated heat will be mostly conducted to the ground plane under the GC864­QUAD V2 / GC864-DUAL V2; you must ensure that your application can dissipate it.

5.2.3. Power Supply PCB Layout Guidelines

As seen on the electrical design guidelines the power supply shall have a low ESR capacitor on the output to cut the current peaks and a protection diode on the input to protect the supply from spikes and polarity inversion. The placement of these components is crucial for the correct working of the circuitry. A misplaced component can be useless or can even decrease the power supply performances.
The Bypass low ESR capacitor must be placed close to the Telit GC864­QUAD V2 / GC864-DUAL V2 power input pads or in the case the power supply is a switching type it can be placed close to the inductor to cut the ripple provided the PCB trace from the capacitor to the GC864-QUAD V2 / GC864-DUAL V2 is wide enough to ensure a dropless connection even during the 2A current peaks.
The protection diode must be placed close to the input connector where the power source is drained.
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The PCB traces from the input connector to the power regulator IC must be wide enough to ensure no voltage drops occur when the 2A current peaks are absorbed. Note that this is not made in order to save power loss but especially to avoid the voltage drops on the power line at the current peaks frequency of 216 Hz that will reflect on all the components connected to that supply, introducing the noise floor at the burst base frequency. For this reason while a voltage drop of 300-400 mV may be acceptable from the power loss point of view, the same voltage drop may not be acceptable from the noise point of view. If your application does not have audio interface but only uses the data feature of the Telit GC864­QUAD V2 / GC864-DUAL V2, then this noise is not so disturbing and power supply layout design can be more forgiving.
The PCB traces to the GC864-QUAD V2 / GC864-DUAL V2 and the Bypass capacitor must be wide enough to ensure no significant voltage drops occur when the 2A current peaks are absorbed. This is for the same reason as previous point. Try to keep this trace as short as possible.
The PCB traces connecting the Switching output to the inductor and the switching diode must be kept as short as possible by placing the inductor and the diode very close to the power switching IC (only for switching power supply). This is done in order to reduce the radiated field (noise) at the switching frequency (100-500 kHz usually).
The use of a good common ground plane is suggested.
The placement of the power supply on the board must be done in such a
way to guarantee that the high current return paths in the ground plane are not overlapped to any noise sensitive circuitry as the microphone amplifier/buffer or earphone amplifier.
The power supply input cables must be kept separate from noise sensitive lines such as microphone/earphone cables.

5.2.4. Parameters for ATEX Applications

In order to integrate the Telit GC864-QUAD V2 / GC864-DUAL V2 module into an ATEX application, the appropriate reference standard IEC EN xx and integrations shall be followed.
Below are listed parameters and useful information to integrate the module in your application:
Total capacity: 27.45 uF
Total inductance: 55.20 nH
No voltage upper than supply voltage is present in the module.
No step-up converters are present in the module.
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In abnormal conditions, the maximum RF output power may be up to 34 dBm.
For this particular application, we recommend the customer to involve TTSC (Telit Technical Support Center) in the design phase of the application.
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6. Antenna

The antenna connection and board layout design are the most important part in the full product design and they strongly reflect on the product overall performances, hence read carefully and follow the requirements and the guidelines for a proper design.

6.1. GSM Antenna Requirements

As suggested on the Product Description the antenna for a Telit GC864-QUAD V2 / GC864-DUAL V2 device shall fulfill the following requirements:
ANTENNA REQUIREMENTS
Frequency range Depending by frequency band(s) provided by the
network operator, the customer shall use the
most suitable antenna for that/those band(s) Bandwidth for GC864-QUAD V2 Bandwidth for GC864-DUAL V2 Gain
Impedance Input power > 2 W peak power VSWR absolute max <= 10:1 VSWR recommended <= 2:1
70 MHz in GSM850, 80 MHz in GSM900, 170 MHz
in DCS and 140 MHz PCS band
80 MHz in GSM900 and 170 MHz in DCS
Gain < 1,4dBi in GSM 850 & 900
and < 3,0dBi DCS & PCS
50
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Furthermore if the device is developed for the US market and/or Canada market, it shall comply to the FCC and/or IC approval requirements:
This device is to be used only for mobile and fixed application. The antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. End-Users must be provided with transmitter operation conditions for satisfying RF exposure compliance. OEM integrators must ensure that the end user has no manual instructions to remove or install the GC864­QUAD V2 / GC864-DUAL V2 module. Antennas used for this OEM module must not exceed 3dBi gain for mobile and fixed operating configurations.
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6.2. GSM Antenna Installation Guidelines

Install the antenna in a place covered by the GSM signal.
The Antenna must be installed to provide a separation distance of at least
20 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter;
Antenna shall not be installed inside metal cases
Antenna shall be installed also according Antenna manufacturer
instructions.
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7. Logic Level Specifications

Where not specifically stated, all the interface circuits work at 2.8V CMOS logic levels. The following table shows the logic level specifications used in the Telit GC864-QUAD V2 / GC864-DUAL V2 interface circuits:
Absolute Maximum Ratings – Not Functional
Parameter Min Max Input level on any
digital pin when on Input voltage on analog pins when on
-0.3V +3.1V
-0.3V +3.0 V
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Operating Range – Interface Levels (2.8V CMOS)
Level Min Max Input high level 2.1V 3.1V Input low level 0V 0.5V Output high level 2.2V 3.0V Output low level 0V 0.35V
For 1,8V signals:
Operating Range – Interface Levels (1.8V CMOS)
Level Min Max Input high level 1.6V 2.2V Input low level 0V 0.4V Output high level 1,65V 2.2V Output low level 0V 0.35V
Current characteristics
Level Typical Output Current 1mA Input Current 1uA
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7.1. Reset Signal

Signal Function I/O PIN Number RESET Reset I 54
RESET is used to reset the GC864-QUAD V2 / GC864-DUAL V2 modules. Whenever this signal is pulled low, the GC864-QUAD V2 / GC864-DUAL V2 is reset. When the device is reset it stops any operation. After the release of the reset GC864-QUAD V2 / GC864-DUAL V2 is unconditionally shut down, without doing any detach operation from the network where it is registered. This behavior is not a proper shut down because any GSM device is requested to issue a detach request on turn off. For this reason the Reset signal must not be used to normally shutting down the device, but only as an emergency exit in the rare case the device remains stuck waiting for some network response.
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The RESET is internally controlled on start-up to achieve always a proper power-on reset sequence, so there is no need to control this pin on start-up. It may only be used to reset a device already on that is not responding to any command.
NOTE:
Do not use this signal to power off the GC864-QUAD V2 / GC864-DUAL V2. Use the ON/OFF signal to perform this function or the AT#SHDN command.
Reset Signal Operating Levels:
Signal Min Max RESET Input high 2.0V* 2.2V RESET Input low 0V 0.2V
* this signal is internally pulled up so the pin can be left floating if not used.
If unused, this signal may be left unconnected. If used, then it must always be connected with an open collector transistor, to permit to the internal circuitry the power on reset and under voltage lockout functions.
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8. Serial Ports

The serial port on the Telit GC864-QUAD V2 / GC864-DUAL V2 is the core of the interface between the module and OEM hardware.
2 serial ports are available on the module:
MODEM SERIAL PORT
MODEM SERIAL PORT 2 (TRACE for debug)

8.1. MODEM SERIAL PORT

Several configurations can be designed for the serial port on the OEM hardware, but the most common are:
RS232 PC com port
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microcontroller UART @ 2.8V – 3V (Universal Asynchronous Receive Transmit)
microcontroller UART@ 5V or other voltages different from 2.8V
Depending from the type of serial port on the OEM hardware a level translator circuit may be needed to make the system work. The only configuration that does not need a level translation is the 2.8V UART.
The serial port on the GC864-QUAD V2 / GC864-DUAL V2 is a +2.8V UART with all the 7 RS232 signals. It differs from the PC-RS232 in the signal polarity (RS232 is reversed) and levels. The levels for the GC864-QUAD V2 / GC864-DUAL V2 UART are the CMOS levels:
Absolute Maximum Ratings –Not Functional
Parameter Min Max Input level on any
digital pad when on Input voltage on analog pads when on
-0.3V +3.1V
-0.3V +3.0 V
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Operating Range – Interface levels (2.8V CMOS)
Level Min Max Input high level V Input low level VIL 0V 0.5V Output high level VOH 2.2V 3.0V Output low level VOL 0V 0.35V
The table below shows the signals of the GC864-QUAD V2 / GC864-DUAL V2 serial port:
2.1V 3.1V
IH
RS232 Pin Number
1
2
3
4
5 GND 5,6,7 Ground ground
6
7
8
9 RI – ri_uart 30 Ring Indicator
Signal GC864-
QUAD V2 / GC864­DUAL V2 Pad
Number DCD – dcd_uart RXD – tx_uart TXD – rx_uart DTR – dtr_uart
DSR – dsr_uart RTS – rts_uart CTS – cts_uart
32 Data Carrier Detect
26 Transmit line *see Note
25 Receive line *see Note
29 Data Terminal Ready
27 Data Set Ready
31 Request to Send
28 Clear to Send
Name Usage
Output from the GC864-QUAD V2 / GC864-DUAL V2 that indicates the carrier presence Output transmit line of GC864-QUAD V2 / GC864­DUAL V2 UART Input receive of the GC864-QUAD V2 / GC864-DUAL V2 UART Input to the GC864-QUAD V2 / GC864-DUAL V2 that controls the DTE READY condition
Output from the GC864-QUAD V2 / GC864-DUAL V2 that indicates the module is ready Input to the GC864-QUAD V2 / GC864-DUAL V2 that controls the Hardware flow control Output from the GC864-QUAD V2 / GC864-DUAL V2 that controls the Hardware flow control Output from the GC864-QUAD V2 / GC864-DUAL V2 that indicates the incoming call condition
*NOTE:
According to V.24, RX/TX signal names are referred to the application side, therefore on the GC864-QUAD V2 / GC864-DUAL V2 side these signal are on the opposite direction: TXD on the application side will be connected to the receive line (here named TXD/ rx_uart ) of the GC864-QUAD V2 / GC864-DUAL V2 serial port and vice versa for RX.
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TIP:
For a minimum implementation, only the TXD and RXD lines can be connected, the other lines can be left open provided a software flow control is implemented.

8.2. RS232 Level Translation

In order to interface the Telit GC864-QUAD V2 / GC864-DUAL V2 with a PC com port or a RS232 (EIA/TIA-232) application a level translator is required. This level translator must
invert the electrical signal in both directions
change the level from 0/+3V to +15/-15V
Actually, the RS232 UART 16450, 16550, 16650 & 16750 chipsets accept signals with lower levels on the RS232 side (EIA/TIA-562), allowing for a lower voltage-multiplying ratio on the level translator. Note that the negative signal voltage must be less than 0V and hence some sort of level translation is always required.
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The simplest way to translate the levels and invert the signal is by using a single chip level translator. There are a multitude of them, differing in the number of driver and receiver and in the levels (be sure to get a true RS232 level translator not a RS485 or other standards).
By convention the driver is the level translator from the 0/+3V UART level to the RS232 level, while the receiver is the translator from RS232 level to 0/+3V UART.
In order to translate the whole set of control lines of the UART you will need:
5 driver
3 receiver
NOTE:
The digital input lines working at 2.8VCMOS have an absolute maximum input voltage of 3,1V; therefore the level translator IC shall not be powered by the +3.8V supply of the module. Instead it shall be powered from a +2.8V / +3.0V (dedicated) power supply. This is because in this way the level translator IC outputs on the module side (i.e. GC864-QUAD V2 / GC864-DUAL V2 inputs) will work at +3.8V interface levels, stressing the module inputs at its maximum input voltage. This can be acceptable for evaluation purposes, but not on production devices.
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NOTE:
In order to be able to do in circuit reprogramming of the GC864-QUAD V2 / GC864­DUAL V2 firmware, the serial port on the Telit GC864-QUAD V2 / GC864-DUAL V2 shall be available for translation into RS232 and either it is controlling device shall be placed into tristate, disconnected or as a gateway for the serial data when module reprogramming occurs. Only RXD, TXD, GND, SERVICE and the On/off module turn on pad are required to the reprogramming of the module, the other lines are unused. All applicator shall include in their design such a way of reprogramming the GC864­QUAD V2 / GC864-DUAL V2.
An example of level translation circuitry of this kind is:
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The RS232 serial port lines are usually connected to a DB9 connector with the following layout:

8.3. 5V UART Level Translation

If the OEM application uses a microcontroller with a serial port (UART) that works at a voltage different from 2.8 – 3V, then a circuitry has to be provided to adapt the different levels of the two set of signals. As for the RS232 translation there are a multitude of single chip translators. For example a possible translator circuit for a 5V TRANSMITTER/RECEIVER can be:
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TIP:
Note that the TC7SZ07AE has open drain output; therefore the resistor R2 is mandatory.
NOTE:
The UART input line TXD (rx_uart) of the GC864-QUAD V2 / GC864-DUAL V2 is NOT internally pulled up with a resistor, so there may be the need to place an external 47K pull-up resistor, either the DTR (dtr_uart) and RTS (rts_uart) input lines are not pulled up internally, so an external pull-up resistor of 47K may be required.
Care must be taken to avoid latch-up on the GC864-QUAD V2 / GC864-DUAL V2 and the use of this output line to power electronic devices shall be avoided, especially for devices that generate spikes and noise such as switching level translators, micro controllers, failure in any of these condition can severely compromise the GC864­QUAD V2 / GC864-DUAL V2 functionality.
NOTE:
In case of reprogramming of the module has to be considered the use of the RESET line to start correctly the activity.
The preferable configuration is having an external supply for the buffer level translator.
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9. Audio Section Overview

The first Baseband chip was developed for the cellular phones, which needed two separated amplifiers both in RX and in TX section.
A couple of amplifiers had to be used with internal audio transducers while the other couple of amplifiers had to be used with external audio transducers.
To distinguish the schematic signals and the Software identifiers, two different definitions were introduced, with the following meaning:
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internal audio transducers Æ
external audio transducers Æ
Actually the acronyms have not the original importance.
In other words this distinction is not necessary, being the performances between the two blocks like the same.
Only if the customer needs higher output power to drive the speaker, he needs to adopt the Aduio2 Section ( overcome the PCB design difficulties.
For these reasons we have not changed the the Software and on the schematics.
The Base Band Chip of the GC864-QUAD V2 / GC864-DUAL V2Telit Modules maintains the same architecture.
For more information and suggestions refer to Telit document:
Audio settings application note , 80000NT10007a
HF
) . Otherwise the choice could be done in order to
HS/MT
HF
(from
(from HandsFree )
HS
HandSet
and HF acronyms, keeping them in
or
MicroTelephone
)

9.1. Selection mode

Only one block can be active at a time, and the activation of the requested audio
AXE
path is done via hardware ,by
Moreover the between the transmit path and the receive path, enabled at request in both modes.
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Sidetone
functionality could be implemented by the amplifier fitted
line, or via software ,by
AT#CAP
command .
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16
Bias
Single ended
8
Balanced
Single ended
Balanced
Balanced
Single ended
100nF
100nF
Ear MT+
Ear MT-
Mic MT+
Mic MT-
Ear HF+
Ear HF-
EP P1
HS Earpiece
EP N1
MIC P1
HS Microphone
MIC N 1
LOUD1
HF Speaker
LOUD2
Fully Differential Audio Amplifier
AUDIO 1 SECTION
Baseband Audio Front End
Fully Differential Audio Amplifier
Bias
Balanced
Single ended
100nF
100nF
Mic HF+
Mic HF-
MIC P2
HF Microphone
MIC N 2
AUDIO 2 SECTION
xgaffull.skd
GC864-QUAD V2 / GC864-DUAL V2 Audio Front End Block Diagram
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9.2. Electrical Characteristics

TIP: Being the microphone circuitry the more noise sensitive, its design and layout must be done with particular care. Both microphone paths are balanced and the OEM circuitry must be balanced designed to reduce the common mode noise typically generated on the ground plane. However the customer can use the unbalanced circuitry for its particular application.
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9.2.1. Input Lines Characteristics

“MIC_MT” and “MIC_HF” differential microphone paths
Line Coupling AC*
Line Type Balanced
Differential input voltage
Gain steps 7
Gain increment 6dB per step
Coupling capacitor
Differential input resistance
Input capacitance • 10pF
(*) WARNING : AC means that the signals from the microphone have to be connected to input lines of the module through capacitors which value has to be 100nF. Not respecting this constraint, the input stages will be damaged.
WARNING: when particular OEM application needs a configuration, it is forbidden connecting the unused input directly to Ground, but only through a 100nF capacitor. Don’t forget that the useful input signal will be halved in
Single Ended Input
configuration.
1,03Vpp @
100nF
50K
Mic G=0dB
Single Ended Input
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9.2.2. Output Lines Characteristics

TIP:
We suggest driving the load differentially from both output drivers, thus the output swing will double and the need for the output coupling capacitor avoided. However if particular OEM application needs also a but the output power will be reduced four times .
The OEM circuitry shall be designed to reduce the common mode noise typically generated on the ground plane and to get the maximum power output from the device (low resistance tracks).
WARNING:
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Single Ended circuitry
can be implemented,
The loads are directly connected to the amplifier outputs when in configuration, through a capacitor when in Using a Not respecting this constraint, the output stage will be damaged.
TIP : Remember that there are slightly different electrical performances between the two internal audio amplifiers:
the
the “
There is no difference if the amplifiers drive an external amplifier
(**)
3,7V
Single Ended configuration
“Ear_MT”
Differential
Ear_HF”
0dBFS
pp
is the normalized overall Analog Gain for each Output channel equal to
differential
lines can directly drive a 16Ω
configuration
lines can directly drive a 4Ω
, the unused output line must be left open .
Single Ended
load
at –12dBFS (**) in
load
in
configuration.
Differential
Differential
configurations
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EAR_MT Output Lines
line coupling
0dBFS normalized gain 3,7 V output load resistance internal output resistance signal bandwidth 150 - 4000 Hz @ -3 dB maximal full scale
differential output voltage differential output voltage
volume increment 2 dB per step volume steps 10
EAR_HF Output Lines
line coupling
output load resistance signal bandwidth 150 - 4000 Hz @ -3 dB maximal output power
@ battery voltage  3,6V volume increment 2 dB per step volume steps 10
AC single-ended DC differential
differential
pp
16 4 (
3,7 V Rload=
@ -12dBFS
typical
)
(
typical
pp
)
open circuit
925mVpp / Rload=16
@ -12dBFS
AC single-ended DC differential
8
0.35 W
/8
rms
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10. General Purpose I/O

The general-purpose I/O pads can be configured to act in three different ways:
Input
Output
Alternate function (internally controlled)
Input pads can only be read and report the digital value (high or low) present on the pad at the read time; output pads can only be written or queried and set the value of the pad output; an alternate function pad is internally controlled by the GC864-QUAD V2 / GC864-DUAL V2 firmware and acts depending on the function implemented.
The following GPIO are available on the GC864-QUAD V2 / GC864-DUAL V2:
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Pin Signal I/O Function Type
70 TGPIO_01 I/O
TGPIO_02 /
74
JDR
66 TGPIO_03 I/O
TGPIO_04 /
59
TXCNTRL
TGPIO_05 /
78
RFTXMON
TGPIO_06 /
68
ALARM
TGPIO_07 /
73
BUZZER
67 TGPIO_08 I/O
76 TGPIO_09 I/O
TGPIO_10 /
63
DVI_TX
GPIO01 Configurable GPIO
GPIO02
I/O
Configurable GPIO
GPIO03 Configurable GPIO
GPIO04
I/O
Configurable GPIO
GPIO05
I/O
Configurable GPIO
GPIO06
I/O
Configurable GPIO
GPIO07
I/O
Configurable GPIO
GPIO08 Configurable GPIO GPIO09 Configurable GPIO
GPIO10
I/O
Configurable GPIO
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
CMOS 2.8V 1uA / 1mA INPUT 0 0
Input / output current
Default state
ON_OFF state
During Reset state
Note
Alternate function (JDR)
Alternate function (RF Transmission Control) Alternate function (RFTXMON) Alternate function (ALARM) Alternate function (BUZZER)
Alternate function (DVI_TX)
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Not all GPIO pads support all these three modes:
GPIO2 supports all three modes and can be input, output, Jamming Detect Output (Alternate function)
GPIO4 supports all three modes and can be input, output, RF Transmission Control (Alternate function)
GPIO5 supports all three modes and can be input, output, RFTX monitor output (Alternate function)
GPIO6 supports all three modes and can be input, output, alarm output (Alternate function)
GPIO7 supports all three modes and can be input, output, buzzer output (Alternate function)

10.1. GPIO Logic Levels

Where not specifically stated, all the interface circuits work at 2.8V CMOS logic levels.
The following tables show the logic level specifications used in the GC864-QUAD V2 / GC864-DUAL V2 interface circuits:
Absolute Maximum Ratings –Not Functional
Parameter Min Max Input level on any
digital pin when on Input voltage on analog pins when on
Operating Range – Interface Levels (2.8V CMOS)
Level Min Max Input high level 2.1V 3.1V Input low level 0V 0.5V Output high level 2.2V 3.0V Output low level 0V 0.35V
-0.3V +3.1V
-0.3V +3.0 V
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10.2. Using a GPIO Pad as INPUT

The GPIO pads, when used as inputs, can be connected to a digital output of another device and report its status, provided this device has interface levels compatible with the 2.8V CMOS levels of the GPIO.
If the digital output of the device to be connected with the GPIO input pad has
VDD
Q1
Q2
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GPIO7
interface levels different from the 2.8V CMOS, then it can be buffered with an open collector transistor with a 47K pull up to 2.8V, this pull up must be switched off when the module is in off condition.

10.3. Using a GPIO Pad as OUTPUT

The GPIO pads, when used as outputs, can drive 2.8V CMOS digital devices or compatible hardware. When set as outputs, the pads have a push-pull output and therefore the pull-up resistor may be omitted.
The illustration below shows the base circuit of a push-pull stage:

10.4. Using the RF Transmission Control GPIO4

The GPIO4 pin, when configured as RF Transmission Control Input, permits to disable the Transmitter when the GPIO is set to Low by the application.
In the design is necessary to add a resistor 47K pull up to 2.8V, this pull up must be switched off when the module is in off condition.

10.5. Using the RFTXMON Output GPIO5

The GPIO5 pin, when configured as RFTXMON Output, is controlled by the GC864­QUAD V2 / GC864-DUAL V2 module and will rise when the transmitter is active and fall after the transmitter activity is completed.
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For example, if a call is started, the line will be HIGH during all the conversation and it will be again LOW after hanged up.
The line rises up 300ms before first TX burst and will became again LOW from 500ms to 1sec after last TX burst.

10.6. Using the Alarm Output GPIO6

The GPIO6 pad, when configured as Alarm Output, is controlled by the GC864-QUAD V2 / GC864-DUAL V2 module and will rise when the alarm starts and fall after the issue of a dedicated AT command.
This output can be used to power up the GC864-QUAD V2 / GC864-DUAL V2 controlling micro controller or application at the alarm time, giving you the possibility to program a timely system wake-up to achieve some periodic actions and completely turn off either the application and the GC864-QUAD V2 / GC864-DUAL V2 during sleep periods, dramatically reducing the sleep consumption to few A.
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In battery-powered devices this feature will greatly improve the autonomy of the device.
NOTE:
During RESET the line is set to HIGH logic level.

10.7. Using the Buzzer Output GPIO7

As
Alternate Function
function implemented internally.
This setup places always the GPIO7 pin in function must be activated properly by AT#SRP command (refer to
specification
Also in this case, the
The GPIO7 pin will be set as
HIGH
value.
).
Send the command AT#GPIO=7, 1, 2<cr>:
Wait for response OK
Send the command AT#SRP=3
, the GPIO7 is controlled by the firmware that depends on the
OUTPUT
dummy value
for the pin state can be both 0” or “1”.
Alternate Function
direction and the corresponding
AT commands
pin with its
dummy
logic status set to
The
Alternate Function
feature with some small hardware extension of your application as shown in the sample figure below.
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permits your application to easily implement Buzzer
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+V bu zze r
R1
4,7K
GPIO7
TR1 BCR141W
TR2
SMBT2907A
D1N4148
R2
1K
D1
C1
33pF
+
-
Example of Buzzer’s driving circuit
NOTE:
To correctly drive a buzzer, a driver must be provided; its characteristics depend on the Buzzer and for them refer to your buzzer vendor.

10.8. Magnetic Buzzer Concepts

10.8.1. Short Description

A magnetic Buzzer is a sound-generating device with a coil located in the magnetic circuit consisting of a permanent magnet, an iron core, a high permeable metal disk, and a vibrating diaphragm.
Drawing of the Magnetic Buzzer
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The disk and diaphragm are attracted to the core by the magnetic field. When an oscillating signal is moved through the coil, it produces a fluctuating magnetic field, which vibrates the diaphragm at a frequency of the drive signal. Thus the sound is produced relative to the frequency applied.
Diaphragm movement

11.8.1 Frequency Behavior

The frequency behavior represents the effectiveness of the reproduction of the applied signals.
Because its performance is related to a square driving waveform (whose amplitude varies from 0V to Vpp), if you modify the waveform (e.g. from square to sinus) the frequency response will change.

10.8.2. Power Supply Influence

Applying a signal whose amplitude is different from that suggested by manufacturer, the performance change following the rule:
f
if resonance frequency
increases, amplitude decreases.
o
Because of resonance frequency depends from acoustic design, lowering the amplitude of the driving signal the response bandwidth tends to become narrow, and vice versa.
Summarizing: Vpp Æ
The risk is that the
f
could easily fall outside of new bandwidth; consequently the
o
SPL could be much lower than the expected.

10.8.3. Warning

f
Vpp Æ
o
f
o
It is very important to respect the sense of the applied voltage: never apply to the -“
pin
a voltage more positive than the +”
pin
. If this happens, the diaphragm vibrates in the opposite sense with a high probability to be expelled from its physical position, damaging the device forever.
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10.8.4. Working Current Influence

In the component data sheet you will find the value of MAX CURRENT that represents the maximum average current that can flow at nominal voltage without current limitation.
In other words it is not the peak current, which could be twice or three times higher.
If driving circuitry does not support these peak values, the SPL will never reach the declared level or the oscillations will stop.

10.9. Using the Temperature Monitor Function

10.9.1. Short Description

The Temperature Monitor is a function of the module that permits to control its internal temperature and if properly set (see the #TEMPMON command on AT Interface guide) it raise to High Logic level a GPIO when the maximum temperature is reached.

10.9.2. Allowed GPIO

The AT#TEMPMON set command could be used with one of the following GPIO:
Input /
Signal Function Type
TGPIO_01 GPIO01 Configurable GPIO CMOS 2.8V 1A / 1mA
TGPIO_03 GPIO03 Configurable GPIO CMOS 2.8V 1A / 1mA
TGPIO_08 GPIO08 Configurable GPIO CMOS 2.8V 1A / 1mA
TGPIO_09 GPIO09 Configurable GPIO CMOS 2.8V 1A / 1mA
TGPIO_10 GPIO10 Configurable GPIO CMOS 2.8V 1A / 1mA
The set command could be used also with one of the following GPIO but in that case the alternate function is not usable:
Signal Function Type
TGPIO_02 GPIO02 Configurable GPIO CMOS 2.8V 1A / 1mA Alternate function (JDR)
TGPIO_04 GPIO04 Configurable GPIO CMOS 2.8V 1A / 1mA
TGPIO_05 GPIO05 Configurable GPIO CMOS 2.8V 1A / 1mA Alternate function (RFTXMON)
TGPIO_07 GPIO07 Configurable GPIO CMOS 2.8V 1A / 1mA Alternate function (BUZZER)
output current
Input / output current
Note
Note
Alternate function (RF Transmission Control)
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10.10. Indication of Network Service Availability

The STAT_LED pin status shows information on the network service availability and Call status.
In the GC864-QUAD V2 / GC864-DUAL V2 modules, the STAT_LED usually needs an external transistor to drive an external LED.
Therefore, the status indicated in the following table is reversed with respect to the pin status.
LED status Device Status
Permanently off Device off Fast blinking
(Period 1s, Ton 0,5s) Slow blinking (Period 3s, Ton 0,3s) Permanently on a call is active
Net search / Not registered / turning off
Registered full service
A schematic example could be:
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10.11. RTC Bypass Out

The VRTC pin brings out the Real Time Clock supply, which is separate from the rest of the digital part, allowing having only RTC going on when all the other parts of the device are off.
To this power output a backup capacitor can be added in order to increase the RTC autonomy during power off of the battery. NO Devices must be powered from this pin.
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10.12. DAC Converter

10.12.1. Description

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Pin Signal I/O Function
DAC Converter
40 DAC_OUT AO Digital/Analog converter output D/A
Internal Pull up
Type
The GC864-QUAD V2 / GC864-DUAL V2 module provides one Digital to Analog Converter.
The on board DAC is a 10-bit converter, able to generate a analogue value based a specific input in the range from 0 up to 1023. However, an external low-pass filter is necessary.
Min Max Units Voltage range (filtered) 0 2,6 Volt Range 0 1023 Steps
The precision is 10 bits, so if we consider that the maximum voltage is 2V, the integrated voltage could be calculated with the following formula:
Integrated output voltage = 2 * value / 1023
DAC_OUT line must be integrated (for example with a low band pass filter) in order to obtain an analog voltage.

10.12.2. Enabling DAC

The AT command below is available to use the DAC function:
AT#DAC[=<enable>[,<value>]]
<value> – scale factor of the integrated output voltage (0–1023, with 10 bit precision), and it must be present if <enable>=1.
Refer to SW User Guide or AT Commands Reference Guide for the full description of this function.
Refer to SW User Guide or AT Commands Reference Guide for the full description of this function.
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NOTE:
The DAC frequency is selected internally. D/A converter must not be used during POWERSAVING.

10.12.3. Low Pass Filter Example

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10.13. ADC Converter

10.13.1. Description

Pin Signal I/O Function
ADC Converters
37 ADC_IN1 AI Analog/Digital converter input A/D
38 ADC_IN2 AI Analog/Digital converter input A/D
39 ADC_IN3 AI Analog/Digital converter input A/D
The GC864-QUAD V2 / GC864-DUAL V2 module provides three Analog to Digital Converter.
The on board A/D are 11-bit converter. They are able to read a voltage level in the range of 0÷2 volts applied on the ADC pin input, store and convert it into 11 bit word.
Min Max Units Input Voltage range 0 2 Volt AD conversion - 11 bits Resolution - < 1 mV
Internal Pull up
Type
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10.13.2. Using ADC Converter

The AT command below is available to use the ADC function:
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AT#ADC=1,2
The read value is expressed in mV.
Refer to SW User Guide or AT Commands Reference Guide for the full description of this function.
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11. Assembly the GC864-QUAD V2 / GC864-DUAL V2 on the Board

The position of the Molex board to board connector and the pin 1 are shown in the following picture.
NOTE:
The metal tabs present on GC864-QUAD V2 / GC864-DUAL V2 must be connected to GND.
This module could not be processed with a reflow.
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11.1.1. Debug of the GC864-QUAD V2 / GC864-DUAL V2 in Production

To test and debug the mounting of the GC864, we strongly recommend to foreseen test pads on the host PCB, in order to check the connection between the GC864­QUAD V2 / GC864-DUAL V2 itself and the application and to test the performance of the module connecting it with an external computer. Depending by the customer application, these pads include, but are not limited to the following signals:
Pin Signal I/O Function
ADC Converters
5,6,7, 46
1,2,3,4 VBATT - Main power supply Power
25 C103/TXD I Serial data input (TXD) from DTE CMOS 2.8V
26 C104/RXD O Serial data output (RXD) to DTE CMOS 2.8V
53 ON/OFF* I Input command for switching power ON or
54 RESET* I Reset input
49 PWRMON O Power ON Monitor CMOS 2.8V
23 RX_TRACE I RX Data for debug monitor CMOS 2.8V
24 TX_TRACE O TX Data for debug monitor CMOS 2.8V
47 SERVICE I SERVICE connection CMOS 2.8V
GND - Ground Ground
OFF (toggle command). The pulse to be sent to the GC864-QUAD V2 / GC864-DUAL V2 must be equal or greater than 1 second.
Internal Pull up
47KΩ Pull up to
Type
VBATT
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12. Packing System

The Telit GC864-QUAD V2 / GC864-DUAL V2 are packaged on trays of 20 pieces each.
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The size of the tray is: 329 x 176mm.
WARNING:
These trays can withstand at the maximum temperature of 65° C.
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13. Conformity Assessment Issues

The Telit GC864-QUAD V2 has been assessed in order to satisfy the essential requirements of the R&TTE Directive 1999/05/EC (Radio Equipment & Telecommunications Terminal Equipments) to demonstrate the conformity against the harmonized standards with the final involvement of a Notified Body.
If the module is installed in conformance to the Telit installation manuals, no further evaluation under Article 3.2 of the R&TTE Directive and do not require further involvement of a R&TTE Directive Notified Body for the final product.
In all other cases, or if the manufacturer of the final product is in doubt, then the equipment integrating the radio module must be assessed against Article 3.2 of the R&TTE Directive.
In all cases the assessment of the final product must be made against the Essential requirements of the R&TTE Directive Articles 3.1(a) and (b), Safety and EMC respectively, and any relevant Article 3.3 requirements.
This Hardware User Guide contains all the information you may need for developing a product meeting the R&TTE Directive.
Furthermore the GC864-QUAD V2 module is FCC Approved as module to be installed in other devices. This device is to be used only for fixed and mobile applications. If the final product after integration is intended for portable use, a new application and FCC is required. The GC864-QUAD V2 is conforming to the following US Directives:
• Use of RF Spectrum. Standards: FCC 47 Part 24 (GSM 1900)
• EMC (Electromagnetic Compatibility). Standards: FCC47 Part 15
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
To meet the FCC's RF exposure rules and regulations:
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• The system antenna(s) used for this transmitter must be installed to provide a separation distance of at least 20 cm from all the persons and must not be co­located or operating in conjunction with any other antenna or transmitter.
• The system antenna(s) used for this module must not exceed 1.4dBi (850MHz) and
3.0dBi (1900MHz) for mobile and fixed or mobile operating configurations.
• Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance.
Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and to have their complete product tested and approved for FCC compliance.
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14. SAFETY RECOMMENDATIONS
NOTE:
Read this section carefully to ensure the safe operation.
Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas:
Where it can interfere with other electronic devices in environments such as hospitals, airports, aircrafts, etc
Where there is risk of explosion such as gasoline stations, oil refineries, etc
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It is responsibility of the user to enforce the country regulation and the specific environment regulation.
Do not disassemble the product; any mark of tampering will compromise the warranty validity.
We recommend following the instructions of the hardware user guides for a correct wiring of the product. The product has to be supplied with a stabilized voltage source and the wiring has to be conforming to the security and fire prevention regulations.
The product has to be handled with care, avoiding any contact with the pins because electrostatic discharges may damage the product itself. Same cautions have to be taken for the SIM, checking carefully the instruction for its use. Do not insert or remove the SIM when the product is in power saving mode.
The system integrator is responsible of the functioning of the final product; therefore, care has to be taken to the external components of the module, as well as of any project or installation issue, because the risk of disturbing the GSM network or external devices or having impact on the security. Should there be any doubt, please refer to the technical documentation and the regulations in force.
Every module has to be equipped with a proper antenna with specific characteristics. The antenna has to be installed with care in order to avoid any interference with other electronic devices and has to guarantee a minimum distance from the body (20 cm). In case of this requirement cannot be satisfied, the system integrator has to assess the final product against the SAR regulation EN 50360.
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The European Community provides some Directives for the electronic equipments introduced on the market. All the relevant information are available on the European Community website:
http://europa.eu.int/comm/enterprise/rtte/dir99-5.htm
The text of the Directive 99/05 regarding telecommunication equipments is available, while the applicable Directives (Low Voltage and EMC) are available at:
http://europa.eu.int/comm/enterprise/electr_equipment/index_en.htm
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