TelCom Semiconductor Inc TC835CPI, TC835CKW, TC835CBU Datasheet

PERSONAL COMPUTER DATA ACQUISITION A/D CONVERTER

1

TC835

FEATURES

■ Upgrade of Pin-Compatible TC7135, ICL7135,

MAX7135 and SI7135

■ Guaranteed 200 kHz Operation

■ Single 5V Operation With TC7660

■ Multiplexed BCD Data Output

■ UART and Microprocessor Interface

■ Control Outputs for Auto-Ranging

■ Input Sensitivity ............................................ 100 µV

■ No Sample and Hold Required

APPLICATIONS

■ Personal Computer Data Acquisition

■ Scales, Panel Meters, Process Controls

■ HP-IL Bus Instrumentation

ORDERING INFORMATION

Temperature

Part No. Package Range

TC835CBU 64-Pin PQFP 0°C to +70°C
TC835CKW 44-Pin PQFP 0°C to +70°C
TC835CPI 28-Pin Plastic DIP 0°C to +70°C

NOTE: Tape and reel available for 44-pin PQFP packages.

TYPICAL APPLICATION

GENERAL DESCRIPTION

The TC835 is a low-power, 4-1/2 digit (0.005% resolu­tion), BCD analog-to-digital converter (ADC) that has been
characterized for 200 kHz clock rate operation. The five
conversions per second rate is nearly twice as fast as the
ICL7135 or TC7135. The TC835 (like the TC7135) does
not use the external diode-resistor roll-over error compen­sation circuits required by the ICL7135.

The multiplexed BCD data output is perfect for interfac­ing to personal computers. The low-cost, greater than 14­bit high-resolution, and 100 µV sensitivity makes the TC835
exceptionally cost-effective.

Microprocessor-based data acquisition systems are
supported by the BUSY and STROBE outputs, along with
the RUN/HOLD input of the TC835. The overrange, under­range, busy, and run/hold control functions and multiplexed
BCD data outputs make the TC835 the ideal converter for
µP-based scales and measurement systems and intelligent
panel meters.*

The TC835 interfaces with full-function LCD and LED
display decoder/drivers. The UNDERRANGE and
OVERRANGE outputs may be used to implement an auto­ranging scheme or special display functions.

*See Application Notes 16 and 17 for microprocessor interface tech­niques.

2

3

4

5

ADDRESS BUS

CONTROL

DATA BUS

PA0
PA1
PA2

PB0 PB3PB2PB1

6522

-VIA-

PA3
PA4
PA5
PA6
PA7
CA1
CA2

GAIN SELECTION

PB5
PB4

CHANNEL SELECTION

TELCOM SEMICONDUCTOR, INC.

+

5V

+

REF CAP

V

1B

1Y

2B

2Y
3Y

3B

SEL

1A

157

2A
3A

POL
OR
UR
D5
B8
B4
B2

B1
D1
D2
D3
D4
STB
R/H

f

IN

TC835

COMMON

f

IN

BUF

+

INPUT

–

INPUT

ANALOG

DGND

–

AZ

INT

V

R

5V

GAIN: 10, 20, 50, 100

REF
VOLTAGE

10

14

8

LH0084

16

–+

15V 15V

11

DG529

+

3

D

A

9

D

–

B

WR

15

A1A

EN

0

DIFFERENTIAL
MULTIPLEXER

CHANNEL 1

CHANNEL 2

CHANNEL 3

CHANNEL 4

6

7

8

TC835-8 11/5/96

3-65

TC835

PERSONAL COMPUTER

DA TA ACQUISITION A/D CONVERTER

ABSOLUTE MAXIMUM RATINGS* (Note 1)

Positive Supply Voltage ............................................. +6V

Negative Supply Voltage............................................ - 9V

Analog Input Voltage (Pin 9 or 10) ........ V+ to V– (Note 2)

Reference Input Voltage (Pin 2).......................... V+ to V

Clock Input Voltage ............................................. 0V to V

Operating Temperature Range ....................0°C to +70°C

Storage Temperature Range ................– 65°C to +150°C

Lead Temperature (Soldering, 10 sec) .................+300°C

ELECTRICAL CHARACTERISTICS:

TA = +25°C, f

Package Power Dissipation (TA ≤ 70°C)

28-Pin Plastic DIP.............................................1.14W

44-Pin PQFP ....................................................1.00W

64-Pin PFP .......................................................1.14W

*Static-sensitive device. Unused devices must be stored in conductive

–

material. Protect devices from static discharge and static fields. Stresses

+

above those listed under Absolute Maximum Ratings may cause perma­nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.

= 200 kHz, V+ = +5V, V– = – 5V, unless otherwise specified.

CLOCK

Symbol Parameter Test Conditions Min Typ Max Unit

Analog

Display Reading With Notes 3 and 4 –0.0000 ±0.0000 +0.0000 Display
Zero Volt Input Reading

TC

Z

TC

FS

NL Nonlinearity Error Note 7 — 0.5 1 Count
DNL Differential Linearity Error Note 7 — 0.01 — LSB

±FSE ± Full-Scale Symmetry –VIN = +V

I

IN

e

N

Digital

I

IL

I

IH

V

OL

V

OH

f

CLK

Power Supply

+

V

–

V

+

I

–

I
PD Power Dissipation f

NOTES: 1. Functional operation is not implied.

Zero Reading VIN = 0V — 0.5 2 µV/°C
Temperature Coefficient Note 5

Full-Scale VIN = 2V — — 5 ppm/°C
Temperature Coefficient Notes 5 and 6

Display Reading in VIN = V

REF

+0.9996 +0.9998 +1.0000 Display

Ratiometric Operation Note 3 Reading

IN

— 0.5 1 Count

Error (Roll-Over Error) Note 8
Input Leakage Current Note 4 — 1 10 pA
Noise

Peak-to-Peak Value Not Exceeded 95% of Time

—15—µV

P-P

Input Low Current VIN = 0V — 10 100 µA
Input High Current VIN = +5V — 0.08 10 µA
Output Low Voltage IOL = 1.6 mA — 0.2 0.4 V
Output High Voltage

B

, B2, B4, B8, D1–D

1

Busy, Polarity, Overrange, I

IOH = 1 mA 2.4 4.4 5 V

5

= 10 µA 4.9 4.99 5 V

OH

Underrange, Strobe

Clock Frequency Note 10 0 200 1200 kHz

Positive Supply Voltage 4 5 6 V
Negative Supply Voltage – 3 – 5 – 8 V
Positive Supply Current f
Negative Supply Current f

2. Limit input current to under 100 µA if input voltages exceed supply
voltage.

3. Full-scale voltage = 2V.

4. VIN = 0V.

5. 0°C ≤ TA ≤ +70°C.

6. External reference temperature coefficient less than 0.01 ppm/°C.

= 0 Hz — 1 3 mA

CLK

= 0 Hz — 0.7 3 mA

CLK

= 0 Hz — 8.5 30 mW

CLK

7. – 2V ≤ VIN ≤ +2V. Error of reading from best fit straight
line.

8. |VIN| = 1.9959.

9. Test circuit shown in Figure 1.

10. Specification related to clock frequency range over which
the TC835 correctly performs its various functions.
Increased errors result at higher operating frequencies.

3-66

TELCOM SEMICONDUCTOR, INC.

PERSONAL COMPUTER
DA TA ACQUISITION A/D CONVERTER

PIN CONFIGURATIONS

1

TC835

2

V

REF IN

ANALOG

COM

INT OUT

AZ IN

BUFF OUT

–

C

REF
+

C

REF

–

INPUT

+

INPUT

V

(MSD) D5

(LSB) B1

B2

–

1
2
3
4
5
6
7
8
9

10

+

11
12
13
14

TC835CPI

NC
NC

NC
NC

NC
NC

OVERRANGE

UNDERRANGE

SUB

REF IN

ANALOG COM

NC
NC
NC
NC

NOTES:

UNDERRANGE

28

OVERRANGE

27
26

STROBE
RUN/HOLD

25
24

DIGTAL GND

23

POLARITY
CLOCK IN

22
21

BUSY

20

D1 (LSD)

19

D2

18

D3

17

D4

16

B8 (MSD)
B4

15

NC

NC

STROBE

RUN/HOLD

NC

NC

63

64

1
2
3
4
5
6
7
8
9

10

V–

11
12
13
14
15
16

17 18

NC

1. NC = No internal connection.

2. Pins 9, 25, 40 and 56 are connected to the die substrate.
The potential at these pins is approximately V+. No
external connections should be made.

61 60 59 58

62

19 20 21 22

NC

AZ IN

INT OUT

DGND

TC835CBU

NOTES 1 & 2

23

NC

OUT

BUFF

BUF CAP–

57 56

24 25 26

NC

INT OUT

AZ IN

BUFF OUT

REF CAP–
REF CAP+

–INPUT
+INPUT

V+

NC

NC

POL

SUB

CLK IN

55 54

NC

SUB

BUF CAP+

1
2
3
4

5

6

7

8

9
10
11

BUSY

27 28

NC

NCNCNC

44 43 42 41 39 3840

ANALOG COM

REF INV–URORSTROBENCNC

TC835CKW

12 13 14 15 17 18

NC

NC

NC

D1

D2

53

51

52

29 30

NC

–INPUT

+INPUT

(MSD) D5

NC

50 49

31

32

NC

16

B2

(LSB) B1

NC

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

V+

NC

NC

NC
D3

D4
B3

B4
B2
SUB

B1
D5
NC
NC
NC

NC

NC

B4

(MSB) B8

37 36 35 34

19 20 21 22

D4

D3

NC

33
32
31
30
29
28
27

26
25
24
23

NC

NC
NC
RUN/HOLD
DGND
POLARITY
CLK IN

BUSY
D1 (LSD)
D2
NC
NC

3

4

5

6

7

8

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3-67

TC835

PERSONAL COMPUTER

DA TA ACQUISITION A/D CONVERTER

SET V

REF

V

IN

REF

100 kΩ

ANALOG GND

0.47
µF

SIGNAL
INPUT

+

5V

LOGIC

INPUT

= 1V

100 kΩ
100

kΩ

0.1 µF

–5V

1

–

V

2

REF IN

3

ANALOG
COMMON

4

1 µF

INT OUT

5

AZ IN

6

BUFF OUT

7

C

8

C

9

–

10

+

11

V

12

D5 (MSD)

13

B1 (LSB)

14

B2

–
REF
+
REF

INPUT
INPUT

+

1 µF

Figure 1. Test Circuit

+

V

UNDERRANGE

OVERRANGE

STROBE

RUN/HOLD

DIGTAL GND

POLARITY

CLOCK IN

BUSY

(LSD) D1

TC835

(MSB) B8

28
27

26
25
24
23

22
21
20
19

D2

18

D3

17

D4

16
15

B4

BUFFER

CLOCK
INPUT
120 kHz

+

IN

REF

IN

ANALOG
COM

–

IN

+

IN

REF

IN

ANALOG
COM

–

IN

SW

SW

SW

SW

SW

SW

SW

SW

ANALOG

SW

C

REF

SW

INPUT BUFFER

+
RI

–

RI

SW

1

+

–

SWIZSW

SW

Z

R

Z

INT

C

INT

C

SZ

–

+

INTEGRATOR

SWITCH OPEN
SWITCH CLOSED

COMPARATOR

+

–

TO
DIGITAL
SECTION

I

–

SW

RI

R

Z

+

SW

RI

I

Figure 3B. System Zero Phase

ANALOG

SW

C

REF

SW

INPUT BUFFER

+
RI

–

RI

SW

1

+

–

SWIZSW

SW

Z

R

Z

INT

C

INT

C

SZ

–

+

INTEGRATOR

SWITCH OPEN
SWITCH CLOSED

COMPARATOR

+

–

TO
DIGITAL
SECTION

I

–

SW

RI

R

Z

+

SW

RI

I

+

REF

ANALOG
COM

–

3-68

Figure 2. Digital Logic Input Figure 3C. Input Signal Integration Phase

REF

SW

+
RI

–

RI

ANALOG

INPUT BUFFER

+

–

SWIZSW

SW

1

SW

C

R

Z

Z

INT

INT

C

SZ

–

+

INTEGRATOR

SWITCH OPEN
SWITCH CLOSED

COMPARATOR

+

–

TO
DIGITAL
SECTION

ANALOG

SW

C

REF

SW

INPUT BUFFER

+
RI

–

RI

SW

1

+

–

SWIZSW

SW

Z

R

INT

Z

C

INT

C

SZ

–

+

INTEGRATOR

COMPARATOR

+

–

TO
DIGITAL
SECTION

SW

I

IN

–

SW

RI

SW

R

IN

SW

Z

+

SW

RI

SW

I

IN

Figure 3A. Analog Circuit Function Diagram

+

IN

REF

IN

ANALOG
COM

–

IN

SW

I

–

SW

SW

RI

C

R

+

SW

RI

I

SW

SW

Z

SW

Figure 3D. Reference Voltage Integration Cycle

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