Datasheet TC7652CPD, TC7652CPA Datasheet (TelCom Semiconductor)

TC7652
LOW NOISE, CHOPPER-STABILIZED OPERATIONAL AMPLIFIER
1

FEATURES

Low Offset Over Temperature Range ............ 10µV
Ultra-Low Long-Term Drift .................150nV/Month
Low Temperature Drift ............................. 100nV/°C
Low DC Input Bias Current ............................. 15pA
High Gain, CMRR and PSRR ................. 110dB Min
Low Input Noise Voltage .........0.2µV
Internally-Compensated for Unity-Gain Operation
Clamp Circuit for Fast Overload Recovery

PIN CONFIGURATIONS

C
B
C
A
NC
–INPUT
TC7652CPD
+INPUT
NC
V
SS
NC = NO INTERNAL CONNECTION (MAY BE USED AS INPUT GUARD)
14 13 12 11 10
INT/EXT EXT CLK
IN INT CLK
OUT V
DD
OUTPUT OUTPUT
CLAMP C
RET
C –INPUT +INPUT
V
A
SS
; DC to 1Hz
P-P
TC7652CPA
C
B
V
DD
OUTPUT CLAMP

GENERAL DESCRIPTION

The TC7652 is a lower noise version of the TC7650, sacrificing some input specifications (bias current and band­width) to achieve a 10x reduction in noise. All the other benefits of the chopper technique are present, i.e. freedom from offset adjust, drift, and reliability problems from exter­nal trim components. Like the TC7650, the TC7652 re­quires only two noncritical external caps for storing the chopped null potentials. There are no significant chopping spikes, internal effects or overrange lockup problems.

ORDERING INFORMATION

Temperature
Part No. Package Range
TC7652CPA 8-Pin Plastic DIP 0°C to +70°C TC7652CPD 14-Pin Plastic DIP 0°C to +70°C
2
3
4

FUNCTIONAL BLOCK DIAGRAM

OUTPUT CLAMP
(NOT ON "Z" PINOUT)
INPUTS
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OUTPUT CLAMP
CIRCUIT
MAIN AMPLIFIER
NULL
INTERMOD
COMPARATOR
BB
NULL AMPLIFIER
A
NULL
NOTE: 1. For 8-pin DIP connect to VSS, or to C
OSCILLATOR
BA
on "Z" pinout.
RET
5
TC7652
14-PIN DIP ONLY
INT/EXT EXT CLK IN CLK OUT
BA
C
EXT
OUTPUT
6
7
C
EXT
C
(NOTE 1)
RET
V
SS
8
TC7652-7 9/11/96
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TC7652
LOW NOISE, CHOPPER-ST ABILIZED
OPERATIONAL AMPLIFIER

ABSOLUTE MAXIMUM RATINGS

Total Supply Voltage (VDD to VSS) ........................... +18V
Input Voltage ........................ (V
Voltage on Oscillator Control Pins ...................VDD to V
Duration of Output Short Circuit ......................... Indefinite
Current Into Any Pin.................................................10mA
While Operating (Note 1) ..................................100µA
*Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability.
+ 0.3V) to (V
DD
ELECTRICAL CHARACTERISTICS: V
*
Package Power Dissipation (TA 70°C)
8-Pin Plastic DIP.............................................730mW
SS
– 0.3V)
SS
14-Pin Plastic DIP...........................................800mW
Storage Temperature Range ................– 65°C to +150°C
Operating Temperature Range
C Device ................................................0°C to +70°C
I Device.............................................– 25°C to +85°C
Lead Temperature (Soldering, 10 sec) .................+300°C
= +5V, VSS = – 5V, TA = +25°C, unless otherwise indicated.
DD
Symbol Parameter Test Conditions Min Typ Max Unit
V
OS
TCV
OS
VOS/DT Offset Voltage vs Time 150 nV/mo I
BIAS
I
BIAS
I
OS
R
IN
OL
V
OUT
CMVR Common-Mode – 4.3 +3.5 V
MRR Common-Mode CMVR = – 4.3V to +3.5V 120 140 dB
PSRR Power Supply ±3V to ±8V 120 140 dB
e
N
I
N
GBW Unity-Gain Bandwidth 0.4 MHz SR Slew Rate CL = 50 pF, RL = 10kW 1 V/µsec
VDD, V
SS
I
S
f
CH
NOTES: 1. Limiting input current to 100µA is recommended to avoid latch-up problems. Typically, 1mA is safe; however, this is not guaranteed.
Input Offset Voltage TA = +25°C—±2±5µV
0°C < TA < +70°C—±10
Average Temperature Coefficient of 0°C < TA < +70°C 0.01 0.05 µV/°C Input Offset Voltage
Input Bias Current TA = +25°C 30 100 pA (CLK On) 0°C < T
< +70°C 100
A
– 25°C < TA < +85°C 250 1000
Input Bias Current TA = +25°C 15 30 pA (CLK Off) 0°C < T
< +70°C—35
A
– 25°C < TA < +85°C 100 — Input Offset Current 25 150 pA Input Resistance 10 Large Signal Voltage Gain RL = 10kW, V
= ±4V 120 150 dB
OUT
12
—W
Output Voltage Swing RL = 10kW ±4.7 ±4.85 V (Note 2) RL = 100kW ±4.95
Voltage Range
Rejection Ratio
Rejection Ratio Input Noise Voltage RS = 100W, DC to 1Hz 0.2 1.5 µV
DC to 10Hz 0.7 5 µV
P-P P-P
Input Noise Current f = 10Hz 0.01 pA/Hz
Overshoot 15 % Operating Supply Range 5 16 V Supply Current No Load 1 3 mA Internal Chopping Frequency Pins 12 – 14 Open (DIP) 100 275 Hz Clamp ON Current (Note 3) RL = 100kW 25 100 µA Clamp OFF Current (Note 3) – 4V V
2. Output clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics.
< +10V 1 pA
OUT
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TELCOM SEMICONDUCTOR, INC.
LOW NOISE, CHOPPER-ST ABILIZED OPERATIONAL AMPLIFIER
1
TC7652

Capacitor Connection

Connect the null-storage capacitors to the CA and C pins with a common connection to the C TC7652) or to VSS (8-pin TC7652). When connecting to VSS, avoid injecting load current IR drops into the capacitive circuitry by making this connection directly via a separate wire or PC trace.
pin (14-pin
RET

Output Clamp

In chopper-stabilized amplifiers, the output clamp pin reduces overload recovery time. When a connection is made to the inverting input pin (summing junction), a current path is created between that point and the output pin, just before the device output saturates. This prevents uncon­trolled differential input voltages and charge buildup on correction-storage capacitors. Output swing is reduced.

Clock

The TC7652 has a 550Hz internal oscillator, which is divided by two before clocking the input chopper switches. The 275Hz chopping frequency is available at INT CLK OUT (pin 12) on 14-pin devices. In normal operation, INT/EXT (pin 14), which has an internal pull-up, can be left open.
An external clock can also be used. To disable the internal clock and use an external one, the INT/EXT pin must be tied to VSS. The external clock signal is then applied to the EXT CLK IN input (pin 13). An internal divide-by-two pro­vides a 50% switching duty cycle. The capacitors are only charged when EXT CLK IN is high, so a 50% to 80% positive duty cycle is recommended for higher clock frequencies. The external clock can swing between VDD and VSS, with the logic threshold about 2.5V below VDD.
The output of the internal oscillator, before the divide­by-two circuit, is available at EXT CLK IN when INT/EXT is high or unconnected. This output can serve as the clock input for a second TC7652 (operating in a master/slave mode), so that both op amps will clock at the same fre­quency. This prevents clock intermodulation effects when two TC7652's are used in a differential amplifier configura­tion.

TEST CIRCUIT

R
2
1 M
R
1
1 k
+
C
0.1 µF 0.1 µF
R
TC7652
C
OUTPUT
If the TC7652's output saturates, error voltages on the
external capacitors will slow overload recovery. This condi-
B
tion can be avoided if a strobe signal is available. The strobe signal is applied to EXT CLK IN and the overload signal is applied to the amplifier while the strobe is LOW. In this case, neither capacitor will be charged. The low leakage of the capacitor pins allow long measurements to be made with negligible errors (typical capacitor drift is 10µV/sec).
APPLICATION NOTES Component Selection
CA and CB (external capacitors) should be in the 0.1µF to 1µF range. For minimum clock ripple noise, use a 1µF capacitor in broad bandwidth circuits. For limited bandwidth applications where clock ripple is filtered out, use a 0.1µF capacitor for slightly lower offset voltage. High-quality film­type capacitors (polyester or polypropylene) are recom­mended, although a lower grade (ceramic) may work in some applications. For quickest settling after initial turn-on, use low dielectric absorption capacitors (e.g., polypropy­lene). With ceramic capacitors, settling to 1µV takes several seconds.

Static Protection

Although input diodes static-protect all device pins, avoid strong electrostatic fields and discharges that can cause degraded diode junction characteristics and produce increased input-leakage currents.

Latch-Up

Junction-isolated CMOS circuits have a 4-layer (p-n­p-n) structure similar to an SCR. Sometimes this junction can be triggered into a low-impedance state and produce excessive supply current. Therefore, avoid applying voltage greater than 0.3V beyond the supply rails to any pin. Estab­lish the amplifier supplies at the same time or before any input signals are applied. If this is not possible, drive circuits must limit input current flow to under 1mA to avoid latch-up, even under fault conditions.

Output Stage/Load Driving

The output circuit is high impedance (about 18k). With lesser loads, the chopper amplifier behaves somewhat like a transconductance amplifier with an open-loop gain propor­tional to load resistance. (For example, the open-loop gain is 17dB lower with a 1k load than with a 10k load.) If the amp is used only for DC, the DC gain is typically greater than 120dB (even with a 1k load), and this lower gain is inconsequential. For wideband, the best frequency response occurs with a load resistor of at least 10k. This produces
2
3
4
5
6
7
8
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TC7652

CONNECTION OF INPUT GUARDS

LOW NOISE, CHOPPER-ST ABILIZED
OPERATIONAL AMPLIFIER
Inverting Amplifier
R
2
+
OUTPUT
TC7652 TC7652
INPUT
R
1
Noninverting Amplifier
R
1
INPUT
a 6dB/octave response from 0.1Hz to 2MHz, with phase shifts of less than 2 degrees in the transition region, where the main amplifier takes over from the null amplifier.

Thermoelectric Effects

The thermoelectric (Seebeck) effects in thermocouple junctions of dissimilar metals, alloys, silicon, etc. limit ultra­high-precision DC amplifiers. Unless all junctions are at the same temperature, thermoelectric voltages around 0.1µV/ °C (up to tens of µV/°C for some materials) are generated. To realize the low offset voltages of the chopper, avoid temperature gradients. Enclose components to eliminate air movement, especially from power-dissipating elements in the system. Where possible, use low thermoelectric-coeffi­cient connections. Keep power supply voltages and power dissipation to a minimum. Use high-impedance loads and seek maximum separation from surrounding heat-dissipat­ing elements.

Guarding

To benefit from TC7652 low-input currents, take care assembling printed circuit boards. Clean boards with alco­hol or TCE, and blow dry with compressed air. To prevent contamination, coat boards with epoxy or silicone rubber.
Even if boards are cleaned and coated, leakage cur­rents may occur because input pins are next to pins at supply potentials. To reduce this leakage, use guarding to lower the
Follower
INPUT
R
2
+
OUTPUT
TC7652
+
OUTPUT
voltage difference between the inputs and adjacent metal runs. The guard (a conductive ring surrounding inputs) is connected to a low-impedance point at about the same voltage as inputs. The guard absorbs leakage currents from high-voltage pins.
The 14-pin dual-in-line arrangement simplifies guard­ing. Like the LM108 pin configuration (but unlike the 101A and 741), pins next to inputs are not used.

Pin Compatibility

Where possible, the 8-pin device pinout conforms to such industry standards as the LM101 and LM741. Null­storing external capacitors connect to pins 1 and 8, which are usually for offset-null or compensation capacitors. Output clamp (pin 5) is similarly used. For OP05 and OP07 devices, replacement of the offset-null potentiometer (connected between pins 1 and 8 and VDD by two capacitors from those pins to VSS) provides compatibility. Replacing the compensation capacitor between pins 1 and 8 by two capacitors to VSS is required. The same operation (with the removal of any connection to pin 5) works for LM101, µA748, and similar parts.
Because NC pins provide guarding between input and other pins, the 14-pin device pinout conforms closely to the LM108. Because this device does not use any extra pins and does not provide offset-nulling (but requires a compensation capacitor), some layout changes are necessary to convert to the TC7652.
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TELCOM SEMICONDUCTOR, INC.
LOW NOISE, CHOPPER-ST ABILIZED OPERATIONAL AMPLIFIER
1
TC7652

Some Applications

Figures 1 and 2 show basic inverting and noninverting amplifier circuits using the output clamping circuit to enhance overload recovery performance. The only limitations on replacing other op amps with the TC7652 are supply voltage (±8V maximum) and output drive capability (10k load for full swing). Overcome these limitations with a booster circuit (Figure 3) to combine output capabilities of the LM741 (or other standard device) with input capabilities of the TC7652. These two form a composite device; therefore, when adding the feedback network, monitor loop gain stability.
INPUT
0.1 µF
+
CLAMP
R
3
0.1 µF
R
R
TC7652
OUTPUT
2
1
Figure 4 shows the clamp circuit of a zero-offset com­parator. Because the clamp circuit requires the inverting input to follow the input signal, problems with a chopper­stabilized op amp are avoided. The threshold input must tolerate the output clamp current VIN/R without disrupting other parts of the system.
Figure 5 shows how the TC7652 can offset-null high slew-rate and wideband amplifiers.
Mixing the TC7652 with circuits operating at ±15V requires a lower supply voltage divider with the TC7660 voltage converter circuit operated "backwards." Figure 6 shows an approximate connection.
V
0.1 µF
IN
+
200 k
CLAMP
to 2 M
0.1 µF
TC7652
V
OUT
V
TH
2
3
4
Figure 1. Noninverting Amplifier With Optional Clamp
R
2
R
1
INPUT
0.1 µF 0.1 µF
Figure 2. Inverting Amplifier With Optional Clamp Figure 5. 1437 Offset-Nulled by TC7652
–7.5V
+
IN
TC7652
–7.5V
0.1 µF
CLAMP
+
0.1 µF
+15V
+
–15V
10 k
TC7652
OUTPUT
741
OUT
10 µF
Figure 4. Low Offset Comparator
+
IN
2
45
TC
7660
6
8 3
TC7652
22 k
+
AMPLIFIER
10 µF
1 M
FAST
22 k
OUT
+15V +7.5V 0V
5
6
7
Figure 3. Using 741 to Boost Output Drive Capability
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Figure 6. Splitting +15V With the 7660 at >95% Efficiency
8
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TC7652

TYPICAL CHARACTERISTICS

Supply Current vs ± Supply Voltage
1400
1200
1000
800
600
400
SUPPLY CURRENT (µA)
200
0
2345678
± SUPPLY VOLTAGE (V)
1 mA
0.1 mA
0.01 mA
0.1 µA
0.01 µA
CLAMP CURRENT
0.1 nA
0.01 nA
Negative Clamp Current
1 µA
1 nA
1 pA
4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0
OUTPUT VOLTAGE (V)
Noise at 0.1 Hz to 1 Hz
1 µV/DIV
1 sec/DIV
VOLTAGE (µV)
INPUT OFFSET
Input Offset Voltage vs Common-Mode Voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5 –6
LOW NOISE, CHOPPER-ST ABILIZED
Output Resistance
vs Output Voltage
–5.0
SINK
–4.0
SOURCE
OUTPUT VOLTAGE (V)
–3.0
100
1 µV/DIV
0.5V/DIV
–4
COMMON-MODE VOLTAGE (V)
1k 10k 100k 1M
OUTPUT RESISTANCE ()
Noise at 0.1 Hz to 100 Hz
1 sec/DIV
Slew Rate
5 µsec/DIV
–2 0 2 4
OPERATIONAL AMPLIFIER
1 mA
0.1 mA
0.01 mA
0.1 µA
0.01 µA
CLAMP CURRENT
0.1 nA
0.01 nA 1 pA
Positive Clamp Current
1 µA
1 nA
4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0
OUTPUT VOLTAGE (V)
Noise at 0.1 Hz to 10 Hz
2 µV/DIV
1 sec/DIV
Phase-Gain (Bode Plot)*
GAIN
60
50
PHASE
40
30 20
GAIN (dB)
10
0 –10 –20
1 10 100 1k 10k 100k 1M
*NOTE:
FREQUENCY (Hz)
±5V, ±2.5V supplies; no load to 10k load.
+240 +180 +120 +60
0 –60 –120 –180
PHASE (deg)
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