Datasheet TC7650CPD, TC7650CPA Datasheet (TelCom Semiconductor)

CHOPPER-STABILIZED OPERATIONAL AMPLIFIER

1

TC7650

FEATURES

■ Low Input Offset Voltage ......................... 0.7µV Typ

■ Low Input Offset Voltage Drift ......... 0.05µV/°C Max

■ Low Input Bias Current ............................ 10pA Max

■ High Impedance Differential CMOS Inputs.... 1012Ω

■ High Open-Loop Voltage Gain................ 120dB Min

■ Low Input Noise Voltage ............................2.0µVp-p

■ High Slew Rate.......................................... 2.5V/µsec

■ Low-Power Operation..................................... 20mW

■ Output Clamp Speeds Recovery Time

■ Compensated Internally for Stable Unity Gain

Operation

■ Direct Replacement for ICL7650

■ Available in 8-Pin Dip and 14-Pin Dip

ORDERING INFORMATION

Temperature Max

Part No. Package Range V

TC7650CPA 8-Pin Plastic DIP 0°C to +70°C5µV
TC7650CPD 14-Pin Plastic DIP 0°C to +70°C5µV

OS

GENERAL DESCRIPTION

The TC7650 CMOS chopper-stabilized operational
amplifier practically removes offset voltage error terms
from system error calculations. The 5µV maximum V
specification, for example, represents a 15 times improve­ment over the industry-standard OP07E. The 50nV/°C off­set drift specification is over 25 times lower than the OP07E.
The increased performance eliminates VOS trim proce­dures, periodic potentiometer adjustment and the reliability
problems caused by damaged trimmers.

The TC7650 performance advantages are achieved
without the additional manufacturing complexity and cost
incurred with laser or "zener zap" VOS trim techniques.

The TC7650 nulling scheme corrects both DC V
errors and VOS drift errors with temperature. A nulling
amplifier alternately corrects its own VOS errors and the main
amplifier VOS error. Offset nulling voltages are stored on two
user-supplied external capacitors. The capacitors connect
to the internal amplifier VOS null points. The main amplifier
input signal is never switched. Switching spikes are not
present at the TC7650 output.

The 14-pin dual-in-line package (DIP has an external
oscillator input to drive the nulling circuitry for optimum noise
performance. Both the 8 and 14-pin DIPs have an output
voltage clamp circuit to minimize overload recovery time.

OS

OS

2

3

4

5

FUNCTIONAL BLOCK DIAGRAM

OUTPUT

CLAMP

INPUTS

*

FOR 8-PIN DIP, CONNECT TO VSS.

A

OUTPUT CLAMP

CIRCUIT

MAIN
AMPLIFIER

NULL

INTERMOD

COMPENSATION

BB

NULL
AMPLIFIER

NULL

OSCILLATOR

TELCOM SEMICONDUCTOR, INC.

AB

BA

14-PIN DIP ONLY

INT/EXT
EXT CLK IN
CLK OUT

OUTPUT

C

EXT

C

EXT

TC7650

*

C

RET

PIN CONFIGURATIONS

1

C

A

(–)

INPUT

2

(+)

(GUARD)

(–)
(+)

(GUARD)

3

INPUT

V

SS

4

C

1

B

C

2

A

NC

3

INPUT

4

INPUT

5

NC

6

V

7

SS

NC = NO INTERNAL CONNECTION

8-Pin DIP

TC7650CPA

14-Pin DIP

TC7650CPD

C

8
7
6
5

14
13
12
11
10

9
8

B

V

DD

OUTPUT
CLAMP

INT/EXT
EXT CLK

INPUT
INT CLK
OUTPUT

V

DD

OUTPUT

OUTPUT
CLAMP

C

RETN

6

7

8

TC7650-5 9/11/96

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TC7650

CHOPPER-STABILIZED

OPERATIONAL AMPLIFIER

ABSOLUTE MAXIMUM RATINGS*

Total Supply Voltage (VDD to VSS) ..............................18V

Input Voltage ........................ (V

Storage Temperature Range ................– 65°C to +150°C

Lead Temperature (Soldering, 10 sec) ...................300°C

Voltage on Oscillator Control Pins ...................V

Output Short Circuit Duration ............................. Indefinite

Current Into Any Pin.................................................10mA

While Operating (Note 3)..................................100µA

Operating Temperature Range

+ 0.3V) to (V

DD

– 0.3V)

SS

DD

to V

Package Power Dissipation (TA ≤ 70°C)

8-Pin Plastic DIP.............................................730mW

14-Pin Plastic DIP...........................................800mW

*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-

SS

nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.

C Device ................................................ 0°C to +70°C

ELECTRICAL CHARACTERISTICS: V

= +5V, VSS = –5V, CA = CB = 0.1µF, TA = 25°C, unless otherwise

DD

indicated.

Symbol Parameter Test Conditions Min Typ Max Units

Input

V

OS

∆V

/∆T Input Offset Voltage Operating Temperature Range — 0.01 0.05 µV/°C

OS

I

BIAS

I

OS

e

NP-P

I

N

R

IN

CMVR Common-Mode – 5 – 5.2 +1.6 V

CMRR Common-Mode CMVR = –5V to +1.5V 120 130 — dB

Output

A Large Signal Voltage RL = 10kΩ 120 130 — dB

V

OUT

Dynamic

B

W

S

R

t

R

f

CH

Input Offset Voltage TA = +25°C—±0.7 ±5—

Over Operating Temp Range — ± 1.0 — µV

Average Temperature
Coefficient

Offset Voltage vs. Time — 100 — nV/

month

Input Bias Current TA = +25°C — 1.5 10 pA

0°C ≤ T

≤ +70°C — 35 150 pA

A

–25°C ≤ TA ≤ +85°C — 100 400 pA
Input Offset Current — 0.5 — pA
Input Noise Voltage RS = 100Ω, 0 to 10Hz — 2 — µV

P-P

Input Noise Current f = 10 Hz — 0.01 — pA/√Hz
Input Resistance — 10

12

Ω

Voltage Range to +2

Rejection Ratio

Gain
Output Voltage Swing (Note 2) RL = 10kΩ±4.7 ±4.85 — V

RL = 100kΩ — ±4.95 — V
Clamp ON Current RL = 100kΩ 25 70 200 µA

(Note 1)
Clamp OFF Current – 4V < V

< +4V — 1 — pA

OUT

(Note 1)

Unity-Gain Bandwidth Unity Gain (+1) — 2.0 — MHz
Slew Rate CL = 50 pF, RL = 10kΩ — 2.5 — V/µsec
Rise Time — 0.2 — µsec
Overshoot — 20 — %
Internal Chopping Pins 12–14 Open (DIP) 120 200 375 Hz

Frequency

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TELCOM SEMICONDUCTOR, INC.

CHOPPER-STABILIZED
OPERATIONAL AMPLIFIER

1

TC7650

ELECTRICAL CHARACTERISTICS: V

specified.

Symbol Parameter Test Conditions Min Typ Max Units
Supply

VDD, V

SS

I

S

PSRR Power Supply V

NOTES: 1. See "Output Clamp" discussion.

2. Output clamp not connected. See typical characteristics curves for output swing versus clamp current characteristics.

3. Limiting input current to 100µA is recommended to avoid latch-up problems.

Operating Supply Range 4.5 — 16 V
Supply Current No Load — 2 3.5 mA

Rejection Ratio

Theory of Operation

Figure 1 shows the major elements of the TC7650.
There are two amplifiers (the main amplifier and the nulling
amplifier), and both have offset-null capability. The main
amplifier is connected full-time from the input to the output.
The nulling amplifier, under the control of the chopping
frequency oscillator and clock circuit, alternately nulls itself
and the main amplifier. Two external capacitors provide the
required storage of the nulling potentials and the necessary
nulling-loop time constants. The nulling arrangement oper­ates over the full common-mode and power-supply ranges,
and is also independent of the output level, thus giving
exceptionally high CMRR, PSRR, and A

Careful balancing of the input switches minimizes chop­per frequency charge injection at the input terminals, and the
feed-forward-type injection into the compensation capacitor
that can cause output spikes in this type of circuit.

The circuit's offset voltage compensation is easily shown.
With the nulling inputs shorted, a voltage almost identical to
the nulling amplifier offset voltage is stored on CA. The
effective offset voltage at the null amplifier input is:

V

OSE

After the nulling amplifier is zeroed, the main amplifier is

zeroed; the A switches open and B switches close.

The output voltage equation is:

V

OUT

Substituting (1) → (2) and assuming AN >>1:

V

OUT

1

= V

AN + 1

= AM [V

= AM AN (V+ – V–) +

OSN

+(V+ – V–) + AN(V+– V–) + AN V

OSM

[

V

OSM

+ V

A

N

VOL

OSN

= +5V, VSS = – 5V, CA = CB = 0.1µF, TA = 25°C, unless otherwise

DD

= ±3V to ±8V 120 130 dB

S

As desired, the device offset voltages are reduced by

the high open-loop gain of the nulling amplifier.

Output Stage/Loading

The output circuit is a high-impedance stage (approxi­mately 18kΩ). With loads less than this, the chopper ampli­fier behaves in some ways like a transconductance amplifier
whose open-loop gain is proportional to load resistance. For
example, the open-loop gain will be 17dB lower with a 1kΩ
load than with a 10kΩ load. If the amplifier is used strictly for
DC, the lower gain is of little consequence, since the DC gain

.

is typically greater than 120dB, even with a 1kΩ load. In
wideband applications, the best frequency response will be
achieved with a load resistor of 10kΩ or higher. This results
in a smooth 6 dB/octave response from 0.1Hz to 2 MHz, with
phase shifts of less than 10° in the transition region, where
the main amplifier takes over from the null amplifier. The
clock frequency sets the transition region.

Intermodulation

Previous chopper-stabilized amplifiers have suffered
from intermodulation effects between the chopper frequency

(1)

and input signals. These arise because the finite AC gain of
the amplifier results in a small AC signal at the input. This is
seen by the zeroing circuit as an error signal, which is
chopped and fed back, thus injecting sum and difference
frequencies, and causing disturbances to the gain and
phase versus frequency characteristics near the chopping

(2)

frequency. These effects are substantially reduced in the
TC7650 by feeding the nulling circuit with a dynamic current
corresponding to the compensation capacitor current in
such a way as to cancel that portion of the input signal due

(3)

to a finite AC gain. The intermodulation and gain/phase
disturbances are held to very low values, and can generally
be ignored.

]

OSE

]

2

3

4

5

6

7

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8

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TC7650

CHOPPER-STABILIZED

OPERATIONAL AMPLIFIER

+

V

ANALOG INPUT

–

V

TC7650

Figure 1. TC7650 Contains a Nulling and Main Amplifier. Offset Correction Voltages Are Stored on Two External Capacitors.

V

V

DD

SS

11

4

5

–

TC7650

+

2

7

10

1

8

2

3

–

+

1

B

A

V

DD

7

TC7650

C

8

+

NULL

–

NULL
AMPLIFIER

GAIN = A , OFFSET = V

N OSN

B

A

The 14-pin DIP device can be driven by an external
clock. The INT/EXT input (pin 14) has an internal pull-up and
may be left open for internal clock operation. If an external
clock is used, INT/EXT must be tied to VSS (pin 7) to disable

6

the internal clock. The external clock signal is applied to the
external clock input (pin 13).

4

B

V

SS

The external clock amplitude should swing between
VDD and ground for power supplies up to ±6V and between
V+ and V+ – 6V for higher supply voltages.

MAIN
AMPLIFIER

+
NULL

–

GAIN = A

V

M

C

B

C

A

At low frequencies the external clock duty cycle is not

CAC

B

14-PIN PACKAGE 8-PIN PACKAGE

Figure 2. Nulling Capacitor Connection

C

A

critical, since an internal divide-by-two gives the desired
50% switching duty cycle. The offset storage correction
capacitors are charged only when the external clock input is
high. A 50% to 80% external clock positive duty cycle is
desired for frequencies above 500Hz to guarantee tran­sients settle before the internal switches open.

Nulling Capacitor Connection

The offset voltage correction capacitors are connected
to CA and CB. The common capacitor connection is made to
VSS (pin 4) on the 8-pin packages and to capacitor return
(CR, pin 8) on the 14-pin packages. The common connec­tion should be made through a separate PC trace or wire to
avoid voltage drops. The capacitors outside foil, if possible,
should be connected to CR or VSS.

The external clock input can also be used as a strobe
input. If a strobe signal is connected at the external clock
input so that it is LOW during the time an overload signal is
applied, neither capacitor will be charged. The leakage
currents at the capacitors pins are very low. At 25°C a typical
TC7650 will drift less than 10µV/sec.

Output Clamp

Chopper-stabilized systems can show long recovery

Clock Operation

The internal oscillator is set for a 200Hz nominal chop­ping frequency on both the 8- and 14-pin DIPs. With the
14-pin DIP TC7650, the 200Hz internal chopping frequency
is available at the internal clock output (pin 12). A 400Hz
nominal signal will be present at the external clock input pin
(pin 13) with INT/EXT high or open. This is the internal clock
signal before a divide-by-two operation.

times from overloads. If the output is driven to either supply
rail, output saturation occurs. The inputs are no longer held
at a "virtual ground." The VOS null circuit treats the differen­tial signal as an offset and tries to correct it by charging the
external capacitors. The nulling circuit also saturates. Once
the input signal returns to normal, the response time is
lengthened by the long recovery time of the nulling amplifier
and external capacitors.

Through an external clamp connection, the TC7650

OUT

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TELCOM SEMICONDUCTOR, INC.

CHOPPER-STABILIZED
OPERATIONAL AMPLIFIER

1

TC7650

eliminates the overload recovery problem by reducing the
feedback network gain before the output voltage reaches
either supply rail.

INTERNAL
POSITIVE CLAMP BIAS V –V V – 0.7V

P-CHANNEL

OUTPUT
CLAMP PIN

N-CHANNEL

INTERNAL
NEGATIVE CLAMP BIAS V + V

TC7650
OUTPUT PIN

Figure 3. Internal Clamp Circuit

C

+

–

0.1µF

*

R

CLAMP

*

CONNECT TO V
ON 8-PIN DIP.

INPUT

+ ( / )

R

FOR FULL CLAMP EFFECT.

Figure 4. Noninverting Amplifier With Optional Clamp

1

3

SS

R2R

100k Ω

≥

++

≈≈

C

R

3

T

–

≈

–

≈

V + 0.7V

R

R

T

2

1

TC7650

OUTPUT

The output clamp circuit is shown in Figure 3, with typical
inverting and noninverting circuit connections shown in
Figures 4 and 5. Output voltage versus clamp circuit current
characteristics are shown in the typical operating curves.
For the clamp to be fully effective, the impedance across the
clamp output should be greater than 100kΩ.

Latch-Up Avoidance

Junction-isolated CMOS circuits inherently include a
parasitic 4-layer (p-n-p-n) structure which has characteris­tics similar to an SCR. Under certain circumstances this
junction may be triggered into a low-impedance state, result­ing in excessive supply current. To avoid this condition, no
voltage greater than 0.3V beyond the supply rails should be
applied to any pin. In general, the amplifier supplies must be
established either at the same time or before any input
signals are applied. If this is not possible, the drive circuits
must limit input current flow to under 0.1mA to avoid latch­up.

Thermoelectric Potentials

Precision DC measurements are ultimately limited by
thermoelectric potentials developed in thermocouple junc­tions of dissimilar metals, alloys, silicon, etc. Unless all
junctions are at the same temperature, thermoelectric volt­ages, typically around 0.1µV/°C, but up to tens of µV/°C for
some materials, will be generated. In order to realize the
benefits extremely-low offset voltages provide, it is essential
to take special precautions to avoid temperature gradients.
All components should be enclosed to eliminate air move­ment, especially those caused by power-dissipating ele­ments in the system. Low thermoelectric-coefficient con­nections should be used where possible and power supply
voltages and power dissipation should be kept to a mini­mum. High-impedance loads are preferable, and separation
from surrounding heat-dissipating elements is advised.

2

3

4

5

6

R

1

INPUT

*

CONNECT TO V
ON 8-PIN DIP.

Figure 5. Inverting Amplifier with Optional Clamp

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–

R

CLAMP

–

+

C

µ

0.1 F

R

R

2

C

*

( )

R

FOR FULL CLAMP
EFFECT.

µ

0.1 F

Pin Compatibility

TC7650

OUTPUT

100k Ω

R

≥

2

1

On the 8-pin mini-DIP TC7650, the external null storage
capacitors are connected to pins 1 and 8. On most other
operational amplifiers these are left open or are used for
offset potentiometer or compensation capacitor connec­tions.

For OP05 and OP07 operational amplifiers, the replace­ment of the offset null potentiometer between pins 1 and 8
by two capacitors from the pins to VSS will convert the OP05/
07 pin configurations for TC7650 operation. For LM108
devices, the compensation capacitor is replaced by the
external nulling capacitors. The LM101/748/709 pinouts
are modified similarly by removing any circuit connections to
pin 5. On the TC7650, pin 5 is the output clamp connection.

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7

8

TC7650

CHOPPER-STABILIZED

OPERATIONAL AMPLIFIER

Other operational amplifiers may use this pin as an offset
or compensation point.

The minor modifications needed to retrofit a TC7650
into existing sockets operating at reduced power supply
voltages make prototyping and circuit verification straight­forward.

Input Guarding

High impedance, low leakage CMOS inputs allow the
TC7650 to make measurements of high-impedance sources.
Stray leakage paths can increase input currents and de­crease input resistance unless inputs are guarded. A guard
is a conductive PC trace surrounding the input terminals.
The ring connects to a low-impedance point at the same
potential as the inputs. Stray leakages are absorbed by the
low-impedance ring. The equal potential between ring and
inputs prevents input leakage currents. Typical guard con­nections are shown in Figure 6.

The 14-pin DIP configuration has been specifically
designed to ease input guarding. The pins adjacent to the
inputs are unused.

In applications requiring low leakage currents, boards
should be cleaned thoroughly and blown dry after soldering.
Protective coatings will prevent future board contamination.

Component Selection

The two required capacitors, CA and CB, have optimum
values, depending on the clock or chopping frequency. For
the preset internal clock, the correct value is 0.1µF. To
maintain the same relationship between the chopping fre­quency and the nulling time constant, the capacitor values
should be scaled in proportion to the external clock, if used.
High-quality film-type capacitors (such as Mylar) are pre­ferred; ceramic or other lower-grade capacitors may be
suitable in some applications. For fast settling on initial turn­on, low dielectric absorption capacitors (such as polypro­pylene) should be used. With ceramic capacitors, several
seconds may be required to settle to 1µV.

INPUT

Inverting Amplifier

R

1

R

2

–

+

*

R

3

Noninverting Amplifier

R

2

*

R

R

1

NOTE: R =

3

INPUT

3

R1R

R1R2+

–

+

SHOULD BE LOW
IMPEDANCE FOR

2

OPTIMUM GUARDING.

Follower

*

R

3

–

INPUT

Figure 6. Input Guard Connection

+

OUTPUT

OUTPUT

OUTPUT

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CHOPPER-STABILIZED
OPERATIONAL AMPLIFIER

TYPICAL CHARACTERISTICS

1

TC7650

Positive Clamp Current

1 mA

0.1 mA

0.01 mA

0.1 A

0.01 A

CLAMP CURRENT

0.1 nA

0.01 nA

TA = +25°C
V

= ±5V

S

1 Aµ

µ
µ

1 nA

1 pA

4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0

3.0
TA = +25°C

2.6

2.2

1.8

SUPPLY CURRENT (mA)

1.4

vs. Output Voltage

OUTPUT VOLTAGE (V)

Supply Current vs.

Supply Voltage

Negative Clamp Current

1 mA

1 Aµ

µ
µ

1 nA

1 pA

–4.0 –4.1 –4.2

TA = +25°C
V

= ±5V

S

0.1 mA

0.01 mA

0.1 A

0.01 A

CLAMP CURRENT

0.1 nA

0.01 nA

Gain/Phase vs. Frequency

30
20
10

0

–10
–20

GAIN (dB)

–30
–40

CLOSED-LOOP

–50

GAIN = 20

–

vs. Output Voltage

–4.4 –4.5 –4.6 –4.7 –4.8 –4.9 –5.0

–4.3

OUTPUT VOLTAGE (V)

GAIN

PHASE

225
180
135
90
45
0
–45

–90
–135
–

2

3

4

5

6

PHASE (deg)

7

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8

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