TelCom Semiconductor Inc TC1412NEPA, TC1412NEOA, TC1412NCPA, TC1412NCOA, TC1412EPA Datasheet

2A HIGH-SPEED MOSFET DRIVERS

1

TC1412

TC1412N

FEATURES

■ Latch-Up Protected: Will Withstand 500mA

Reverse Current

■ Input Will Withstand Negative Inputs Up to 5V

■ ESD Protected.....................................................4kV

■ High Peak Output Current .................................. 2A

■ Wide Operating Range ..........................4.5V to 16V

■ High Capacitive Load

Drive Capability .......................... 1000pF in 18nsec

■ Short Delay Time .................................. 35nsec Typ

■ Consistent Delay Times With Changes in

Supply Voltage

■ Matched Delay Times

■ Low Supply Current

— With Logic “1” Input ................................. 500µA

— With Logic “0” Input ................................. 150µA

■ Low Output Impedance ....................................... 4Ω

■ Pinout Same as TC1410/11/13

PIN CONFIGURATIONS

V

NC

GND

DD

IN

1
2

TC1411

3
4

2 6, 7

INVERTING

8

V

DD

OUT

7
6

OUT

5

GND

NC = NO INTERNAL CONNECTION

NOTE: SOIC pinout is identical to DIP.

V

NC

GND

1

DD

2

IN

3
4

TC1411N

2 6, 7

NONINVERTING

8

V

DD

OUT

7
6

OUT

5

GND

GENERAL DESCRIPTION

The TC1412/1412N are 2A CMOS buffer/drivers. They
will not latch up under any conditions within their power and
voltage ratings. They are not subject to damage when up to
5V of noise spiking of either polarity occurs on the ground
pin. They can accept, without damage or logic upset, up to
500 mA of current of either polarity being forced back into
their output. All terminals are fully protected against up to 4
kV of electrostatic discharge.

As MOSFET drivers, the TC1412/1412N can easily
switch 1000 pF gate capacitance in 18 ns with matched rise
and fall times, and provide low enough impedance in both
the ON and the OFF states to ensure the MOSFET’s
intended state will not be affected, even by large transients.
The rise and fall time edges are matched to allow driving
short-duration inputs with greater accuracy.

ORDERING INFORMATION

Part No. Package Temp. Range

TC1412COA 8-Pin SOIC 0°C to +70°C
TC1412CPA 8-Pin Plastic DIP 0°C to +70°C
TC1412EOA 8-Pin SOIC – 40°C to +85°C
TC1412EPA 8-Pin Plastic DIP – 40°C to +85°C

TC1412NCOA 8-Pin SOIC 0°C to +70°C
TC1412NCPA 8-Pin Plastic DIP 0°C to +70°C
TC1412NEOA 8-Pin SOIC – 40°C to +85°C
TC1412NEPA 8-Pin Plastic DIP – 40°C to +85°C

2

3

4

5

6

FUNCTIONAL BLOCK DIAGRAM

INPUT

GND

EFFECTIVE

INPUT

C = 10pF

TELCOM SEMICONDUCTOR, INC.

4.7V

300mV

TC1411

INVERTING

OUTPUTS

NONINVERTING

OUTPUTS

TC1411N

V

DD

OUTPUT

7

8

TC1412/N-7 10/11/96

4-195

TC1412
TC1412N

2A HIGH-SPEED MOSFET DRIVERS

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage ......................................................... +20V

Input Voltage, IN A or IN B. (V

+ 0.3V) to (GND – 5.0V)

DD

Maximum Chip Temperature................................. +150°C

Storage Temperature Range ................– 65°C to +150°C

Lead Temperature (Soldering, 10 sec) .................+300°C

Package Thermal Resistance

CerDIP R
CerDIP R
PDIP R
PDIP R
SOIC R
SOIC R

................................................ 150°C/W

θJ-A

.................................................. 50°C/W

θJ-C

................................................... 125°C/W

θJ-A

..................................................... 42°C/W

θJ-C

................................................... 155°C/W

θJ-A

..................................................... 45°C/W

θJ-C

ELECTRICAL CHARACTERISTICS: Over operating temperature range with 4.5V ≤ V

wise specified. Typical values are measured at TA = 25°C; V

Operating Temperature Range

C Version............................................... 0°C to +70°C

E Version ..........................................– 40°C to +85°C

Power Dissipation (TA ≤ 70°C)

Plastic .............................................................730mW

CerDIP............................................................800mW

SOIC...............................................................470mW

*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under "Absolute Maximum Ratings" may cause perma­nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operation sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.

≤ 16V, unless other-

DD

= 16V.

DD

Symbol Parameter Test Conditions Min Typ Max Unit
Input

V

IH

V

IL

I

IN

Logic 1 High Input Voltage 2.0 — — V
Logic 0 Low Input Voltage — — 0.8 V
Input Current –5V ≤ VIN ≤ V

DD

TA = 25°C – 1 — 1 µA
– 40°C ≤ TA ≤ 85°C

– 10 — 10

Output

V
V
R

I

PK

I

REV

OH
OL
O

High Output Voltage DC Test V

– 0.025 — — V

DD

Low Output Voltage DC Test — — 0.025 V
Output Resistance VDD = 16V, IO = 10mA TA = 25°C —46Ω

0°C ≤ T
– 40°C ≤ TA ≤ 85°C

≤ 70°C — 5 7

A

— 5 7
Peak Output Current VDD = 16V — 2.0 — A
Latch-Up Protection Duty Cycle ≤ 2% 0.5 — — A

Withstand Reverse Current t ≤ 300 µsec

V

DD

= 16V

Switching Time (Note 1)

t

R

t

F

t

D1

t

D2

Rise Time Figure 1 TA = 25°C — 18 26 nsec

0°C ≤ T
– 40°C ≤ TA ≤ 85°C

≤70°C — 20 31

A

— 22 31
Fall Time Figure 1 TA = 25°C — 18 26 nsec

0°C ≤ T
– 40°C ≤ TA ≤ 85°C

≤ 70°C — 20 31

A

— 22 31
Delay Time Figure 1 TA = 25°C — 35 45 nsec

0°C ≤ T
– 40°C ≤ TA ≤ 85°C

≤ 70°C — 40 50

A

—4050

Delay Time Figure 1 TA = 25°C — 35 45 nsec

0°C ≤ T
– 40°C ≤ T

≤ 70°C — 40 50

A

≤ 85°C

A

— 40 50

Power Supply

I

S

NOTE: 1. Switching times are guaranteed by design.

Power Supply Current VIN = 3V — 0.5 1.0 mA

VIN = 0V — 0.1 0.15

VDD = 16V

4-196

TELCOM SEMICONDUCTOR, INC.