Tektronix TMS822 Instruction Manual

Instruction Manual
TMS822 UTOPIA1/UTOPIA2 Software Support
071-1058-01
www.tektronix.com
Copyright © Tektronix, Inc. All rights reserved.
Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this public ation supercedes that in all previously published material. Specifications and price c hange privileges reserved.
TEKTRONIX and TEK are registered trademarks of Tektronix, Inc.

SOFTWARE WARRANTY

Tektronix warrants that the media on which this software product is furnished and the encoding of the programs on the media will be free from defects in materials and workmanship for a period of three (3) months from the date of shipment. If a medium or encoding proves defective during the warranty period, Tektronix will provide a replacement in exchange for the defective medium. Except as to the media on which this software product is furnished, this software product is provided “as is” without warranty of any kind, either express or implied. Tektronix does not warrant that the functions contained in this software product will meet Customer’s requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration of the warranty period. If Tektronix is unable to provide a replacement that is free from defects in materials and workmanship within a reasonable time thereafter, Customer may terminate the license for this software product and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’ RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.

Table of Contents

Getting Started
Operating Basics
Preface vii...................................................
Manual Conventions vii..............................................
Contacting Tektronix viii.............................................
Support Package Descri ption 1--1.......................................
Logic Analyzer Software Compatibility 1--2..............................
Logic Analyzer Configuration 1--2......................................
Requirements and Restrictions 1--3......................................
Timing Display Format 1--6...........................................
Functionality Not Supported 1--6.......................................
Functionality Supported but Not Tested 1--7...............................
Connecting the Logic Analyzer to a Target System 1--7.....................
Labeling P6434 Probes 1--8............................................
Setting Up the Support 2--1.....................................
Installing the Support Software 2--1.....................................
Support Package Setups 2--1...........................................
Channel Group Definitions 2--2.........................................
Clocking 2--3.......................................................
Clocking Options 2--3.............................................
Custom Cl ocking 2--3.............................................
Acquiring and Viewing Disassembled Data 2--7....................
Acquiring Data 2--7..................................................
Signal Acquisition 2--7...............................................
Signal Acquisition in Transmit Mode 2--7.............................
Signal Acquisition in Receive Mode 2--10.............................
Viewing Disassembled Data 2--14........................................
All Utopia Cycles Display Format 2--15...............................
All UtopiaL2p Cycles Display Format 2--16............................
ATM Cells Display Format 2--16.....................................
PPP Packets Display Format 2--17....................................
ATM Cell Headers Display Format 2--17...............................
Polling Cycles Display Format 2--18..................................
UTOPIA2 Specific Labels 2--18.........................................
Changing How Data is Displayed 2--22...................................
Optional Display Selections 2--22....................................
Bus Specific Fields 2--23...........................................
Trigger Programs 2--27..........................................
Installing Trigger Programs 2--27........................................
Loading Trigger Programs 2--27.........................................
TMS822 UTOPIA1/UTOPIA2 Software Support
i
Table of Contents
Reference
Specifications
Replaceable Parts List
Symbol and Channel Assignment Tables 3--1......................
Symbol Tables 3--1..................................................
Channel Assignment Tables 3--3........................................
Channel Assignment for Utopia2 Receive Interface 3--3.................
Channel Assignments for Utopia2 Transmit Interface 3--6................
Logic Analyzer Channels not Connected 3--8..........................
Clock and Qualifier Channels 3--8...................................
Additional Signals Required for Disassembly from Utopia L2p
Interface 3--9.............................................
Signals not Required for Disassembly 3--10............................
Signal Source To Mictor Connections 3--11................................
Connections for Utopia2 Receive Interface 3--11........................
Connections for Utopia2 Transmit Interface 3--14.......................
Specification Tables 4--1..............................................
Index
Parts Ordering Information 5--1.........................................
Using the Replaceable Parts List 5--1....................................
ii
TMS822 UTOPIA1/UTOPIA2 Software Support

List of Figures

Table of Contents
Figure 2--1: Tx bus mode timing diagram 2--8......................
Figure 2--2: Polling and selection ph ase at Transmit interface 2--10.....
Figure 2--3: Handshaking between the PHY and ATM layer
in Single physical mode 2 --11.................................
Figure 2--4: Handshaking between the PHY and ATM layer
in Multi physical mode 2--11..................................
Figure 2--5: Polling and selection ph ase at Receive interface 2--14......
Figure 2--6: Example of All Utopia Cycles display format 2--16........
Figure 2--7: Example of ATM Cells display format 2--17..............
Figure 2--8: Example of ATM Cell Headers display format 2--18.......
Figure 2--9: Loading trigger programs 2--28........................
TMS822 UTOPIA1/UTOPIA2 Software Support
iii
Table of Contents

List of Tables

Table 1--1: Invalid disassembly and clocking combinations 1--4.......
T able 2--1: Receive bus group names 2--2.........................
Table 2--2: Transmit bus group names 2--3.......................
Table 2--3: Sample points in Tx mode 2--8.........................
Table 2--4: Signals in the ATM Cell/PPP Packets option 2--9.........
Table 2--5: Signals in the ATM Cell Headers option 2--9.............
Table 2--6: Sample points in Rx mode 2--12........................
Table 2--7: Single physical mode 2--12.............................
Table 2--8: Multi physical mode 2--13.............................
T able 2--9: Description of special characters in the display 2--15.......
Table 2--10: UTOPIA2 specific labels 2--19.........................
Table 2--11: Logic analyzer disassembly display options 2--22.........
Table 3--1: UTOPIA2RX_Ctrl group symbol table definitions 3--1....
Table 3--2: UTOPIA2TX_Ctrl group symbol table definitions 3--2....
Table 3--3: UTOPIA2RX_L2pctrl group symbol table
definitions 3--2............................................
Table 3--4: UTOPIA2TX_L2pctrl group symbol table
definitions 3--2............................................
Table 3--5: Address group channel assignments for UTOPIA2RX
signals 3--3...............................................
Table 3--6: Data group channel assignments for UTOPIA2RX
signals 3--3...............................................
Table 3--7: Control group channel assignments for UTOPIA2RX
signals 3--4...............................................
Table 3--8: RXCLAV group channel assignments for UTOPIA2RX
signals 3--5...............................................
Table 3--9: Parity group channel assignments for UTOPIA2RX
signals 3--5...............................................
Table 3--10: L2PControl group channel assignments for UTOPIA2RX
signals 3--5...............................................
Table 3--11: Address group channel assignments for UTOPIA2TX
signals 3--6...............................................
Table 3--12: Data group channel assignments for UTOPIA2TX
signals 3--6...............................................
iv
TMS822 UTOPIA1/UTOPIA2 Software Support
Table of Contents
Table 3--13: Control group channel assignments for UTOPIA2TX
signals 3--7...............................................
Table 3--14: TXCLAV group channel assignments for UTOPIA2TX
signals 3--7...............................................
Table 3--15: Parity group channel assignments for UTOPIA2TX
signals 3--8...............................................
Table 3--16: L2PControl group channel assignments for UTOPIA2TX
signals 3--8...............................................
Table 3--17: Clock channel assignments for UTOPIA2RX 3--8........
Table 3--18: Clock channel assignments for UTOPIA2TX 3--9........
Table 3--19: Qualifier channel assignments for UTOPIA2RX 3--9.....
Table 3--20: Qualifier channel assignments for UTOPIA2TX 3--9.....
Table 3--21: Signals required for Utopia Level 2 Plus Transmit
interface 3--9..............................................
T able 3--22: Signals required for Utopia Level 2 Plus Receive
interface 3--10..............................................
Table 3--23: Signals not required for UTOPIA2TX support 3--10......
Table 3--24: Signals not required for UTOPIA2RX support 3--10......
Table 3--25: Recommended pin assignments for a Mictor connector
(component side) 3--11.......................................
Table 3--26: Signal Source to Mictor connections for Mictor A pins
for UTOPIA2RX 3--11......................................
Table 3--27: Signal Source to Mictor connections for Mictor C pins
for UTOPIA2RX 3--12......................................
Table 3--28: Signal Source to Mictor connections for Mictor A pins
for UTOPIA2TX 3--14.......................................
Table 3--29: Signal Source to Mictor connections for Mictor C pins
for UTOPIA2TX 3--14.......................................
T able 4--1: Electrical specifications 4--1...........................
TMS822 UTOPIA1/UTOPIA2 Software Support
v
Table of Contents
vi
TMS822 UTOPIA1/UTOPIA2 Software Support

Preface

This instruction manual contains specific information about the TMS822 UTOPIA2 software support package and is part of a set of information on how to operate this product on compatible Tektronix logic analyzers.
If you are familiar with operating bus support packages on the logic analyzer for which the TMS822 UTOPIA2 support was purchased, you will probably only need this instruction manual to set up and run the support.
If you are not familiar with operating bus support packages, you will need to supplement this instruction manual with information on basic operations to set up and run the support.
Information on basic operations of bus support packages is included with each product. Each logic analyzer includes basic information that describes how to perform tasks common to support packages on that platform. This information can be in the form of logic analyzer online help, an installation manual, or a user manual.
This manual provides detailed information on the following topics:
H Connecting the logic analyzer to the target system

Manual Conventions

H Setting up the logic analyzer to acquire data from the target system
H Acquiring and viewing disassembled data
This manual uses the following conventions:
H The term “disassembler” refers to the software that disassembles bus cycles
into header and payload information.
H The phrase “information on basic operations” refers to logic analyzer online
help or a user manual, covering the basic operations of the bus support.
H The term “logic analyzer” refers to the Tektronix logic analyzer for which
this product was purchased.
TMS822 UTOPIA1/UTOPIA2 Software Support
vii
Preface

Contacting Tektronix

Phone 1-800-833-9200*
Address Tektronix, Inc.
Department or name (if known) 14200 SW Karl Braun Drive P.O. Box 500 Beaverton, OR 97077 USA
Web site www.tektronix.com
Sales support 1-800-833-9200, select option 1*
Service support 1-800-833-9200, select option 2*
Technical support Email: techsupport@tektronix.com
1-800-833-9200, select option 3*
6:00 a.m. -- 5:00 p.m. Pacific time
* This phone number is toll free in North America. After office hours, please leave a
voice mail message. Outside North America, contact a Tektronix sales office or distributor; see the Tektronix web site for a list of offices.
TMS822 UTOPIA1/UTOPIA2 Software Supportviii
Getting Started

Getting Started

This section contains information on the TMS822 UTOPIA2 bus support, and information on connecting your logic analyzer to your target system.

Support Package Description

The TMS822 bus support package displays disassembled data from systems based on Utopia Level 2 bus in the Transmit or Receive mode.
The highlights of Utopia Level 2 specification are as follows:
H Allows an 8-bit wide data path, using an octet-level handshake, operating up
to 25 MHz, with a single PHY device.
H Allows an 8-bit wide data path, using a cell-level handshake, operating up to
25 MHz with a single PHY device.
H Defines a 33 MHz data path interface operation, intended to simplify PCI
Bus ATM layer designs. This clock rate is used both with 8 and 16-bit wide
data paths. The 8-bit and 16-bit wide data path cell formats conform to the
specifications described in the Level 1 document.
H Defines a 50 MHz data path interface operation, intended for a 16-bit
interface at line rates of 622 Mbps.
H Defines the physicaloperation of up to n PHY devices for the Multi-PHY
(MPHY) operation for the:
H n 8 at ATM layers intended for 155 Mbps;
H n 4 at ATM layers intended for 622 Mbps
with virtual space set up for n 31 PHY ports.
Refer to information on basic operations to determine how many modules and probes your logic analyzer needs to meet the minimum channel requirements for the TMS822 support.
Since UTOPIA2 is backward compatible, the TMS822 support package can be used to acquire cycles from UTOPIA Level 1 system also.
The highlights of Utopia Level 1 specifications are as follows:
H UTOPIA Level 1 defines the interface between the Physical (PHY) and
upper layer modules such as the ATM Layer.
TMS822 UTOPIA1/UTOPIA2 Software Support
1--1
Getting Started
H UTOPIA Level 1 supports
Rates from 100 Mbps to 155 Mbps with a 8-bit wide data path Higher rates (for example 622 Mbps) with a 16-bit wide data path
To use this support efficiently, you need the items listed in the information on basic operations in your logic analyzer online help and the following user manuals for reference.
H Utopia Level 2, Version 1.0 af-phy-0039.000 June 1995 (ATM-PHY interface
specification issued by ATM Forum)
H ITU-T recommendation I.361 for the interpretation of the ATM cell header
information
H ITU-T I.363 B--ISDN ATM Adaptation Layer (AAL) Specification
H ITU-T I.363.1 B--ISDN ATM Adaptation Layer Specification: Type 1 AAL
H ITU-T I.363.2 B--ISDN ATM Adaptation Layer Specification: Type 2 AAL
H ITU-T I.363.3 B--ISDN ATM Adaptation Layer Specification: Type 3/4 AAL
H ITU-T I.363.5 B--ISDN ATM Adaptation Layer Specification: Type 5AAL
H Transwitch data sheet for UTOPIA Level 2 plus
H UTOPIA Specification Level 1, Version 2.01 af-phy-0017.000, March 21,
1994

Logic Analyzer Software Compatibility

The label on the bus support floppy disk states which version of logic analyzer software this support is compatible with.

Logic Analyzer Configuration

The TMS822 support allows a choice of required minimum module configura­tions.
The Utopia Level 2 support package is divided into two support packages:
H UTOPIA2RX: UTOPIA2RX requires at least one 34 channel module to
acquire data from the receive interface.
H UTOPIA2TX: UTOPIA2TX requires at least one 34 channel module to
acquire data from the transmit interface.
1--2 TMS822 UTOPIA1/UTOPIA2 Software Support
To monitor both interfaces simultaneously (if both interfaces have a common clock), the support requires two 34 channel modules. You must load the Transmit support package in one of the 34 channel modules and the Receive support package in the other. By double probing the common clock, the support acquires the Transmit and Receive data information coming on the Utopia interface simultaneously.
To use both supports (Transmit Interface and Receive Interface) at the same time, the support requires two modules. To use only one support at a time, you must select the correct module and specify the support.

Requirements and Restrictions

Review the electrical specifications in the Specifications section in this manual as they pertain to your target system, as well as the following descriptions of other TMS822 UTOPIA2 support requirements and restrictions.
Hardware Reset. If a hardware reset occurs in your TMS822 UTOPIA2 system during an acquisition, the application disassembler might acquire an invalid sample.
Getting Started
Clock Rate. The TMS822 UTOPIA2 bus support can acquire data from the TMS822 UTOPIA2 bus operating at speeds of up to 50 MHz
1
. The TMS822
UTOPIA2 bus support has been tested to 16.7 MHz.
Setup and Hold Time Adjustments. You cannot change the setup and hold time for any signal group.
Nonintrusive Acquisition. Acquiring Utopia2 bus cycles is nonintrusive to the target system. That is, the TMS822 UTOPIA2 does not intercept, modify, or present signals back to the target system.
Channel Groups. Channel groups required for clocking and disassembly for TMS822 UTOPIA2 bus support are as follows:
Receive bus:
Address Group, Data Group, Control Group, RXCLAV Group, and L2PControl Group.
1
Specification at time of printing. Contact your Tektronix sales representative for current information on the fastest devices supported.
TMS822 UTOPIA1/UTOPIA2 Software Support
1--3
Getting Started
Transmit bus:
Address Group, Data Group, Control Group, TXCLAV Group, and L2PControl Group.
UTOPIA Level 2 Plus. TMS822 UTOPIA2 support, when used with the Utopia Level 2 plus does not decode the acquired PPP packets. The acquired information is displayed and the disassembly identifies the packets.
Address Display. The address of the PHY port from which the cell is transmitted or received is correct only when the custom clocking option is ATM Cells/PPP Packets or ATM Cell Headers (5-bytes) option. The support displays the address only when more than one physical device is involved. In a Single PHY operation, the Address column is dashed out.
Trigger Programs. The Trigger Programs that are provided do not work when ATM cells have Extended Header Bytes.
The disassembly shows correct information only when the appropriate disassem­bly and custom clocking options are chosen.
Table 1--1 shows the invalid combinations of disassembly and clocking option.
Table 1--1: Invalid disassembly and clocking combinations
Clocking option Disassembly option
All Cycles Polling Cycles
ATM Cells/PPP Packets All Utopia Cycles, All UtopiaL2p
Cycles, Polling Cycles
ATM Cell Headers(5-bytes) All Utopia Cycles, All UtopiaL2p
Cycles, ATM Cells, PPP Packets, Polling Cycles
Polling Cycles The Number of PHY Ports must not be set to SIGPHY
All Utopia Cycles, All UtopiaL2p Cycles, ATM Cells, PPP Packets, ATM Cell Headers
AAL Decoding. This information covers the features that are supported in each of the AAL layers and their limitations.
NOTE. You can see AAL decoding only when the disassembly SHOW option is set to ATM Cells. All field values that are decoded are in binary. The support does not decode AAL when all the 48 payload bytes of the ATM cell are not available.
1--4
TMS822 UTOPIA1/UTOPIA2 Software Support
Getting Started
AAL 1: In this layer, the TMS822 UTOPIA2 support decodes till the SAR-PDU level: SAR-PDU header and payload information.
Refer to the ITU-T I.363.1 B-ISDN ATM adaptation layer specification for details about the PDU format.
Limitation: The TMS822 UTOPIA2 does not support the Structured Data Transfer format of SAR-PDU payload.
AAL 2: In this layer, the TMS822 UTOPIA2 support decodes information up to the CPS-PACKET level. The support identifies the CPS-PACKET header and Packet payloads.
Refer to the ITU-T I.363.2 B-ISDN ATM adaptation layer specification for details about the PDU format.
Limitation: The TMS822 UTOPIA2 does not support multiplexing and packing of CPS-PACKETs into CPS-PDUs.
AAL 3/4:The TMS822 UTOPIA2 support decodes information up to the SAR-PDU and to a certain extent the CPCS -PDU. The support decodes the SAR-PDU to show details of the SAR-PDU Header and Trailer information and identifies the SAR-PDU as to whether it is BOM, COM, EOM, or SSM.
The support identifies the two types of SAR -PDUs namely, Data-SAR-PDU and Abort-SAR-PDU. The SAR-PDUs are further decoded to show the CPCS-PDU header and trailer information based on whether it is BOM, EOM, COM, or SSM.
Refer to the ITU-T I.363.3 B-ISDN ATM adaptation layer specification for details about the PDU format.
AAL 5: The support decodes the information up to the SAR-PDU and identifies the last SAR-PDU payload based on the AUU parameter. The support decodes the CPCS trailer information (the CPCS trailer is in the last 8 octets of the last SAR-PDU.)
Refer to the ITU-T I.363.5 B-ISDN ATM adaptation layer specification for details about the PDU format.
UTOPIA Level 1 Cycles. UTOPIA1 does not support Extended Header Bytes. For correct disassembly, set the the disassembly option Extended Header Bytesto zero.
UTOPIA1 does not support the MULPHY scheme Direct Status Indication. For correct disassembly, do not set the clocking and disassembly option Number of PHY Portsto MULPHY-DSI.
TMS822 UTOPIA1/UTOPIA2 Software Support
1--5
Getting Started

Timing Display Format

A Timing Display Format file is also provided for this support. It sets up the display to show the following waveforms for the TMS822 bus support.
For UTOPIA2TX Support:
TxClk TxFull*/TxClav TxSOC TxEnb* Address Data Control
For UTOPIA2RX Support:
RxClk RxEmpty*/RxClav RxSOC RxEnb* Address Data Control
NOTE. An asterisk ( *) following a signal name indicates an active low signal.
Address, Data and Control groups are displayed in bus form.

Functionality Not Supported

H The appendices (1 and 2) mentioned here are described as a part of ATM
Forum specification Utopia Level 2, Version 1.0 af-phy-0039.000 June 1995 (ATM-PHY interface). The software does not support the implementation of the guidelines described in these appendices.
Appendix 1. Method to support a larger number of PHYs Appendix 2. Management Interface
H The TMS822 UTOPIA2 support when used with Utopia Level 2 Plus does
not decode the acquired PPP packets. The support only displays the acquired information and the disassembly just identifies the packets.
1--6
TMS822 UTOPIA1/UTOPIA2 Software Support
H The ATM payload is not analyzed to decode higher layer protocols other than
AAL.

Functionality Supported but Not Tested

The TMS822 supports the following features but they are not tested.
H Disassembling the 16-bit Data Bus width
H Decoding the AAL1, AAL2, AAL3/4, AAL 5 Layers
H Decoding the ATM cell with Extended Header Bytes
H Decoding of ATM cells from Multi-PHY Interface (namely Multi PHY-
POLLING and Multi PHY-DSI)
H Decoding of the ATM cells with UNI (User Network Interface) and NNI
(Network Node Interface)
H Decoding of packets from the UTOPIA Level 2 Plus Interface
Getting Started
These features were verified using simulated test patterns only.

Connecting the Logic Analyzer to a Target System

You can use the channel probes, clock probes, and leadsets with a commercial test clip (or adapter) to make the connections between the logic analyzer and your target system.
To connect the probes to TMS822 UTOPIA2 signals in the target system using a test clip, follow these steps:
1. Power off your target system. It is not necessary to power off the logic
analyzer.
CAUTION. To prevent static damage, handle the target systems, probes, and the logic analyzer module in a static-free environment. Static discharge can damage these components.
Always wear a grounding wrist strap, heel strap, or similar device while handling the target system.
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. If you are using a test clip, touch any of the
ground pins on the clip to discharge stored electricity from the test clip.
TMS822 UTOPIA1/UTOPIA2 Software Support
1--7
Getting Started

Labeling P6434 Probes

CAUTION. To prevent permanent damage to the pins on the microprocessor, place the target system on a horizontal surface before connecting the test clip.
3. Place the target system on a horizontal, static-free surface.
4. Use Tables 3--5 through 3--16 starting on page 3--3 to connect the channel
probes to TMS822 UTOPIA2 signal pins on the test clip or in the target system.
5. Use leadsets to connect at least one ground lead from each channel and the
ground lead from each clock probe to the ground pins on your test clip.
The TMS822 bus support package relies on the channel mapping and labeling scheme for the P6434 Probes. Apply labels using the instructions described in the P6434 Probe Instructions manual.
1--8
TMS822 UTOPIA1/UTOPIA2 Software Support
Operating Basics

Setting Up the Support

This section provides information on how to set up the support and covers the following topics:
H Channel group definitions
H Clocking options
The information in this section is specific to the operations and functions of the TMS822 UTOPIA2 support on any Tektronix logic analyzer for which the support can be purchased. Information on basic operations describes general tasks and functions.
Before you acquire and display disassembled data, you need to load the support and specify the setups for clocking and triggering as described in the information on basic operations. The support provides default values for each of these setups, but you can change the setups as needed.

Installing the Support Software

NOTE. Before you install any software, it is recommended you verify that the bus support software is compatible with the logic analyzer software.
To install the TMS822 UTOPIA2 software on your Tektronix logic analyzer, follow these steps:
1. Insert the floppy disk in the disk drive.
2. Click the Windows Start button, point to Settings, and click Control Panel.
3. In the Control Panel window, double-click Add/Remove Programs.
4. Follow the instructions on the screen for installing the software from the
To remove or uninstall software, follow the above instructions and select Uninstall. You need to close all windows before you uninstall any software.

Support Package Setups

The software installs two support package s etup files. Each setup file offers different clocking and display options.
floppy disk.
TMS822 UTOPIA1/UTOPIA2 Software Support
2--1
Setting Up the Support
Acquisition Setup. The support package consists of two different supports, one for the Transmit Interface and the other for the Receive Interface. You must make connections and load the appropriate package for the desired support. The TMS822 support will affect the logic analyzer setup menus (and submenus) by modifying existing fields, and adding UTOPIA2 bus-specific fields. The TMS822 adds the selection UTOPIA2RXto the ‘Load Support Package’ dialog box, under the File pulldown menu when the support package for the Receive Interface is loaded.
On the logic analyzer, the TMS822 support adds the selectionUTOPIA2TXto the ‘Load Support Package’ dialog box, under the File pulldown menu when the support package for the Transmit Interface is loaded. Once the corresponding support has been loaded, the Customclocking mode selection in the logic analyzer setup menu is also enabled. ‘Custom’ is the default selection whenever the ‘UTOPIA2TX’ or ‘UTOPIA2RX’ support loads.
NOTE. This procedure is applicable for acquisitions from UTOPIA Level 1 systems also.

Channel Group Definitions

The software automatically defines channel groups for the support. The channel groups for the TMS822 UTOPIA2 support for the Receive bus are Address, Data, Control, RXCLAV, Parity and L2PControl.
Table 2--1: Receive bus group names
Group name Display radix
Address HEX
Data HEX
Mnemonics NONE - Disassembly generated text
Control SYM
RXCLAV BIN
Parity BIN
L2PControl SYM
2--2
TMS822 UTOPIA1/UTOPIA2 Software Support
Setting Up the Support
The channel groups for the TMS822 UTOPIA2 support for the Transmit bus are Address, Data, Control, TXCLAV, Parity and L2PControl.
Table 2--2: Transmit bus group names
Group name Display radix
Address HEX
Data HEX
Mnemonics NONE - Disassembly generated text
Control SYM
TXCLAV BIN
Parity BIN
L2PControl SYM
If you want to know which signal is in which group, refer to the channel assignment tables beginning on page 3--3.

Clocking

Clocking Options
Custom Clocking
The TMS822 support offers a bus-specific clocking mode for the TMS822 UTOPIA2 bus interface. This clocking mode is the default selection whenever you load the UTOPIA2 support.
Disassembly is not correct when using the Internal or External clocking modes. Information on basic operations in the logic analyzer online help describes how to use these clock selections for general purpose analysis.
A special clocking program is loaded on the module every time you load the UTOPIA2 support. This special clocking is called Custom.
With Custom clocking, the module logs in signals from multiple channel groups at different times when the signals are valid on the Utopia2 bus. The module then sends all the logged in signals to the trigger machine and to the acquisition memory of the module for storage.
In the custom mode, the support uses a TxClk as the clock for the transmit interface and a RxClk as the clock for the receive interface. After loading the UTOPIA2TX or UTOPIA2RX support, the sample points and master points are defined based on the selections of each of the clocking options.
TMS822 UTOPIA1/UTOPIA2 Software Support
2--3
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