Tektronix TMS710 Instruction Manual
Instruction Manual
TMS 710
TMS320C6201/6701 Microprocessor Support
071-0202-01
Warning
The servicing instructions are for use by
qualified personnel only. To avoid personal
injury, do not perform any servicing unless you
are qualified to do so. Refer to all safety
summaries prior to performing service.
Copyright E T ektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and are
protected by United States copyright laws and international treaty provisions.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the
Rights in T echnical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the
Commercial Computer Software – Restricted Rights clause at F AR 52.227-19, as applicable.
T ektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material. Specifications and price change privileges reserved.
Printed in the U.S.A.
T ektronix, Inc., P.O. Box 1000, Wilsonville, OR 97070–1000
TEKTRONIX and TEK are registered trademarks of T ektronix, Inc.
SOFTWARE WARRANTY
T ektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, T ektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
T ektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If T ektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
Table of Contents
Getting Started
Operating Basics
General Safety Summary v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Service Safety Summary vii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preface ix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manual Conventions ix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacting T ektronix x. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Support Package Description 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Software Compatibility 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Configuration 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Requirements and Restrictions 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functionality Not Supported 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DAS Mass T ermination Interface (MTIF) Probes 1–3. . . . . . . . . . . . . . . . . . . . . . . .
Connecting the Logic Analyzer to a System Under T est 1–3. . . . . . . . . . . . . . . . . . .
Channel Assignments 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU To Mictor Connections 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting Up the Support 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Group Definitions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Symbols 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Time Alignment for the C6201 2–10. . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Time Alignment for the C6701 2–18. . . . . . . . . . . . . . . . . . . . . . . . .
Acquiring and Viewing Disassembled Data 2–25. . . . . . . . . . . . . . . . . . . . .
Acquiring Data 2–25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing Disassembled Data 2–25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Display Format 2–26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
State-Listing Display Format 2–26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Display Format 2–26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software Display Format 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Flow Display Format 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Display Format 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing How Data is Displayed 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optional Display Selections 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Micro Specific Fields 2–29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Marking Cycles 2–30. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Displaying Exception Vectors 2–31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing an Example of Disassembled Data 2–31. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifications
Replaceable Parts
Index
TMS 710 TMS320C6201/C6701 Microprocessor Support
i
Table of Contents
List of Figures
Figure 1–1: Pin assignments for a Mictor connector
(component side) 1–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–1: Bus timing for the ASYNC Memory Read operation 2–2. . .
Figure 2–2: Bus timing for the ASYNC Memory Write operation 2–3. .
Figure 2–3: Bus timing for the SBSRAM Memory Read operation 2–4. .
Figure 2–4: Bus timing for the SBSRAM Memory Write operation 2–5.
Figure 2–5: Bus timing for the SDRAM Memory Read operation 2–6. . .
Figure 2–6: Bus timing for the SDRAM Memory Write operation 2–7. .
Figure 2–7: Bus timing for the SDRAM row address activation cycle 2–8
Figure 2–8: C6201 Setup: Load System menu 2–10. . . . . . . . . . . . . . . . . . .
Figure 2–9: C6201 Load System Options dialog box 2–11. . . . . . . . . . . . . .
Figure 2–10: C6201 System window with the C6201 Cal Setup file 2–12. .
Figure 2–11: C6201 Custom options C6201 dialog box 2–13. . . . . . . . . . . .
Figure 2–12: C6201 Trigger setup for any asynchronous memory
Read 2–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–13: C6201 Asynchronous memory read timing diagram 2–14. . .
Figure 2–14: C6201 Trigger setup for any SBSRAM memory
Read 2–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–15: C6201 SBSRAM memory read timing (full-rate SSCLK)
diagram 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–16: C6201 Custom options C6201 dialog box 2–17. . . . . . . . . . . .
Figure 2–17: C6701 Setup: Load System menu 2–18. . . . . . . . . . . . . . . . . .
Figure 2–18: C6701 Load System Options dialog box 2–19. . . . . . . . . . . . .
Figure 2–19: C6701 System window with the Cal Setup file 2–20. . . . . . . .
Figure 2–20: C6201 Custom options C6201 dialog box 2–20. . . . . . . . . . . .
Figure 2–21: C6701 Custom options dialog box 2–21. . . . . . . . . . . . . . . . . .
Figure 2–22: C6701 Trigger setup for any asynchronous memory
Read 2–21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–23: C6701 Asynchronous memory read timing diagram 2–22. . .
Figure 2–24: C6701 Trigger setup for any SBSRAM memory Read 2–23.
Figure 2–25: C6701 Custom options dialog box 2–24. . . . . . . . . . . . . . . . . .
Figure 2–25: Hardware display format 2–27. . . . . . . . . . . . . . . . . . . . . . . . .
ii
TMS 710 TMS320C6201/C6701 Microprocessor Support
List of Tables
Table of Contents
Table 1–1: Module compatibility specifications 1–2. . . . . . . . . . . . . . . . .
Table 1–2: Address channel group assignments 1–4. . . . . . . . . . . . . . . . .
Table 1–3: Data channel group assignments 1–5. . . . . . . . . . . . . . . . . . . .
Table 1–4: AsyncCtrl channel group assignments 1–6. . . . . . . . . . . . . . . .
Table 1–5: SbsramCtrl channel group assignments 1–7. . . . . . . . . . . . . .
Table 1–6: SdramCtrl channel group assignments 1–7. . . . . . . . . . . . . . .
Table 1–7: Control channel group assignments 1–7. . . . . . . . . . . . . . . . . .
Table 1–8: ByteEnbl channel group assignments 1–8. . . . . . . . . . . . . . . .
Table 1–9: CESpace channel group assignments 1–8. . . . . . . . . . . . . . . . .
Table 1–10: Intr channel group assignments 1–8. . . . . . . . . . . . . . . . . . . .
Table 1–11: Misc channel group assignments 1–9. . . . . . . . . . . . . . . . . . .
Table 1–12: Clock and Qualifier channel assignments 1–9. . . . . . . . . . . .
Table 1–13: Signals not required for clocking and disassembly 1–10. . . .
Table 1–14: CPU to Mictor connections for Mictor A pins 1–11. . . . . . . .
Table 1–15: CPU to Mictor connections for Mictor D pins 1–13. . . . . . . .
Table 1–16: CPU to Mictor connections for Mictor C pins 1–14. . . . . . . .
Table 2–1: Control group symbol table definitions 2–9. . . . . . . . . . . . . . .
Table 2–2: C6201 Memory types and maximum frequencies 2–10. . . . . . .
Table 2–3: C6201 Setup time for the AsyncCtrl group 2–15. . . . . . . . . . . .
Table 2–4: C6201 Setup time for the SbsramCtrl group 2–16. . . . . . . . . . .
Table 2–5: C6701 Memory types and maximum frequencies 2–18. . . . . . .
Table 2–6: C6701 Setup time for the AsyncCtrl group 2–23. . . . . . . . . . . .
Table 2–7: Description of special characters in the display 2–25. . . . . . . .
Table 2–8: Cycle type definitions 2–26. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–9: Exception vectors 2–31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–1: C6201 Electrical specifications 3–1. . . . . . . . . . . . . . . . . . . . .
Table 3–2: C6701 Electrical Specifications 3–1. . . . . . . . . . . . . . . . . . . . .
TMS 710 TMS320C6201/C6701 Microprocessor Support
iii
Table of Contents
iv
TMS 710 TMS320C6201/C6701 Microprocessor Support
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
Connect and Disconnect Properly . Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Ground the Product. This product is indirectly grounded through the grounding
conductor of the mainframe power cord. To avoid electric shock, the grounding
conductor must be connected to earth ground. Before making connections to the
input or output terminals of the product, ensure that the product is properly
grounded.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and marking on the product. Consult the product manual for further ratings
information before making connections to the product.
Symbols and Terms
Do not apply a potential to any terminal, including the common terminal, that
exceeds the maximum rating of that terminal.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry .
Provide Proper Ventilation. Refer to the manual’s installation instructions for
details on installing the product so it has proper ventilation.
T erms in this Manual. These terms may appear in this manual:
TMS 710 TMS320C6201/C6701 Microprocessor Support
v
General Safety Summary
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
T erms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
Symbols on the Product. The following symbols may appear on the product:
Protective Ground
(Earth) T erminal
CAUTION
Refer to Manual
vi
TMS 710 TMS320C6201/C6701 Microprocessor Support
Service Safety Summary
Only qualified personnel should perform service procedures. Read this Service
Safety Summary and the General Safety Summary before performing any service
procedures.
Do Not Service Alone. Do not perform internal service or adjustments of this
product unless another person capable of rendering first aid and resuscitation is
present.
Disconnect Power. To avoid electric shock, disconnect the main power by means
of the power cord or, if provided, the power switch.
Use Care When Servicing With Power On. Dangerous voltages or currents may
exist in this product. Disconnect power, remove battery (if applicable), and
disconnect test leads before removing protective panels, soldering, or replacing
components.
To avoid electric shock, do not touch exposed connections.
TMS 710 TMS320C6201/C6701 Microprocessor Support
vii
Service Safety Summary
viii
TMS 710 TMS320C6201/C6701 Microprocessor Support
Preface
Manual Conventions
This instruction manual contains specific information about the
TMS 710 TMS320C6201/C6701 microprocessor support package and is part of a
set of information on how to operate this product on compatible Tektronix logic
analyzers.
If you are familiar with operating microprocessor support packages on the logic
analyzer for which the TMS 710 TMS320C6201/C6701 support was purchased,
you will only need this instruction manual to set up and run the support.
If you are not familiar with operating microprocessor support packages, you will
need to supplement this instruction manual with information on basic operations
to set up and run the support. See Manual Conventions below for more information.
This manual uses the following conventions:
H The term “disassembler” refers to the software that disassembles bus cycles
into instruction mnemonics and cycle types.
H The phrase “information on basic operations” refers to online help, an
installation manual, or a user manual covering the basic operations of
microprocessor support.
TMS 710 TMS320C6201/C6701 Microprocessor Support
ix
Preface
Contacting Tektronix
Product
Support
Service
Support
For other
information
To write us Tektronix, Inc.
For application-oriented questions about a Tektronix measurement product, call toll free in North America:
1-800-TEK-WIDE (1-800-835-9433 ext. 2400)
6:00 a.m. – 5:00 p.m. Pacific time
Or, contact us by e-mail:
tm_app_supp@tek.com
For product support outside of North America, contact your
local Tektronix distributor or sales office.
Contact your local Tektronix distributor or sales office. Or, visit
our web site for a listing of worldwide service locations.
tektronix.com
In North America:
1-800-TEK-WIDE (1-800-835-9433)
An operator will direct your call.
P.O. Box 1000
Wilsonville, OR 97070-1000
x
TMS 710 TMS320C6201/C6701 Microprocessor Support
Getting Started
Getting Started
This chapter contains information on the TMS 710 TMS320C6201/C6701
microprocessor support package, and information on connecting your logic
analyzer to your system under test.
Support Package Description
The TMS 710 TMS320C6201/C6701microprocessor support package displays
disassembled data from systems based on the Texas Instruments C6201/C6701
microprocessor.
To use this support efficiently, you need to have the items listed in the information on basic operations and the following documents:
H C62X/C67X CPU and Instruction SET Reference Guide, Texas Instruments,
Feb 24 1998, PRU189C.
H C6201/C6701 Peripheral Reference Guide, Texas Instruments, March 1998,
SPRU190A.
H C6701 Data sheet Texas Instruments, May 1998, SPRS067.
H C6201 Data sheet Texas Instruments, March 1998, SPRS051C.
Information on basic operations also contains a general description of support.
Logic Analyzer Software Compatibility
The floppy disk label on the microprocessor support states which version of logic
analyzer software this support is compatible with.
Logic Analyzer Configuration
The TMS 710 TMS320C6201/C6701support requires a minimum of one
102-channel module.
TMS 710 TMS320C6201/C6701 Microprocessor Support
1–1
Getting Started
The TMS 710 support will function with the Logic Analyzer acquisition
modules. Table 1–1 lists the module compatibility specifications.
T able 1–1: Module compatibility specifications
Characteristics Requirements
Tektronix Logic Analyzer
Maximum bus speed 200 MHz
Note:
CK0, CK1, CK2, and CK3 clock channels are stored
Requirements and Restrictions
You should review the general requirements and restrictions of microprocessor
support packages in the information on basic operations as they pertain to your
system under test.
System Clock Rate
Non Intrusive Acquisition
Disabling the Instruction
Cache
Byte Invalidation
You should also review electrical, environmental, and mechanical specifications
in Specifications on page 3–1 as they pertain to your system under test, as well as
the following descriptions of other C6201/C6701 support requirements and
restrictions.
The operating speeds that the C6201/C6701
C6201/C6701 microprocessor are listed on Table 3–1. These specification were
valid at the time this manual was printed. Please contact your Tektronix Sales
Representative for current information on the fastest devices supported.
Acquiring microprocessor bus cycles will be non intrusive to the system under
test. That is, the C6201/C6701 support will not intercept, modify, or present
signals back to the system under test.
To display disassembled acquired data, you must disable the internal instruction
cache. Disabling the cache makes all instruction prefetches visible on the bus
they then can be acquired and displayed disassembled.
Invalid bytes cannot be dashed out during read cycles since byte enables are not
asserted during read cycles.
support can acquire data from the
1–2
TMS 710 TMS320C6201/C6701 Microprocessor Support
Getting Started
Opcode Fetch/Data Read.
The C6201/C6701 does not provide a signal to distinguish between Data Read
and Opcode Fetch. The TMS 710 TMS320C6201/C6701 support makes a
reasonable estimate at looking at the address values of a few sequences around
the current sequence. Yet in some instances you may need to use the Mark
Opcode function.
Functionality Not Supported
Microprocessor
Alternate Bus master
The signals: DMA, HPI, MCBSP 0 & 1, and JTAG are not acquired. If you want
to view these signals, you need to find an alternate way to probe them.
Alternative bus master transactions are acquired by the C6201/C6701 support
and are not disassembled.
DAS Mass Termination Interface (MTIF) Probes
The MTIF probes are already labeled since the probe sections for each probe are
permanent. The TMS 710 TMS320C6201/C6701 support channel assignments
follow the standard channel mapping.
Connecting the Logic Analyzer to a System Under Test
You can use channel probes, clock probes, and leadsets with a commercial test
clip (or adapter) to make connections between the logic analyzer and your system
under test.
To connect the probes to C6201/C6701 signals in the system under test using a
test clip, follow these steps:
1. Turn off power to your system under test. It is not necessary to turn off
power to the logic analyzer.
CAUTION. Static discharge can damage the microprocessor, the probes, and the
logic analyzer module. To prevent static damage, handle these components only
in a static-free environment.
Always wear a grounding wrist strap, heel strap, or similar device while
handling the microprocessor.
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. If you are using a test clip, touch any of the
ground pins on the clip to discharge stored static electricity from the test clip.
TMS 710 TMS320C6201/C6701 Microprocessor Support
1–3
Getting Started
Channel Assignments
CAUTION. Failure to place the system under test on a horizontal surface before
connecting the test clip can permanently damage the pins on the microprocessor.
3. Place the system under test on a horizontal static-free surface.
4. Use Tables 1–2 through 1–10 to connect the channel probes to C6201/C6701
signal pins on the test clip or in the system under test.
Use leadsets to connect at least one ground lead from each channel probe and
the ground lead from each clock probe to ground pins on your test clip.
Channel assignments listed in Tables 1–2 through 1–10 use the following
conventions:
H All signals are required by the support unless indicated otherwise.
H Channels are listed starting with the most significant bit (MSB), descending
to the least significant bit (LSB).
H Channel group assignments are for all modules unless otherwise noted.
H An asterisk symbol (*) following a signal name indicates an active low
signal.
H An equals symbol (=) following a signal name indicates that it is double
probed.
Table 1–2 lists the probe section and channel assignments for the Address group
and the microprocessor signal to which each channel connects. By default the
Address channel group assignments are displayed in hexadecimal.
T able 1–2: Address channel group assignments
Bit order Section:channel C6201/C6701 signal name
31 A3:7 GND
30 A3:6 GND
29 A3:5 GND
28 A3:4 GND
27 A3:3 GND
26 A3:2 GND
25 A3:1 GND
24 A3:0 GND
23 A2:7 GND
1–4
TMS 710 TMS320C6201/C6701 Microprocessor Support
T able 1–2: Address channel group assignments (cont.)
Bit order C6201/C6701 signal nameSection:channel
22 A2:6 GND
21 A2:5 EA21
20 A2:4 EA20
19 A2:3 EA19
18 A2:2 EA18
17 A2:1 EA17
16 A2:0 EA16
15 A1:7 EA15
14 A1:6 EA14
13 A1:5 EA13
12 A1:4 EA12
11 A1:3 EA11
10 A1:2 EA10
9 A1:1 EA9
8 A1:0 EA8
7 A0:7 EA7
6 A0:6 EA6
5 A0:5 EA5
4 A0:4 EA4
3 A0:3 EA3
2 A0:2 EA2
1 A0:1 GND
0 A0:0 GND
Getting Started
Table 1–3 lists the probe section and channel assignments for the Data group and
the microprocessor signal to which each channel connects. By default the Data
channel group assignments are displayed in hexadecimal.
T able 1–3: Data channel group assignments
Bit order Section:channel C6201/C6701 signal name
31 D3:7 ED31
30 D3:6 ED30
29 D3:5 ED29
28 D3:4 ED28
27 D3:3 ED27
26 D3:2 ED26
TMS 710 TMS320C6201/C6701 Microprocessor Support
1–5
Getting Started
T able 1–3: Data channel group assignments (cont.)
Bit order C6201/C6701 signal nameSection:channel
25 D3:1 ED25
24 D3:0 ED24
23 D2:7 ED23
22 D2:6 ED22
21 D2:5 ED21
20 D2:4 ED20
19 D2:3 ED19
18 D2:2 ED18
17 D2:1 ED17
16 D2:0 ED16
15 D1:7 ED15
14 D1:6 ED14
13 D1:5 ED13
12 D1:4 ED12
11 D1:3 ED11
10 D1:2 ED10
9 D1:1 ED9
8 D1:0 ED8
7 D0:7 ED7
6 D0:6 ED6
5 D0:5 ED5
4 D0:4 ED4
3 D0:3 ED3
2 D0:2 ED2
1 D0:1 ED1
0 D0:0 ED0
1–6
Tables 1–4 through 1–6 appear only in the TLA 700 Series.
By default Table 1–4 AsyncCtrl channel group assignments are not displayed.
T able 1–4: AsyncCtrl channel group assignments
Bit order Section:channel C6201/C6701 signal name
3 C3:3 ARE*
2 C3:5 AWE *
TMS 710 TMS320C6201/C6701 Microprocessor Support
Getting Started
T able 1–4: AsyncCtrl channel group assignments (cont.)
Bit order C6201/C6701 signal nameSection:channel
1 CLK:0 ARE* =
0 C2:3 AWE*=
By default Table 1–5 SbsramCtrl channel group assignments are not displayed.
T able 1–5: SbsramCtrl channel group assignments
Bit order Section:channel C6201/C6701 signal name
3 C2:6 SSADS*
2 C2:5 SSOE*
1 C2:2 SSWE*
0 Qual:0 SSADS*=
By default Table 1–6 SdramCtrl channel group assignments are not displayed.
T able 1–6: SdramCtrl channel group assignments
Bit order Section:channel C6201/C6701 signal name
3 C2:0 SDRAS*
2 C2:1 SDCAS*
1 C3:0 SDWE*
0 Qual:1 SDWE*=
Table 1–7 lists the probe section and channel assignments for the Control group
and the microprocessor signal to which each channel connects. The default radix
of the Control group is SYMBOLIC on the TLA 700. The symbol table file name
is C6201/C6701_Ctrl on the TLA 700.
T able 1–7: Control channel group assignments
Bit order Section:channel C6201/C6701 signal name
10 C3:1 RESET*
9 C3:2 LENDIAN
8 C0:6 HOLDA*
7 C2:0 SDRAS*
6 C2:1 SDCAS*
5 C3:0 SDWE*
TMS 710 TMS320C6201/C6701 Microprocessor Support
1–7
Getting Started
T able 1–7: Control channel group assignments (cont.)
Bit order C6201/C6701 signal nameSection:channel
4 C2:6 SSADS*
3 C2:5 SSOE*
2 C2:2 SSWE*
1 C3:3 ARE*
0 C3:5 AWE*
By default Table 1–8 ByteEnbl channel group assignments are not displayed.
T able 1–8: ByteEnbl channel group assignments
Bit order Section:channel C6201/C6701 signal name
3 C1:7 BE3*
2 C1:6 BE2*
1 C1:5 BE1*
0 C1:4 BE0*
By default Table 1–9 CESpace channel group assignments are not displayed.
T able 1–9: CESpace channel group assignments
Bit order Section:channel C6201/C6701 signal name
3 C1:3 CE3*
2 C1:2 CE2*
1 C1:1 CE1*
0 C1:0 CE0*
By default Table 1–10 Intr channel group assignments are not displayed.
T able 1–10: Intr channel group assignments
Bit order Section:channel C6201/C6701 signal name
5 C0:0 IACK
4 C0:1 NMI
3 C0:2 INUM0
2 C0:3 INUM1
1–8
TMS 710 TMS320C6201/C6701 Microprocessor Support
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