Tektronix TMS568 Instruction Manual
Instruction Manual
TMS568
MPC85XX Microprocessor Software Support
071-1191-00
www.tektronix.com
Copyright © Tektronix, Inc. All rights reserved.
Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this public ation supercedes
that in all previously published material. Specifications and price c hange privileges reserved.
Tektronix, Inc., P.O. Box 500, Beaverton, OR 97077
TEKTRONIX and TEK are registered trademarks of Tektronix, Inc.
MagniVu is a trademark of Tektronix, Inc.
SOFTWARE WARRANTY
Tektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, Tektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
Tektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If Tektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
Table of Contents
Getting Started
Operating Basics
Preface xi...................................................
Manual Conventions xi..............................................
Contacting Tektronix xii.............................................
Support Package Descri ption 1--1.......................................
Disassembly Support 1--1..........................................
Logic Analyzer Software Compatibility 1--2..............................
Logic Analyzer Configuration 1--2......................................
Module Requirements 1--2.........................................
Probe Requirements 1--2..........................................
Requirements and Restrictions 1--3......................................
Hardware Reset 1--3..............................................
Clock Rate 1--3..................................................
Setup/Hold Time Adjustments 1--3..................................
Nonintrusive Acquisition 1--4......................................
Limitations of the Support 1--4.........................................
Connecting the Logic Analyzer to a Target System 1--4.....................
Labeling P6434 and P6860 Probes 1--5...................................
Setting Up the Support 2--1.....................................
Installing the Support Software 2--1.....................................
Support Package Setups 2--2...........................................
Clocking Options 2--2................................................
85XXDDR and 85XXDDR_RW Support Packages 2--2..................
85XXLB, 85XXLB_ALT, and 85XXLB_ADS Support Packages 2--3.......
Acquiring and Viewing Disassembled Data 2--5....................
Acquiring Data 2--5..................................................
Changing How Data is Displayed 2--5...................................
Optional Display Selections 2--6....................................
Microprocessor Specific Fields for the 85XXDDR Support Package 2--6....
Microprocessor Specific Fields for the 85XXDDR_RW Support Package 2--9
Microprocessor Spec ific Fields for the 85XXLB, 85XXLB_ALT, and
85XXLB_ADS Support Package 2--10.........................
Cycle Type Labels 2--11...............................................
Interrupt and Exception Labels 2--12.....................................
Special Characters 2--13...............................................
Viewing Disassembled Data 2--14........................................
Hardware Display Format 2--15......................................
Software Display Format 2--17.......................................
Control Flow Display Format 2--20...................................
Subroutine Display Format 2--21.....................................
Marking Cycles 2--21..............................................
Viewing an Example of Disassembled Data 2--22...........................
TMS568 MPC85XX Microprocessor Software Support
i
Table of Contents
Reference
Channel Group Definitions 3--1..................................
Channel Groups 3--1.................................................
Symbol and Channel Assignment Tables 3--5......................
Symbol Tables 3--5..................................................
Channel Assignment Tables 3--8........................................
85XXDDR Channel Group Assignments 3--9..........................
85XXDDR_RW Channel Group Assignments 3--21......................
85XXLB Support Package Group Assignments 3--39.....................
85XXLB_ALT Support Package Group Assignments 3--43................
85XXLB_ADS Support Package Group Assignments 3--48................
Clock and Qualifier Channel Assignments 3--52.........................
Signals Required for Clocking and Disassembly 3--54....................
Signals Not Required for Clocking and Disassembly 3--54.................
Signal Source To Probe Connections 3--55.................................
Connections for the 85XXDDR Support Package 3--60...................
Connections for the 85XXDDR_RW Support Package 3--67...............
Connections for the 85XXLB Support Package 3--74.....................
Connections for 85XXLB_ALT Support Package 3--79...................
Connections for 85XXLB_ADS Support Package 3--89...................
Signal Acquisition 3--95.........................................
Specification
Replaceable Parts List
Index
Specifications Table 4--1..............................................
Parts Ordering Information 5 --1.........................................
Using the Replaceable Parts List 5--1....................................
ii
TMS568 MPC85XX Microprocessor Software Support
List of Figures
Table of Contents
Figure 2--1: Address Multiplexing for DDR--SDRAM memories. 2--8...
Figure 2--2: 85XXDDR hardware display format 2--15................
Figure 2--3: 85XXDDR_RW hardware display format 2--16...........
Figure 2--4: 85XXLB_ALT hardware display format 2--17............
Figure 2--5: 85XXDDR software display format 2--18.................
Figure 2--6: 85XXDDR_RW software display format 2--19............
Figure 2--7: 85XXLB_ALT software display format 2--20.............
Figure 3--1: P6860 probe land footprint for MA--A0/A1 and
M A -- A 2 / A 3 3 -- 5 6............................................
Figure 3--2: P6860 probe land footprint for MA--E2/E3 and
S L -- A 0 / A 1 3 -- 5 6.............................................
Figure 3--3: P6860 probe land footprint for SL--A0/A1 and
S L -- A 2 / A 3 3 -- 5 7.............................................
Figure 3--4: P6860 probe land footprint for SL--C2/C3 and
S L -- E 2 / E 3 3 -- 5 7.............................................
Figure 3--5: P6860 Probe land footprint for E LB--A2/A3 and
E L B -- A 0 / A 1 3 -- 5 9...........................................
Figure 3--6: P6860 Probe land footprint for E LB--D2/D3 and
E L B -- D 0 / D 1 3 -- 5 9...........................................
Figure 3--7: P6860 Probe land footprint for E LB--C2/C3 and
E L B -- C 0 / C 1 3 -- 6 0...........................................
Figure 3--8: Timing diagram for Local bus interface 3--95.............
Figure 3--9: Timing diagram for DDR SDRAM interface 3--98.........
TMS568 MPC85XX Microprocessor Software Support
iii
Table of Contents
List of Tables
Table 1--1: Module requirements 1--2.............................
Table 1--2: Probe requirements 1--2..............................
Table 1--3: Setup/Hold time requirements for the MPC85XX
product 1--3..............................................
Table 2--1: Logic analyzer disassembly display options 2--6..........
Table2--2:Cycletypelabels 2--11.................................
T able 2--3: Computed cycle type labels 2--12........................
T able 2--4: Special messages and their descriptions 2--13.............
Table 2--5: Mark selections and definitions in 85XXLB,
85XXLB_ALT, and 85XXLB_ADS 2--21.......................
Table 2--6: Mark selections and definitions in 85XXDDR and
85XXDDR_RW 2--22........................................
Table 3--1: 85XXDDR support package channel groups 3--1.........
Table 3--2: 85XXDDR_RW support package channel groups 3--2.....
Table 3--3: 85XXLB, 85XXLB_ALT, 85XXLB_ADS support
package channel groups 3--3................................
Table 3--4: 85XXLB, 85XXLB_ALT, 85XXLB_ADS ChipSel
group symbol table definitions 3--5..........................
Table 3--5: 85XXLB, 85XXLB_ALT, 85XXLB_ADS Control group
symbol table definitions 3--6................................
Table 3--6: 85XXLB, 85XXLB_ALT, 85XXLB_ADS, 85XXDDR,
and 85XXDDR_RW Debug group symbol table definitions 3--7...
Table 3--7: 85XXDDR AND 85XXDDR_RW Control group symbol
table definitions 3--8.......................................
Table 3--8: Address group assign ments for 85XXDDR support
package 3--9..............................................
Table 3--9: BankAddr group assignments for 85XXDDR support
package 3--9..............................................
Table 3--10: DataLo group assignments for 85XXDDR support
package 3--10..............................................
Table 3--11: DataHi group assignments for 85XXDDR support
package 3--11..............................................
Table 3--12: Control group assignments for 85XXDDR support
package 3--12..............................................
Table 3--13: Command group assignments for 85XXDDR support
packages 3--13.............................................
iv
TMS568 MPC85XX Microprocessor Software Support
Table of Contents
Table 3--14: Strobes group assignments for 85XXDDR support
package 3--13..............................................
Table 3--15: ChipSel group assignments for 85XXDDR support
package 3--14..............................................
Table 3--16: CheckBits group assignments for 85XXDDR support
package 3--14..............................................
Table 3--17: WrtMasks group assignments for 85XXDDR support
package 3--14..............................................
Table 3--18: Debug group assignments for the 85XXDDR support
package 3--15..............................................
Table 3--19: Misc group assignments for 85XXDDR support
package 3--15..............................................
Table 3--20: UserDefined group assignments for the 85XXDDR
support package 3--16.......................................
Table 3--21: DatByte0 group assignments for 85XXDDR support
package 3--16..............................................
Table 3--22: DatByte1 group assignments for 85XXDDR support
package 3--17..............................................
Table 3--23: DatByte2 group assignments for 85XXDDR support
package 3--17..............................................
Table 3--24: DatByte3 group assignments for 85XXDDR support
package 3--18..............................................
Table 3--25: DatByte4 group assignments for 85XXDDR support
package 3--18..............................................
Table 3--26: DatByte5 group assignments for 85XXDDR support
package 3--19..............................................
Table 3--27: DatByte6 group assignments for 85XXDDR support
package 3--19..............................................
Table 3--28: DatByte7 group assignments for 85XXDDR support
package 3--20..............................................
Table 3--29: Address group assignments for 85XXDDR_RW
support package 3--21.......................................
Table 3--30: BankAddr group assignments for 85XXDDR_RW
support package 3--21.......................................
Table 3--31: RdDatLo group assignments for 85XXDDR_RW
support package 3--22.......................................
Table 3--32: RdDatHi group assignments for 85XXDDR_RW
support package 3--23......................................
Table 3--33: WrDatLo group assignments for 85XXDDR_RW
support package 3--24.......................................
Table 3--34: WrDatHi group assignments for 85XXDDR_RW
support package 3--26.......................................
TMS568 MPC85XX Microprocessor Software Support
v
Table of Contents
Table 3--35: Control group assignments for 85XXDDR_RW
support package 3--27.......................................
Table 3--36: Command group assignments for 85XXDDR_RW
support package 3--27.......................................
Table 3--37: Strobes group assignments for 85XXDDR_RW
support package 3--28......................................
Table 3--38: ChipSel assignments for 85XXDDR_RW support
package 3--28..............................................
Table 3--39: CheckBits group assignments for 85XXDDR_RW
support package 3--29.......................................
Table 3--40: WrtMasks group assignments for 85XXDDR_RW
support package 3--29.......................................
Table 3--41: Debug group assignments for 85XXDDR_RW
support package 3--30.......................................
Table 3--42: Misc group assignments for 85XXDDR_RW support
package 3--30..............................................
Table 3--43: UserDefined group assignments for 85XXDDR_RW
support package 3--30.......................................
Table 3--44: RDDatBy0 group assignments for 85XXDDR_RW
support package 3--31.......................................
Table 3--45: RDDatBy1 group assignments for 85XXDDR_RW
support package 3--32.......................................
Table 3--46: RDDatBy2 group assignments for 85XXDDR_RW
support package 3--32.......................................
Table 3--47: RDDatBy3 group assignments for 85XXDDR_RW
support package 3--33.......................................
Table 3--48: RDDatBy4 group assignments for 85XXDDR_RW
support package 3--33.......................................
Table 3--49: RDDatBy5 group assignments for 85XXDDR_RW
support package 3--34......................................
Table 3--50: RDDatBy6 group assignments for 85XXDDR_RW
support package 3--34......................................
Table 3--51: RDDatBy7 group assignments for 85XXDDR_RW
support package 3--35.......................................
Table 3--52: WRDatBy0 group assignments for 85XXDDR_RW
support package 3--35.......................................
Table 3--53: WRDatBy1 group assignments for 85XXDDR_RW
support package 3--36.......................................
Table 3--54: WRDatBy2 group assignments for 85XXDDR_RW
support package 3--36......................................
Table 3--55: WRDatBy3 group assignments for 85XXDDR_RW
support package 3--37.......................................
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TMS568 MPC85XX Microprocessor Software Support
Table of Contents
Table 3--56: WRDatBy4 group assignments for 85XXDDR_RW
support package 3--37.......................................
Table 3--57: WRDatBy5 group assignments for 85XXDDR_RW
support package 3--38.......................................
Table 3--58: WRDatBy6 group assignments for 85XXDDR_RW
support package 3--38.......................................
Table 3--59: WRDatBy7 group assignments for 85XXDDR_RW
support package 3--39.......................................
Table 3--60: Address and Data group assignments for 85XXLB
support package 3--39.......................................
Table 3--61: BurstAddr group assignments for 85XXLB support
package 3--41..............................................
Table 3--62: Control group assignments for 85XXLB support
package 3--41..............................................
Table 3--63: ChipSel group assignments for 85XXLB support
package 3--42..............................................
Table 3--64: Debug group assignments for 85XXLB support
packages 3--42.............................................
Table 3--65: DataMask group assignments for 85XXLB support
package 3--43..............................................
Table 3--66: UserDefined group assignments for 85XXLB support
package 3--43..............................................
Table 3--67: Address group assignments for 85XXLB_ALT support
package 3--43..............................................
Table 3--68: Data group assignments for 85XXLB_ALT support
package 3--45..............................................
Table 3--69: BurstAddr group assignments for 85XXLB_ALT
support package 3--46.......................................
Table 3--70: Control group assignments for 85XXLB_ALT support
package 3--46..............................................
Table 3--71: ChipSel group assignments for 85XXLB_ALT support
package 3--47..............................................
Table 3--72: Debug group assignments for 85XXLB_ALT support
package 3--47..............................................
Table 3--73: DataMask group assignments for 85XXLB_ALT
support package 3--48.......................................
Table 3--74: UserDefined group assignments for 85XXLB_ALT
support package 3--48.......................................
Table 3--75: Address and Data group assignments for 85XXLB_ADS
support package 3--48.......................................
Table 3--76: BurstAddr group assignments for 85XXLB_ADS
support package 3--50.......................................
TMS568 MPC85XX Microprocessor Software Support
vii
Table of Contents
Table 3--77: Control group assignments for 85XXLB_ADS support
package 3--50..............................................
Table 3--78: ChipSel group assignments for 85XXLB_ADS support
package 3--51..............................................
Table 3--79: Debug group assignments for 85XXLB_ADS support
package 3--51..............................................
Table 3--80: DataMask group assignments for 85XXLB_ADS
support package 3--51.......................................
Table 3--81: UserDefined group assignments for 85XXLB_ADS
support package 3--52.......................................
Table 3--82: Clock and Qualifier channel assignments for 85XXDDR
support package 3--52.......................................
Table 3--83: Clock and Qualifier channel assignments for
85XXDDR_RW support package 3--52.........................
Table 3--84: Clock and Qualifier channel assignments for 85XXLB
suppor t package 3--53......................................
Table 3--85: Clock and Qualifier channel assignments for
85XXLB_ALT support package 3--53..........................
Table 3--86: Clock and Qualifier channel assignments for
85XXLB_ADS support package 3--54..........................
Table 3--87: Recommended pin assignments for a P6434 Mictor
connector (component side) 3--55..............................
Table 3--88: Footprint to logic analyzer mapping for the 85XXDDR
support package 3--58.......................................
Table 3--89: Footprint to logic analyzer mapping for the
85XXDDR_RW support package 3--58.........................
Table 3--90: MA--A2/A3 probe connections for 85XXDDR support
package 3--60..............................................
Table 3--91: MA--A0/A1 probe connections for 85XXDDR support
package 3--61..............................................
Table 3--92: MA--C2/C3 probe connections for the 85XXDDR
support package 3--62.......................................
Table 3--93: MA--E2/E3 probe connections for 85XXDDR support
package 3--62..............................................
Table 3--94: SL--A2/A3 probe connections for 85XXDDR support
package 3--63..............................................
Table 3--95: SL--A0/A1 probe connections for 85XXDDR support
package 3--64..............................................
Table 3--96: SL--C2/C3 probe connections for 85XXDDR support
package 3--65..............................................
Table 3--97: SL--E2/E3 probe connections for 85XXDDR support
package 3--65..............................................
viii
TMS568 MPC85XX Microprocessor Software Support
Table of Contents
Table 3--98: MA--A2/A3 probe connections for 85XXDDR_RW
support package 3--67......................................
Table 3--99: MA--A0/A1 probe connections for 85XXDDR_RW
support package 3--67.......................................
Table 3--100: MA--C2/C3 probe connections for 85XXDDR_RW
support package 3--68......................................
Table 3--101: MA--E2/E3 probe connections for 85XXDDR_RW
support package 3--69.......................................
Table 3--102: SL--A2/A3 probe connections for 85XXDDR_RW
support package 3--70.......................................
Table 3--103: SL--A0/A1 probe connections for 85XXDDR_RW
support package 3--71.......................................
Table 3--104: SL--C2/C3 probe connections for 85XXDDR_RW
support package 3--71.......................................
Table 3--105: SL--E2/E3 probe connections for 85XXDDR_RW
support package 3--72.......................................
Table 3--106: Mictor A connections for 85XXLB support
package 3--74..............................................
Table 3--107: Mictor C connections for 85XXLB support package
(Probe #3) 3--75............................................
Table 3--108: Mictor D connections for 85XXLB support package
(Probe #3) 3--76............................................
Table 3--109: A3/A2 connections using P6860 probe for 85XXLB
support package 3--76......................................
Table 3--110: C3/C2 connections using P6860 probe for 85XXLB
support package 3--77.......................................
Table 3--111: A1/A0 connections using P6860 probe for 85XXLB
support package 3--78......................................
Table 3--112: Address connections for 85XXLB_ALT support
package 3--79..............................................
Table 3--113: Data connections for 85XXLB_ALT support
package 3--81..............................................
Table 3--114: Control connections for 85XXLB support
package 3--82..............................................
Table 3--115: ELB--A2/A3 probe head assignment for
85XXLB_ALT support package 3--84..........................
Table 3--116: ELB--A0/A1 probe head assignment for
85XXLB_ALT support package 3--85..........................
Table 3--117: ELB--D2/D3 probe head assignment for
85XXLB_ALT support package 3--85..........................
Table 3--118: ELB--A0/A1 probe head assignment for
85XXLB_ALT support package 3--86..........................
TMS568 MPC85XX Microprocessor Software Support
ix
Table of Contents
Table 3--119: ELB--C2/C3 probe head assignment for
85XXLB_ALT support package 3--87..........................
Table 3--120: ELB--D0/D1 probe head assignment for
85XXLB_ALT support package 3--88..........................
Table 3--121: Alternate Board Data connections 3--89................
Table 3--122: Alternate Board Control connections 3-- 90..............
Table 3--123: A3/A2 probe head assignment for 85XXLB_ADS
support package 3--91.......................................
Table 3--124: A1/A0 probe head assignment for 85XXLB_ADS
support package 3--92.......................................
Table 3--125: C3/C2 probe head assignment for 85XXLB_ADS
support package 3--93......................................
Table 3--126: D1/D0 probe head assignment for 85XXLB_ADS
support package 3--94.......................................
Table 3--127: Sample points for 85XXLB, and 85XXLB_ADS
support packages 3--96......................................
Table 3--128: Sample points for 85XXLB_ALT support
package 3--96..............................................
Table 3--129: Signal accquisition for 85XXLB, 85XXLB_ALT,
and 85XXLB_ADS support packages 3--97.....................
Table 3--130: Sample points for 85XXDDR and 85XXDDR_RW
support packages 3--98......................................
Table 3--131: Signal acquisition in 85XXDDR and 85XXDDR_RW
support packages 3--99......................................
T able 4--1: Electrical specifications 4--1..........................
x
TMS568 MPC85XX Microprocessor Software Support
Preface
This instruction manual contains specific information about the TMS568
MPC85XX microprocessor support product and is part of a set of information on
how to operate this product on compatible Tektronix logic analyzers.
If you are familiar with operating microprocessor support packages on the logic
analyzer for which the TMS568 MPC85XX microprocessor support product was
purchased, you will probably only need this instruction manual to set up and run
the support.
If you are not familiar with operating microprocessor support packages, you will
need to supplement this instruction manual with information on basic operations
to set up and run the support.
Information on basic operations of microprocessor s upport packages is included
with each product. Each logic analyzer includes basic information that describes
how to perform tasks common to s upport packages on that platform. This
information can be in the form of logic analyzer online help, an installation
manual, or a user manual.
This manual provides detailed information on the following topics:
Manual Conventions
H Connecting the logic analyzer to the target system
H Setting up the logic analyzer to acquire data from the target system
H Acquiring and viewing disassembled data
This manual uses the following conventions:
H The term “disassembler” refers to the software that disassembles
microprocessor cycles into instruction mnemonics and cycle types.
H The phrase “basic operations” refers to the logic analyzer online help, or the
user manual that covers the basic operations of the microprocessor support.
H The phrase “logic analyzer” refers to the Tektronix logic analyzer for which
this product was purchased.
TMS568 MPC85XX Microprocessor Software Support
xi
Preface
Contacting Tektronix
Phone 1-800-833-9200*
Address Tektronix, Inc.
Department or name (if known)
14200 SW Karl Braun Drive
P.O. Box 500
Beaverton, OR 97077
USA
Web site www.tektronix.com
Sales support 1-800-833-9200, select option 1*
Service support 1-800-833-9200, select option 2*
Technical support Email: techsupport@tektronix.com
1-800-833-9200, select option 3*
6:00 a.m. -- 5:00 p.m. Pacific time
* This phone number is toll free in North America. After office hours, please leave a
voice mail message.
Outside North America, contact a Tektronix sales office or distributor; see the
Tektronix web site for a list of offices.
TMS568 MPC85XX Microprocessor Software Support
xii
Getting Started
Getting Started
This section contains information on the TMS568 MPC85XX microprocessor
support product and information on connecting your logic analyzer to your target
system.
Support Package Description
The TMS568 MPC85XX microprocessor support product displays disassembled
data from systems based on MPC8540/8560. The support package allows you to
acquire microprocessor cycles with minimal impact on the environment of the
system.
The TMS568 MPC85XX microprocessor support product contains five support
packages that have their own setup software and disassemblers. A description of
each support package is listed here:
H 85XXDDR acquires DDR commands and DDR reads or DDR writes.
H 85XXDDR_RW acquires commands and both DDR reads and writes
simultaneously.
Disassembly Support
H 85XXLB acquires the SDRAM and GPCM cycles on the local bus.
H 85XXLB_ALT acquires the SDRAM and GPCM bus cycles from 85XX
local bus interface. This support package can be used with reference boards
having alternate channel assignment. Refer to the channel assignment section
for details.
H 85XXLB_ADS acquires the SDRAM and GPCM bus cycles from 85XX
local bus interface. This support package is compatible with Motorola ADS
reference board channel assignment.
The disassembler decodes information from the DDR and local bus interfaces.
To use this support package efficiently refer to the following documents:
H MPC8540 INTEGRATED PROCESSOR PRELIMINARY USER’S MANUAL,
{Motorola, MPC8540xxxx 3/2002, Rev.1.3}
H MPC8560 PowerQUICC III INTEGRATED COMMUNICATION PROC-
ESSOR PRELIMINARY USER’S MANUAL, {Motorola MPC8560xxxx,
1/2003, Rev.2.0}
H JEDEC STANDARD, DDR SDRAM Specification, JESD79, Release 2, May
2002.
TMS568 MPC85XX Microprocessor Software Support
1--1
Getting Started
H NEX_SPA (Sample point analyzer), Nexus technologies( www.bus-
boards.com).
Logic Analyzer Software Compatibility
The label on the microprocessor support CD-ROM states which version of logic
analyzer software this support package is compatible with.
Logic Analyzer Configuration
The TMS568 product allows a choice of required minimum module configurations.
Module Requirements
Probe Requirements
Table 1--1 lists the minimum module requirements for the TMS568 MPC85XX
microprocessor support product.
Table 1--1: Module requirements
Support package Module requirements
85XXDDR One TLA7Ax4 450 MHz, 136-channel module
85XXDDR_RW Two TLA7Ax4 450 MHz, 136-channel modules in merged
configuration
85XXLB One TLA7N2 module 200 MHz, 68-channel module
85XXLB_ALT One TLA7N3 module 200 MHz, 102-channel module
85XXLB_ADS TLA7Ax2 module 235 MHz state speed, 68-channel
module
Table 1--2 lists the probe requirements for the TMS568 MPC85XX
microprocessor support product.
Table 1--2: Probe requirements
Support package Probe requirements
85XXDDR Four P6860 probes
1--2
85XXDDR_RW Eight P6860 probes
85XXLB Two P6434 probes
85XXLB_ALT Three P6434 probes
85XXLB_ADS Two P6860 probes
TMS568 MPC85XX Microprocessor Software Support
Getting Started
Requirements and Restrictions
Review the electrical specifications in the Specifications section on page 4--1 in
this manual as they pertain to your target system, as well as the following
descriptions of TMS568 MPC85XX microprocessor support product require ments and restrictions.
Hardware Reset
Clock Rate
Setup/Hold Time
Adjustments
If a hardware reset occurs in your target system during an acquisition, the
application disassembler might acquire an invalid sample.
The maximum clock rate for local bus is 166 MHz and for DDR--SDRAM is 200
MHz.
The DDR reads and writes have different timings. The DQS and data are edge
aligned for reads and center aligned for writes. 85XXDDR support package has
default setup hold timings valid for reads. To capture write data accurately or if
the DDR SDRAM timings are different, you need to adjust the setup/hold timing
values. This can be done either manually or using a tool.
To manually adjust setup/hold, trigger on a read or a write cycle appropriately.
Then, in the MagniVu, find the data valid window for DDR data with reference
to the clock edge. Select setup/hold timings in custom clocking option, in such a
way that the setup/hold window falls at the center of the data valid window.
To assist in this operation, a software tool called DDR Sample Point Analysis
Software (NEX-SPA) is available from Nexus Technology, Inc (a Tektronix
Embedded System Tools Partner). The tool and a user guide can be downloaded
from their web site, www.busboards.com.
Table 1--3 lists the setup/hold time requirements for the different support
packages. For correct acquisition, the target system must provide a data valid
window meeting these requirements.
Table 1--3: Setup/Hold time requirements for the MPC85XX product
Support package
name
85XXDDR One TLA7Ax4 450 MHz,
85XXDDR_RW Two TLAAx4 450 MHz,
85XXLB One TLA7N2 module 200
Logic analyzer/ module Setup time Hold time
136--channel module
136--channel modules in
merged configuration
MHz, 68--channel module
TMS568 MPC85XX Microprocessor Software Support
750 ps 0ps
750 ps 0ps
2.5 ns 0ps
1--3
Getting Started
Table 1--3: Setup/Hold time requirements for the MPC85XX product (Cont.)
Support package
name
85XXLB_ALT One TLA7N3 module 200
MHz, 102--channel module
2.5 ns 0ps
Hold timeSetup timeLogic analyzer/ module
85XXLB_ADS TLA7Ax2 module 235 MHz
state speed, 68--channel
module
Nonintrusive Acquisition
Acquiring microprocessor cycles is nonintrusive to the target system. The
TMS568 MPC85XX microprocessor support product does not intercept, modify,
or present signals back to the system under test.
Limitations of the Support
The TMS568 MPC85XX microprocessor support product does not support the
following:
H Local Bus SDRAM extended CAS Latency “4,5,6,7”.
H UPM cycles.
Connecting the Logic Analyzer to a Target System
You can use the channel probes to make the connections between the logic
analyzer and your target system.
2.5 ns 0ps
1--4
To connect the probes to the target system as described in the TMS568
MPC85XX microprocessor support product channel assignment, follow the
steps:
1. Power off your target system. It is not necessary to power off the logic
analyzer.
CAUTION. To prevent static damage, handle the target systems, probes, and the
logic analyzer module in a static-free environment. Static discharge can damage
these components.
Always wear a grounding wrist strap, heel strap, or similar device while
handling the target system.
2. Place the target system on a horizontal, static-free surface.
TMS568 MPC85XX Microprocessor Software Support
Getting Started
3. Use tables 3--87 through 3--126 starting on page 3--55 to connect the channel
probes to the necessary signals in the target system.
A probe adapter (NEX--DDRHS) that connects the Logic Analyzer to a JEDEC
standard DDR--SDRAM slot is available from Nexus Technology Inc. (a
Tektronix Embedded Systems Tools Partner). TMS568 DDR--SDRAM supports
are compatible with this probe adapter. When using this probe adapter, an
automatic dequeue feature is available only if the Debug signals are routed
through the ECC pins.
Contact your Tektronix representative if you require any assistance regarding the
probe adapter.
Labeling P6434 and P6860 Probes
The TMS568 MPC85XX microprocessor support product relies on the channel
mapping and labeling scheme for the P6860 and P6434 Probes. Apply labels,
using the instructions described in the P6810, P6860, and P6880 Logic Analyzer
Probes Instruction manual and P6434 Logic Analyzer Probes Instruction manual.
TMS568 MPC85XX Microprocessor Software Support
1--5
Getting Started
1--6
TMS568 MPC85XX Microprocessor Software Support
Operating Basics
Setting Up the Support
This section provides information on how to set up the software support and
covers the following topics:
H Installing the support software
H Support package setups
H Clocking options
The information in this section pertains to the specific operations and functions
of the TMS568 MPC85XX microprocessor support product on a Tektronix logic
analyzer.
Before you acquire and display disassembled data, you need to load the support
package and specify the setups for clocking and triggering as described in the
logic analyzer online help under “Microprocessor support”. The support package
provides default values for each of these setups, but you can change the setups as
needed.
Installing the Support Software
NOTE. Before you install any software, it is recommended you verify that the
microprocessor support software is compatible with the logic analyzer software.
To install the TMS568 MPC85XX microprocessor support product on your
Tektronix logic analyzer, follow these steps:
1. Insert the CD-ROM in the CD drive.
2. Click the Windows Start button, point to Settings, and click Control Panel.
3. In the Control Panel window, double-click Add/Remove Programs.
4. Follow the instructions on the screen for installing the software from the
CD-ROM. A copy of the instruction manual is available on the CD-ROM.
To remove or uninstall software, follow the above instructions and select
Uninstall. You need to close all windows before you uninstall any software.
The TMS568 MPC85XX microprocessor support product installs five different
support packages.
TMS568 MPC85XX Microprocessor Software Support
2--1
Setting Up the Support
Support Package Setups
The TMS568 MPC85XX microprocessor support product installs five support
packages that have their own setup s oftware and disassemblers. A description of
each support package is listed here:
H 85XXDDR: This support package acquires DDR commands and DDR reads
H 85XXDDR_RW: This support package acquires commands and both DDR
H 85XXLB: This support package acquires the SDRAM and GPCM cycles on
H 85XXLB_ALT: This support package acquires SDRAM and GPCM bus
or DDR writes.
reads and writes simultaneously.
the local bus.
cycles from 85XX local bus interface. Use this package with reference
boards that have alternate channel assignment. Refer to the channel
assignment section for more details.
Clocking Options
85XXDDR and
85XXDDR_RW Support
Packages
H 85XXLB_ADS: This support package is compatible with Motorola ADS
reference board channel assignment. This support package acquires SDRAM
and GPCM bus cycles from 85XX local bus interface.
The TMS568 MPC85XX microprocessor support product adds these five
selections to the “Load Support Package” dialog box, under the File pulldown
menu.
A special custom clocking program is loaded into the module every time you
load one of the 85XXDDR, 85XXDDR_RW, 85XXLB, 85XXLB_ALT or
85XXLB_ADS support packages from the TMS568 MPC85XX microprocessor
support product. Each support package offers different clocking options. You
may use the default clocking option or choose an alternate by clicking the
“More...” button in the logic analyzer setup window.
The software provides three custom clocking options for the 85XXDDR and
85XXDDR_RW support packages.
DDR Clocking. Permits selection between DDR clocks (MCK0, MCK1, MCK2)
and chip selects (MCS0 or/and MCS1) to acquire DDR data. Select the
approriate option from the following:
2--2
DDR MCK0; MCS0~ only active (default)
DDR MCK0; MCS0~ and MCS1~active
DDR MCK1; MCS0~ only active
TMS568 MPC85XX Microprocessor Software Support
Setting Up the Support
DDR MCK1; MCS0~ and MCS1~active
DDR MCK2; MCS0~ only active, or
DDR MCK2; MCS0~ and MCS1~active
Clock Mode. Select the type of data acquisition.
Selective Clocking (default)
This mode reduces the number of idle cycles stored by the acquisition card to
optimally use the acquisition memory. Data is stored whenever MRAS~ or
MCAS~ is asserted, along with CS0~ or CS1~. After every assertion of MCAS~,
additional 17 samples are taken on every DDR Clock edge. If MCAS~ and
ChipSelect are asserted during these 17 samples, the count is reset.
NOTE. This mode does not work if the DDR target uses ChipSelect CS3~ or CS4~
to enable the DDR memory.
Every DDR Clock Edge
This mode causes the acquisition card to store data on every Rising and Falling
edge of the selected DDR SDRAM clock.
85XXLB, 85XXLB_ALT,
and 85XXLB_ADS Support
Packages
Refresh Cycles. Select one of the following options to either acquire or not
acquire refresh cycles.
Do not acquire (default) -- This selection does not acquire refresh cycles.
Acquire -- This selection acquires refresh cycles.
The software provides four custom clocking options for the 85XXLB,
85XXLB_ALT, and 85XXLB_ADS support packages.
Debug Mode. Acquires data when Debug Signals are available or not available.
Disabled (default)
Enabled
Clock Mode. Select the type of data acquisition.
Selective Clocking (default)
This mode reduces the number of idle cycles stored by the acquisition card to
optimally use acquisition memory.
Every LB Clock Falling-Edge
This mode causes the acquisition card to store data on every falling edge of the
selected local bus clock.
TMS568 MPC85XX Microprocessor Software Support
2--3
Setting Up the Support
SDRAM: CAS Latency. Select SDRAM CAS Latency as one of the following:
One (default)
Two
Three
SDRAM: Port Size. Select the SDRAM Port Size as one of the following:
16 bit (default)
8 bit or 32 bit
2--4
TMS568 MPC85XX Microprocessor Software Support
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