Tektronix TMS561 Instruction Manual
Instruction Manual
TMS 561
MPC850/823/801 Microprocessor Support
071-0374-01
Warning
The servicing instructions are for use by
qualified personnel only. To avoid personal
injury, do not perform any servicing unless you
are qualified to do so. Refer to all safety
summaries prior to performing service.
Copyright E T ektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and are
protected by United States copyright laws and international treaty provisions.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the
Rights in T echnical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the
Commercial Computer Software – Restricted Rights clause at F AR 52.227-19, as applicable.
T ektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material. Specifications and price change privileges reserved.
Printed in the U.S.A.
T ektronix, Inc., P.O. Box 1000, Wilsonville, OR 97070–1000
TEKTRONIX and TEK are registered trademarks of T ektronix, Inc.
SOFTWARE WARRANTY
T ektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, T ektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
T ektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If T ektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
Table of Contents
Getting Started
Operating Basics
General Safety Summary iii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preface v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manual Conventions v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Documentation vi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacting T ektronix vi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Support Package Description 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Software Compatibility 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Configuration 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Requirements and Restrictions 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functionality Not Supported 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting the Logic Analyzer to a System Under T est 1–4. . . . . . . . . . . . . . . . . . .
Channel Assignments 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU To Mictor Connections 1–1 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting Up the Support 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Group Definitions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking Options 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Symbols 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acquiring and Viewing Disassembled Data 2–7. . . . . . . . . . . . . . . . . . . . .
Acquiring Data 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing Disassembled Data 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Display Format 2–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software Display Format 2–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Flow Display Format 2–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Display Format 2–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing How Data is Displayed 2–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optional Display Selections 2–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Micro Specific Fields 2–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Marking Cycles 2–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Displaying Exception Labels 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing an Example of Disassembled Data 2–17. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifications
Replaceable Parts List
Index
TMS 561 MPC850 Microprocessor Support
i
Table of Contents
List of Tables
Table 1–1: Address channel group assignments 1–5. . . . . . . . . . . . . . . . .
Table 1–2: Data channel group assignments 1–7. . . . . . . . . . . . . . . . . . . .
Table 1–3: Control channel group assignments 1–8. . . . . . . . . . . . . . . . . .
Table 1–4: Tsize channel group assignments 1–8. . . . . . . . . . . . . . . . . . . .
Table 1–5: Chipsel channel group assignments 1–9. . . . . . . . . . . . . . . . . .
Table 1–6: Misc channel group assignments 1–9. . . . . . . . . . . . . . . . . . . .
Table 1–7: Clock and qualifier channel assignments 1–10. . . . . . . . . . . . .
Table 1–8: Channel groups not required for clocking
and disassembly 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–9: CPU to Mictor connections for Mictor A pins 1–11. . . . . . . . .
Table 1–10: CPU to Mictor connections for Mictor D pins 1–12. . . . . . . .
Table 1–11: CPU to Mictor connections for Mictor C pins 1–14. . . . . . . .
Table 2–1: Control group symbol table definitions 2–3. . . . . . . . . . . . . . .
Table 2–2: Tsize group symbol table definitions 2–4. . . . . . . . . . . . . . . . .
Table 2–3: Chipsel Control group symbol table definitions 2–5. . . . . . . .
Table 2–4: Description of special characters in the display 2–8. . . . . . . .
Table 2–5: Cycle-type labels for sequences and definitions 2–8. . . . . . . .
Table 2–6: Cycle-type labels 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–7: Mark selections and definitions 2–15. . . . . . . . . . . . . . . . . . . . .
Table 2–8: Interrupt and exception labels 2–16. . . . . . . . . . . . . . . . . . . . . .
Table 3–1: Electrical specifications 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . .
ii
TMS 561 MPC850 Microprocessor Support
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
To Avoid Fire or
Personal Injury
Connect and Disconnect Properly . Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Ground the Product. This product is indirectly grounded through the grounding
conductor of the mainframe power cord. To avoid electric shock, the grounding
conductor must be connected to earth ground. Before making connections to the
input or output terminals of the product, ensure that the product is properly
grounded.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and marking on the product. Consult the product manual for further ratings
information before making connections to the product.
The common terminal is at ground potential. Do not connect the common
terminal to elevated voltages.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry .
TMS 561 MPC850 Microprocessor Support
iii
General Safety Summary
Symbols and Terms
T erms in this Manual. These terms may appear in this manual:
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
T erms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
Symbols on the Product. The following symbols may appear on the product:
WARNING
High Voltage
Protective Ground
(Earth) T erminal
CAUTION
Refer to Manual
Double
Insulated
iv
TMS 561 MPC850 Microprocessor Support
Preface
This instruction manual contains specific information about the
TMS 561 MPC850 microprocessor support package and is part of a set of
information on how to operate this product on compatible Tektronix logic
analyzers.
If you are familiar with operating microprocessor support packages on the logic
analyzer for which the TMS 561 MPC850 support was purchased, you will
probably only need this instruction manual to set up and run the support.
If you are not familiar with operating microprocessor support packages, you will
need to supplement this instruction manual with information on basic operations
to set up and run the support.
Information on basic operations of microprocessor support packages is included
with each product. Each logic analyzer includes basic information that describes
how to perform tasks common to support packages on that platform. This
information can be in the form of online help, an installation manual, or a user
manual.
This manual provides detailed information on the following topics:
Manual Conventions
H Connecting the logic analyzer to the system under test
H Setting up the logic analyzer to acquire data from the system under test
H Acquiring and viewing disassembled data
This manual uses the following conventions:
H The term “disassembler” refers to the software that disassembles bus cycles
into instruction mnemonics and cycle types.
H The phrase “information on basic operations” refers to online help, an
installation manual, or a user manual covering the basic operations of
microprocessor support..
H In the information on basic operations, the term “XXX” or “P54C” appearing
in field selections and file names must be replaced with MPC8XX. This term
is the name of the microprocessor in field selections and file names you must
use to operate the MPC850 support.
H The term “logic analyzer” refers to the Tektronix logic analyzer for which
this product was purchased.
TMS 561 MPC850 Microprocessor Support
v
Preface
Logic Analyzer Documentation
A description of other documentation available for each type of Tektronix logic
analyzer is located in the user manual of the corresponding module. The manual
set provides the information necessary to install, operate, maintain, and service
the logic analyzer and its associated products.
Contacting Tektronix
Product
Support
Service
Support
For other
information
To write us
Website
For questions about using Tektronix measurement products, call
toll free in North America:
1-800-TEK-WIDE (1-800-835-9433 ext. 2400)
6:00 a.m. – 5:00 p.m. Pacific time
Or contact us by e-mail:
tm_app_supp@tek.com
For product support outside of North America, contact your
local Tektronix distributor or sales office.
Tektronix offers extended warranty and calibration programs as
options on many products. Contact your local Tektronix
distributor or sales office.
For a listing of worldwide service centers, visit our web site.
In North America:
1-800-TEK-WIDE (1-800-835-9433)
An operator will direct your call.
Tektronix, Inc.
P.O. Box 1000
Wilsonville, OR 97070-1000
USA
Tektronix.com
vi
TMS 561 MPC850 Microprocessor Support
Getting Started
Getting Started
This chapter contains information on the TMS 561 MPC850 microprocessor
support and information on connecting your logic analyzer to your system under
test.
Support Package Description
The TMS 561 microprocessor support package displays disassembled data from
systems based on the Motorola MPC8XX microprocessor.
To use this support efficiently, refer to information on basic operations and the
following documents:
H MPC850 User’s Manual, Motorola, 1997
H MPC823 User’s Manual, Motorola, 1997
H MPC801 User’s Manual, Motorola, 1997
The microprocessors the TMS 561 support can acquire and display as disassembled data are:
MPC801
MPC823
MPC850
Logic Analyzer Software Compatibility
The label on the microprocessor support floppy disk states which version of logic
analyzer software the support is compatible with.
Logic Analyzer Configuration
For use with a TLA 700 Series, the TMS 561 support requires a minimum of one
102-channel module.
TMS 561 MPC850 Microprocessor Support
1–1
Getting Started
Requirements and Restrictions
Review the electrical specifications in the Specifications chapter in this manual
as they pertain to your system under test, as well as the following descriptions of
other MPC850 support requirements and restrictions.
Hardware Reset. If a hardware reset occurs in your MPC850 system during an
acquisition, the application disassembler might acquire an invalid sample.
System Clock Rate. The MPC850 microprocessor support can acquire data from
the MPC850/823 microprocessor operating at speeds of up to 50 MHz and the
MPC801 microprocessor at 40 MHz. The tested clock rate for the MPC850/823
microprocessor is 33 MHz and for the MPC801 microprocessor is 40 MHz. The
operating clock rate specifications were measured at the time of printing. Contact
your Tektronix sales representative for current information on the fastest devices
supported.
CPM Related Information. The CPM related information protocols that appear on
the serial bus are not acquired by the TMS 561 support software.
Disabling the Instruction Cache. To display disassembled acquired data, you must
disable the internal instruction cache. Disabling the cache makes all instruction
prefetches visible on the bus so that they can be acquired and displayed
disassembled.
Disabling the Data Cache. To display acquired data, you must disable the data
cache. Disabling the data cache makes visible all loads and stores to memory on
the bus, including data reads and writes, so the software can acquire and display
them.
Nonintrusive Acquisition. The MPC850 microprocessor support will not intercept,
modify, or present signals back to the system under test.
Programming the UPMs. The MPC8XX microprocessor has an on-chip memory
controller that supports the DRAM interface. The on-chip memory controller has
three machines:
General Purpose Chip Select Machine (GPCM)
1–2
Two User Programmable Machines (UPMs), UPMA and UPMB
TMS 561 MPC850 Microprocessor Support
Getting Started
To acquire correct column addresses when the DRAM is used for burst access,
program the UPM to acquire waveforms on assertion of TA* at the rising clock
edge; the corresponding column address appears on the bus.
The programming in the UPM is flexible. The following programmed
UPM words for the UPM controlled burst accesses to 32-bit DRAM with a speed
of 60 ns. The words must be placed at the UPM start address 0x08 for burst read
and at the UPM start address 0x20 for burst write. There are many examples of
different patterns of words that will achieve the same result.
8fffec24
0fffec04
08ffec00
00ffec0c
03ffec04
00ffec40
00ffcc0c
0cffcc44
00ffec00
03ffec0c
00ffec44
00ffcc00
3fffc847
DRAM and Non-DRAM. When the acquisition has both DRAM and non-DRAM
accesses, the clocking option Memory Device selected is DRAM. In this case,
the non-DRAM transactions repeat the same address since there is an acquisition
of the same address at TS* assertion at the rising edge of the clock.
If the acquisition has both DRAM and non-DRAM transactions and if the
clocking option selected for the Memory Device is non-DRAM, then the row
address will not be acquired for the DRAMs and the address is displayed
incorrectly.
Support Software. The MPC850 Support Software is not tested for SDRAM and
EDO memory types.
T siz0 and AT2 Pins. Pins Tsiz0 and AT2 must be programmed for the same
functionality to correctly disassemble data.
Address Translation. The address translation must be turned off for proper
disassembly.
TMS 561 MPC850 Microprocessor Support
1–3
Getting Started
Functionality Not Supported
Interrupt Signals. The interrupt signals are not acquired by the TMS 561 support
software; however, the interrupts are identified when looking at the address
displayed for the interrupt service.
Extra Acquisition Channels. Extra Acquisition Channels are not available.
Alternate Bus Master. Alternate bus master transactions are not processed in the
disassembly.
CPM Cycles. The TMS 561 support software cannot distinguish between the Core
or CPM cycles.
Show Cycle The show cycle signals are not acquired by the TMS 561 support
software.
External Master Cycles. Asynchronous External Master cycles are not acquired.
Connecting the Logic Analyzer to a System Under Test
You can use either channel probes, clock probes, leadsets or a commercial
adapter to make connections between the logic analyzer and your system under
test.
NOTE. Contact your Tektronix sales representative for information on the
availability of a commercial probe adapter.
To connect the probes to MPC8XX signals in the system under test follow these
steps:
1. Turn off power to your system under test. It is not necessary to turn off
power to the logic analyzer.
CAUTION. Static discharge can damage the microprocessor, the probes, and the
logic analyzer module. To prevent static damage, handle these components only
in a static-free environment.
1–4
Always wear a grounding wrist strap, heel strap, or similar device while
handling the microprocessor.
TMS 561 MPC850 Microprocessor Support
Channel Assignments
Getting Started
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer.
3. Place the system under test on a horizontal static-free surface.
4. Use Table 1–1 through Table 1–6 to connect the channel probes to MPC8XX
signal pins in the system under test.
Use leadsets to connect at least one ground lead from each channel probe and
the ground lead from each clock probe to ground pins on your system under
test.
Channel assignments listed in Table 1–1 through Table 1–6 use the following
conventions:
H All signals are required by the support unless indicated otherwise.
H Channels are listed starting with the most significant bit (MSB) descending
to the least significant bit (LSB).
H Channel group assignments are for all modules unless otherwise noted.
H An asterisk symbol (*) following the signal name indicates an active low
signal.
H An equals symbol (=) following a signal name indicates that it is double
probed.
H The module in the higher-numbered slot is referred to as the HI module and
the module in the lower-numbered slot is referred to as the LO module.
The TLA 704 logic analyzer has the lower-numbered slots on the top and the
TLA 711 logic analyzer has the lower-numbered slots on the left.
Table 1–1 lists the probe section and channel assignments for the Address group
and the microprocessor signal for each channel connect. By default, this channel
group is displayed in hexadecimal.
T able 1–1: Address channel group assignments
Bit order Section:channel MPC8XX signal name
31 A3:7 BS_AB0*
30 A3:6 BS_AB1*
29 A3:5 BS_AB2*
28 A3:4 BS_AB3*
27 A3:3 OE*
1
1
1
1
1
TMS 561 MPC850 Microprocessor Support
1–5
Getting Started
T able 1–1: Address channel group assignments (Cont.)
Bit order MPC8XX signal nameSection:channel
26 A3:2 AS*
25 A3:1 A6
24 A3:0 A7
23 A2:7 A8
22 A2:6 A9
21 A2:5 A10
20 A2:4 A11
19 A2:3 A12
18 A2:2 A13
17 A2:1 A14
16 A2:0 A15
15 A1:7 A16
14 A1:6 A17
13 A1:5 A18
12 A1:4 A19
11 A1:3 A20
10 A1:2 A21
9 A1:1 A22
8 A1:0 A23
7 A0:7 A24
6 A0:6 A25
5 A0:5 A26
4 A0:4 A27
3 A0:3 A28
2 A0:2 A29
1 A0:1 A30
0 A0:0 A31
1
The MPC8XX microprocessor has a 32-bit Address bus internally,
only 26-bits of the Address Signals are visible outside the
MPC8XX microprocessor. The 32-bits of Address are displayed
in the disassembly by taking the Base Address as your input for
each bank. Channels A3:7 – A3:2 are included in the Address
group although other signals of interest could be assigned to
these channels.
1
1–6
TMS 561 MPC850 Microprocessor Support
Getting Started
Table 1–2 lists the probe section and channel assignments for the Data group and
the microprocessor signal for each channel connect. By default, this channel
group is displayed in hexadecimal.
T able 1–2: Data channel group assignments
Bit order Section:channel MPC8XX signal name
31 D3:7 D0
30 D3:6 D1
29 D3:5 D2
28 D3:4 D3
27 D3:3 D4
26 D3:2 D5
25 D3:1 D6
24 D3:0 D7
23 D2:7 D8
22 D2:6 D9
21 D2:5 D10
20 D2:4 D11
19 D2:3 D12
18 D2:2 D13
17 D2:1 D14
16 D2:0 D15
15 D1:7 D16
14 D1:6 D17
13 D1:5 D18
12 D1:4 D19
11 D1:3 D20
10 D1:2 D21
9 D1:1 D22
8 D1:0 D23
7 D0:7 D24
6 D0:6 D25
5 D0:5 D26
4 D0:4 D27
3 D0:3 D28
2 D0:2 D29
1 D0:1 D30
0 D0:0 D31
TMS 561 MPC850 Microprocessor Support
1–7
Loading...