Tektronix TMS545A Instruction Manual
Instruction Manual
TMS 545A
PPC7400ITR Microprocessor Support
071-0797-00
Warning
The servicing instructions are for use by qualified
personnel only. To avoid personal injury, do not
perform any servicing unless you are qualified to
do so. Refer to all safety summaries prior to
performing service.
www.tektronix.com
Copyright © T ektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and
are protected by United States copyright laws and international treaty provisions.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the
Rights in T echnical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the
Commercial Computer Software – Restricted Rights clause at F AR 52.227-19, as applicable.
T ektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material. Specifications and price change privileges reserved.
T ektronix, Inc., P.O. Box 500, Beaverton, OR 97077
TEKTRONIX and TEK are registered trademarks of T ektronix, Inc.
SOFTWARE WARRANTY
T ektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, T ektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
T ektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If T ektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
HARDWARE WARRANTY
T ektronix warrants that the products that it manufactures and sells will be free from defects in materials and
workmanship for a period of one (1) year from the date of shipment. If a product proves defective during this
warranty period, T ektronix, at its option, either will repair the defective product without charge for parts and labor,
or will provide a replacement in exchange for the defective product.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period and make suitable arrangements for the performance of service. Customer shall be
responsible for packaging and shipping the defective product to the service center designated by T ektronix, with
shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a
location within the country in which the T ektronix service center is located. Customer shall be responsible for
paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. T ektronix shall not be obligated to furnish service under this warranty a) to repair damage
resulting from attempts by personnel other than T ektronix representatives to install, repair or service the product;
b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any
damage or malfunction caused by the use of non-T ektronix supplies; or d) to service a product that has been
modified or integrated with other products when the effect of such modification or integration increases the time
or difficulty of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE AND
EXCLUSIVE REMEDY PROVIDED TO THE CUST OMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT , SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR
THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
Table of Contents
Getting Started
Operating Basics
General Safety Summary v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preface vii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manual Conventions vii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Documentation viii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacting T ektronix ix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Support Package Description 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Options 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Software Compatibility 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Configuration 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Requirements and Restrictions 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Display Format 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functionality Not Supported 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Assignments 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU To Mictor Connections 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Charts 1–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting Up the Support 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Group Definitions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking Options 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Custom Clocking 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Symbols 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Range Symbols 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acquiring and Viewing Disassembled Data 2–9. . . . . . . . . . . . . . . . . . . . .
Acquiring Data 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing Disassembled Data 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Display Format 2–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software Display Format 2–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Flow Display Format 2–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Display Format 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing How Data is Displayed 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optional Display Selections 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Marking Cycles 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Displaying Exception Labels 2–18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disassembly Display Options 2–20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Micro Specific Fields 2–20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Instruction Trace Reconstruction (ITR) 2–22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing an Example of Disassembled Data 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . .
TMS 545A PPC7400ITR Microprocessor Support
i
Table of Contents
Specifications
Replaceable Parts List
Index
ii
TMS 545A PPC7400ITR Microprocessor Support
List of Figures
Table of Contents
Figure 1–1: Pin assignments for a Mictor connector
(component side) 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–1: PPC 7400/PPC 740/750 support bus timing diagram 2–4. . .
Figure 2–2: Example of the hardware display format 2–13. . . . . . . . . . . . .
Figure 2–3: Listing window 2–25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–4: Display showing Fetch Stream 2–27. . . . . . . . . . . . . . . . . . . . . .
Figure 2–5: Display showing Memory Image 2–27. . . . . . . . . . . . . . . . . . . .
TMS 545A PPC7400ITR Microprocessor Support
iii
Table of Contents
List of Tables
Table 1–1: TLA Address group channel assignments 1–4. . . . . . . . . . . . .
Table 1–2: TLA Hi_Data group channel assignments 1–5. . . . . . . . . . . .
Table 1–3: TLA Lo_Data group channel assignments 1–6. . . . . . . . . . . .
Table 1–4: TLA Control group channel assignments 1–7. . . . . . . . . . . . .
Table 1–5: TLA Transfer group channel assignments 1–8. . . . . . . . . . . .
Table 1–6: TLA Tsiz group channel assignments 1–8. . . . . . . . . . . . . . . .
Table 1–7: TLA Misc group channel assignments 1–8. . . . . . . . . . . . . . . .
Table 1–8: Clock channel assignments 1–9. . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–9: TLA CPU to Mictor connections for Mictor A pins 1–11. . . . .
Table 1–10: TLA CPU to Mictor connections for Mictor C pins 1–12. . . .
Table 1–11: CPU to Mictor connections for Mictor D pins 1–13. . . . . . . .
Table 1–12: TLA CPU to Mictor connections for Mictor E pins 1–15. . . .
Table 1–13: Clock channels 1–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–14: Qualifier channels 1–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–15: Address channels 1–18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–16: Data channels 1–19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–17: Control channels 1–20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–18: Control channels 1–21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–19: Extended channels 1–22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–1: PPC7400ITR_Transfer group symbol table definitions 2–5. .
Table 2–2: PPC7400ITR_Tsiz group symbol table definitions 2–5. . . . . .
Table 2–3: PPC7400ITR_Ctrl Control group symbol table
definitions 2–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–4: Description of special characters in the display 2–10. . . . . . . .
Table 2–5: Cycle type labels for Address sequences and definitions 2–10.
Table 2–6: Cycle type labels for Data sequences and definitions 2–11. . . .
Table 2–7: Cycle type labels for ARTRY, DRTRY, and Data
Error cycles 2–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–8: General cycle type labels definitions 2–12. . . . . . . . . . . . . . . . .
Table 2–9: Mark selections and definitions 2–17. . . . . . . . . . . . . . . . . . . . .
Table 2–10: Interrupt and exception labels 2–19. . . . . . . . . . . . . . . . . . . . .
Table 2–11: TLA disassembly display options 2–20. . . . . . . . . . . . . . . . . . .
Table 3–1: Electrical specifications 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . .
iv
TMS 545A PPC7400ITR Microprocessor Support
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
To Avoid Fire or Personal Injury
Connect and Disconnect Properly . Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Ground the Product. This product is grounded through the grounding conductor
of the power cord. To avoid electric shock, the grounding conductor must be
connected to earth ground. Before making connections to the input or output
terminals of the product, ensure that the product is properly grounded.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and marking on the product. Consult the product manual for further ratings
information before making connections to the product.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry .
TMS 545A PPC7400ITR Microprocessor Support
v
General Safety Summary
Symbols and Terms
T erms in this Manual. These terms may appear in this manual:
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
T erms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
vi
TMS 545A PPC7400ITR Microprocessor Support
Preface
This instruction manual contains specific information about the TMS 545A
PPC7400ITR microprocessor support package and is part of a set of information
on how to operate this product on compatible Tektronix logic analyzers.
If you are familiar with operating TMS 545A PPC7400ITR microprocessor
support package on the logic analyzer for which the TMS 545A PPC7400ITR
support was purchased, you will probably only need this instruction manual to set
up and run the support.
If you are not familiar with operating microprocessor support packages, you will
need to supplement this instruction manual with information on basic operations
in your online help to set up and run the support.
Information on basic operations of PPC7400ITR microprocessor support package
is included with each product. Each logic analyzer includes basic information
that describes how to perform tasks common to support packages on that
platform. This information can be in the form of online help, an installation
manual, or a user manual.
This manual provides detailed information on the following topics:
Manual Conventions
H Connecting the logic analyzer to the system under test
H Setting up the logic analyzer to acquire data from the system under test
H Acquiring and viewing disassembled data
This manual uses the following conventions:
H The term “disassembler” refers to the software that disassembles bus cycles
into instruction mnemonics and cycle types.
H The phrase “information on basic operations” refers to online help, an
installation manual, or a user manual covering the basic operations of
PPC7400ITR microprocessor support.
H In the information on basic operations, the term “XXX” or “P54C” appearing
in field selections and file names must be replaced with PPC7400ITR. This
term is the name of the PPC7400ITR microprocessor in field selections and
file names you must use to operate the PPC7400ITR support.
H The term SUT (system under test) refers to the PPC7400ITR microprocessor-
based system from which data will be acquired.
TMS 545A PPC7400ITR Microprocessor Support
vii
Preface
H The term “HI module” refers to the module in the higher-numbered slot and
the term “LO module” refers to the module in the lower-numbered slot.
H PPC7400ITR refers to all supported variations of the PPC750 or PPC740
PPC7400 microprocessors unless otherwise noted.
H An underscore (_) following a signal name indicates an active low signal.
Logic Analyzer Documentation
A description of other documentation available for each type of Tektronix logic
analyzer is located in the user manual of the corresponding module. The manual
set provides the information necessary to install, operate, maintain, and service
the logic analyzer and associated products.
viii
TMS 545A PPC7400ITR Microprocessor Support
Contacting Tektronix
Preface
Phone 1-800-833-9200*
Address Tektronix, Inc.
Department or name (if known)
14200 SW Karl Braun Drive
P.O. Box 500
Beaverton, OR 97077
USA
Web site www.tektronix.com
Sales support 1-800-833-9200, select option 1*
Service support 1-800-833-9200, select option 2*
Technical support Email: support@tektronix.com
1-800-833-9200, select option 3*
1-503-627-2400
6:00 a.m. – 5:00 p.m. Pacific time
* This phone number is toll free in North America. After office hours, please leave a
voice mail message.
Outside North America, contact a Tektronix sales office or distributor; see the
Tektronix web site for a list of offices.
TMS 545A PPC7400ITR Microprocessor Support
ix
Preface
x
TMS 545A PPC7400ITR Microprocessor Support
Getting Started
Getting Started
This chapter contains information on the TMS 545A PPC7400ITR microprocessor support and information on connecting your logic analyzer to your system
under test.
Support Package Description
The TMS 545A PPC7400ITR microprocessor support package disassembled data
from systems based on the PPC7400ITR microprocessor.
The TMS 545A Support is comprised of the following:
H TMS 545A PPC7400ITR Support SW Disk
H TMS 545A PPC7400ITR microprocessor Support Instruction Manual
Refer to information on basic operations to determine how many modules and
probes your logic analyzer needs to meet the minimum channel requirements for
the TMS 545A PPC7400ITR microprocessor support.
To use this support efficiently, you need the items listed in the information on
basic operations as well as:
H MPC 750 RISC Microprocessor User’s Manual, 1997
H PowerPC Max Microprocessor Implementation Definition Book 1V Version
2.0, Motorola, 1998.
Options
The following options are available when ordering the TMS 545A Support:
H Option 21 (adds 4 P6434 Probes)
Logic Analyzer Software Compatibility
The label on the PPC7400ITR microprocessor support floppy disk states with
which version of logic analyzer software the support is compatible.
Logic Analyzer Configuration
For use with a logic analyzer, the TMS 545A support requires a minimum of one
136-channel module.
TMS 545A PPC7400ITR Microprocessor Support
1–1
Getting Started
Requirements and Restrictions
Review electrical specifications in the Specifications chapter in this manual as
they pertain to your system under test, as well as the following descriptions of
other PPC7400ITR support requirements and restrictions.
Hardware Reset. If a hardware reset occurs in your PPC7400ITR microprocessor
system during an acquisition, the disassembler might acquire an invalid sample.
System Clock Rate. The PPC7400ITR microprocessor support can acquire data
from the PPC7400ITR microprocessor operating at speeds of up to 133 MHz.
The PPC7400ITR microprocessor support has been tested to 100 MHz.
Channel Groups. The channel groups required for clocking and disassembly are
the Address Group, Hi_Data Group, Lo_Data Group, Control Group, Transfer
Group, and Tsiz Group.
Timing Display Format
The channel group not required for clocking and disassembly is the Misc Group.
Disabling the Instruction Cache. To disassemble acquired data, you must disable
the internal instruction cache. Disabling the cache makes all instruction
prefetches visible on the bus so that they can be acquired and disassembled. To
see acquired data with the cache enabled, see Instruction Trace Reconstruction
on page 2–23.
Disabling the Data Cache. To display acquired data, you must disable the data
cache. Disabling the data cache makes visible on the bus all of the loads and
stores to memory, including data reads and writes, so that the software can
acquire and display them.
A Timing Display Format file is provided. It sets up the display to show the
following waveforms:
CLK, BR_, Address, TS_, ABB_, BG_, AACK_, ARTRY_, TBST_,
Hi_Data, Lo_Data, TA_, DBB_, DBG_, TEA_, DTI[1]/DRTRY_, Control,
Tsiz, Transfer.
1–2
NOTE. Address, Hi_Data, Lo_Data, Control, Tsiz, and Transfer are displayed in
bus form.
The method of selecting or restoring the Timing Display Format file is different
for each platform and will be ignored in this document.
TMS 545A PPC7400ITR Microprocessor Support
Functionality Not Supported
Interrupt Signals. Not all of the interrupt signals are acquired by the TMS 545A
support software. The interrupts that are acquired can be identified by the
TMS 545A support software by looking at the address that is displayed for the
interrupt service.
Microprocessor. The TMS 545A support acquires all the address and data cycles
on the bus and does not differentiate between potential master and alternate
master.
L2 cache. L2 cache transactions are not supported for the PPC7400ITR support.
Extra Acquisition Channels. Extra Acquisition Channels are not available on the
logic analyzer.
Getting Started
Alternate Bus Master. Alternate bus master transactions are not processed in the
disassembly.
Address Pipelining. If address pipelining continues for several sequences (those
longer than approximately 1 K), performance might be degraded when you scroll
data by entering a sequence number in the cursor field.
If address pipelining continues for additional sequences of 1 K or greater,
erroneous address and data association might occur. You can use the Mark Cycles
function to correct the interpretation of erroneous address and data association.
See Marking Cycles on page 2–16 for information on how to correct improper
address and data association.
TMS 545A PPC7400ITR Microprocessor Support
1–3
Getting Started
Channel Assignments
Channel assignments shown in Table 1–1 through Table 1–8 use the following
conventions:
H All signals are required by the support unless indicated otherwise.
H Channels are shown starting with the most significant bit (MSB) descending
to the least significant bit (LSB).
H Channel group assignments are for all modules unless otherwise noted.
H An underscore (_) following a signal name indicates an active low signal.
Table 1–1 shows the probe section and channel assignments for the Tektronix
logic analyzer (TLA) Address group and the PPC7400ITR microprocessor signal
to which each channel connects. By default, this channel group is displayed in
hexadecimal.
T able 1–1: TLA Address group channel assignments
Bit order Section:channel PPC7400ITR signal name
31 A3:7 A0
30 A3:6 A1
29 A3:5 A2
28 A3:4 A3
27 A3:3 A4
26 A3:2 A5
25 A3:1 A6
24 A3:0 A7
23 A2:7 A8
22 A2:6 A9
21 A2:5 A10
20 A2:4 A11
19 A2:3 A12
18 A2:2 A13
17 A2:1 A14
16 A2:0 A15
15 A1:7 A16
14 A1:6 A17
13 A1:5 A18
12 A1:4 A19
11 A1:3 A20
1–4
TMS 545A PPC7400ITR Microprocessor Support
T able 1–1: TLA Address group channel assignments (cont.)
Bit order PPC7400ITR signal nameSection:channel
10 A1:2 A21
9 A1:1 A22
8 A1:0 A23
7 A0:7 A24
6 A0:6 A25
5 A0:5 A26
4 A0:4 A27
3 A0:3 A28
2 A0:2 A29
1 A0:1 A30
0 A0:0 A31
Getting Started
Table 1–2 shows the probe section and channel assignments for the TLA Hi_Data
group and the PPC7400ITR microprocessor signal to which each channel
connects. By default, this channel group is displayed in hexadecimal.
T able 1–2: TLA Hi_Data group channel assignments
Bit order Section:channel PPC7400ITR signal name
31 E3:7 D0
30 E3:6 D1
29 E3:5 D2
28 E3:4 D3
27 E3:3 D4
26 E3:2 D5
25 E3:1 D6
24 E3:0 D7
23 E2:7 D8
22 E2:6 D9
21 E2:5 D10
20 E2:4 D11
19 E2:3 D12
18 E2:2 D13
17 E2:1 D14
16 E2:0 D15
15 E1:7 D16
14 E1:6 D17
TMS 545A PPC7400ITR Microprocessor Support
1–5
Getting Started
T able 1–2: TLA Hi_Data group channel assignments (cont.)
Bit order PPC7400ITR signal nameSection:channel
13 E1:5 D18
12 E1:4 D19
11 E1:3 D20
10 E1:2 D21
9 E1:1 D22
8 E1:0 D23
7 E0:7 D24
6 E0:6 D25
5 E0:5 D26
4 E0:4 D27
3 E0:3 D28
2 E0:2 D29
1 E0:1 D30
0 E0:0 D31
Table 1–3 shows the probe section and channel assignments for the TLA
Lo_Data group and the PPC7400ITR microprocessor signal to which each
channel connects. By default, this channel group is displayed in hexadecimal.
T able 1–3: TLA Lo_Data group channel assignments
Bit order Section:channel PPC7400ITR signal name
31 D3:7 D32
30 D3:6 D33
29 D3:5 D34
28 D3:4 D35
27 D3:3 D36
26 D3:2 D37
25 D3:1 D38
24 D3:0 D39
23 D2:7 D40
22 D2:6 D41
21 D2:5 D42
20 D2:4 D43
19 D2:3 D44
18 D2:2 D45
17 D2:1 D46
1–6
TMS 545A PPC7400ITR Microprocessor Support
T able 1–3: TLA Lo_Data group channel assignments (cont.)
Bit order PPC7400ITR signal nameSection:channel
16 D2:0 D47
15 D1:7 D48
14 D1:6 D49
13 D1:5 D50
12 D1:4 D51
11 D1:3 D52
10 D1:2 D53
9 D1:1 D54
8 D1:0 D55
7 D0:7 D56
6 D0:6 D57
5 D0:5 D58
4 D0:4 D59
3 D0:3 D60
2 D0:2 D61
1 D0:1 D62
0 D0:0 D63
Getting Started
Table 1–4 shows the probe section and channel assignments for the TLA Control
group and the PPC7400ITR microprocessor signal to which each channel
connects. By default, this channel group is displayed as symbols.
T able 1–4: TLA Control group channel assignments
Bit order Section:channel PPC7400ITR signal name
10 C2:2 TS_
9 C3:4 BG_
8 C1:4 DBG_
7 C2:0 ARTRY_
5 C2:1 AACK_
4 Clock:1 TA_
3 Clock:0 TEA_
2 C2:4 ABB_
1 C0:4 DTI[O]
0 Clock:2 DBB_
TMS 545A PPC7400ITR Microprocessor Support
1–7
Getting Started
Table 1–5 shows the probe section and channel assignments for the TLA Transfer
group and the PPC7400ITR microprocessor signal to which each channel
connects. By default, this channel group is displayed as symbols.
T able 1–5: TLA Transfer group channel assignments
Bit order Section:channel PPC7400ITR signal name
5 C3:1 TT0
4 C0:7 TT1
3 C3:6 TT2
2 C3:7 TT3
1 C1:2 TT4
0 C1:7 WT_
Table 1–6 shows the probe section and channel assignments for the TLA Tsiz
group and the PPC7400ITR microprocessor signal to which each channel
connects. By default, this channel group is displayed in symbols.
T able 1–6: TLA Tsiz group channel assignments
Bit order Section:channel PPC7400ITR signal name
3 C3:3 TSIZ2
2 C2:7 TSIZ1
1 C2:6 TSIZ0
0 C3:2 TBST_
Table 1–7 shows the probe section and channel assignments for the TLA Misc
group and the PPC7400ITR microprocessor signal to which each channel
connects. By default, this channel group is not visible.
T able 1–7: TLA Misc group channel assignments
Bit order Section:channel PPC7400ITR signal name
2 Clock:3 CLK
1 C1:5 BR_
0 C0:5 GBL_
1–8
TMS 545A PPC7400ITR Microprocessor Support
Getting Started
Logic Analyzer. Extra channels that are not connected in the PPC7400ITR
support:
C1:3
C1:5
C0:5
NonIntrusive Acquisition. Acquiring microprocessor bus cycles will be nonintrusive to the system under test. That is, the PPC7400ITR support will not intercept,
modify, or present back signals to the system under test.
Acquisition Setup. The PPC7400ITR support will affect the logic analyzer setup
menus (and submenus) by modifying existing fields and adding micro-specific
fields.
On the logic analyzer, the PPC7400ITR support will add the selection
“PPC7400ITR” to the Load Support Package dialog box, under the File pulldown
menu. Once that “PPC7400ITR support” has been loaded, the “Custom” clocking
mode selection in the logic analyzer module Setup menu is also enabled.
Table 1–8 shows the probe section and channel assignments for the clock probes
(not part of any group), and the PPC7400ITR signal to which each channel
connects.
T able 1–8: Clock channel assignments
TLA
section & probe
CLK:3 CLK Clock
CLK:2 DBB_ Used as qualifier
CLK:1 TA_ Used as qualifier
CLK:0 TEA_ Used as qualifier
C2:0 ARTRY_ Used as qualifier
C2:1 AACK_ Used as qualifier
C2:2 TS_ Used as qualifier
C2:3 DTI[1]/DRTRY_* Used as qualifier
* This signal occurs as DTI[1] in 7400 and as DRTRY_ in 750
PPC7400ITR signal
name
Description
TMS 545A PPC7400ITR Microprocessor Support
1–9
Getting Started
CPU To Mictor Connections
To probe the microprocessor you will need to make connections between the
CPU and the Mictor pins of the P6434 Mass Termination Probe. Refer to the
P6434 Mass Termination Probe manual, Tektronix part number 070-9793-xx, for
more information on mechanical specifications. Table 1–9 through Table 1–11
show the CPU pin to Mictor pin connections.
Tektronix uses a counter clockwise pin assignment. Pin 1 is located at the top
left, and pin 2 is located directly below it. Pin 20 is located on the bottom right,
and pin 21 is located directly above it.
AMP uses an odd side-even side pin assignment. Pin 1 is located at the top left,
and pin-3 is located directly below it. Pin 2 is located on the top right, and pin 4
is located directly below it.
NOTE. When designing Mictor connectors into your SUT, always follow the
Tektronix pin assignment.
Tektronix Pinout AMP Pinout
Pin 1
Pin 19
Pin 38
Pin 20
Pin 1
Pin 37
Pin 2
Pin 38
Figure 1–1: Pin assignments for a Mictor connector (component side)
Please pay close attention to the caution below.
CAUTION. To protect the CPU and the inputs of the module, it is recommended
that a 180 W resistor is connected in series between each ball pad of the CPU
and each pin of the Mictor connector. The resistor must be no farther away from
the ball pad of the CPU than 1/2-inch.
1–10
TMS 545A PPC7400ITR Microprocessor Support
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