There are no current European directives that
apply to this product. This product provides
cable and test lead connections to a test object of
electronic measuring and test equipment.
Warning
The servicing instructions are for use by
qualified personnel only. To avoid personal
injury, do not perform any servicing unless you
are qualified to do so. Refer to all safety
summaries prior to performing service.
Copyright E T ektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and are
protected by United States copyright laws and international treaty provisions.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the
Rights in T echnical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the
Commercial Computer Software – Restricted Rights clause at F AR 52.227-19, as applicable.
T ektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material. Specifications and price change privileges reserved.
Printed in the U.S.A.
T ektronix, Inc., P.O. Box 1000, Wilsonville, OR 97070–1000
TEKTRONIX and TEK are registered trademarks of T ektronix, Inc.
SOFTWARE WARRANTY
T ektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, T ektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
T ektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If T ektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
HARDWARE WARRANTY
T ektronix warrants that the products that it manufactures and sells will be free from defects in materials and
workmanship for a period of one (1) year from the date of shipment. If a product proves defective during this
warranty period, T ektronix, at its option, either will repair the defective product without charge for parts and labor,
or will provide a replacement in exchange for the defective product.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period and make suitable arrangements for the performance of service. Customer shall be
responsible for packaging and shipping the defective product to the service center designated by T ektronix, with
shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a
location within the country in which the T ektronix service center is located. Customer shall be responsible for
paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. T ektronix shall not be obligated to furnish service under this warranty a) to repair damage
resulting from attempts by personnel other than T ektronix representatives to install, repair or service the product;
b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any
damage or malfunction caused by the use of non-T ektronix supplies; or d) to service a product that has been
modified or integrated with other products when the effect of such modification or integration increases the time
or difficulty of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE AND
EXCLUSIVE REMEDY PROVIDED TO THE CUST OMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT , SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR
THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
TMS 261 68360 Microprocessor Support Instruction Manual
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
To Avoid Fire or
Personal Injury
Use Proper Power Cord. Use only the power cord specified for this product and
certified for the country of use.
Connect and Disconnect Properly . Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and marking on the product. Consult the product manual for further ratings
information before making connections to the product.
Do not apply a potential to any terminal, including the common terminal, that
exceeds the maximum rating of that terminal.
Use Proper AC Adapter. Use only the AC adapter specified for this product.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Use Proper Fuse. Use only the fuse type and rating specified for this product.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry .
Provide Proper Ventilation. Refer to the manual’s installation instructions for
details on installing the product so it has proper ventilation.
Symbols and Terms
TMS 261 68360 Microprocessor Support Instruction Manual
T erms in this Manual. These terms may appear in this manual:
v
General Safety Summary
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
T erms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
Symbols on the Product. The following symbols may appear on the product:
WARNING
High Voltage
Protective Ground
(Earth) T erminal
CAUTION
Refer to Manual
Double
Insulated
vi
TMS 261 68360 Microprocessor Support Instruction Manual
Service Safety Summary
Only qualified personnel should perform service procedures. Read this Service
Safety Summary and the General Safety Summary before performing any service
procedures.
Do Not Service Alone. Do not perform internal service or adjustments of this
product unless another person capable of rendering first aid and resuscitation is
present.
Disconnect Power. To avoid electric shock, disconnect the main power by means
of the power cord or, if provided, the power switch.
Use Care When Servicing With Power On. Dangerous voltages or currents may
exist in this product. Disconnect power, remove battery (if applicable), and
disconnect test leads before removing protective panels, soldering, or replacing
components.
To avoid electric shock, do not touch exposed connections.
TMS 261 68360 Microprocessor Support Instruction Manual
vii
Service Safety Summary
viii
TMS 261 68360 Microprocessor Support Instruction Manual
Preface: Microprocessor Support Documentation
This instruction manual contains specific information about the TMS 261 68360
microprocessor support package and is part of a set of information on how to
operate this product on compatible Tektronix logic analyzers.
If you are familiar with operating microprocessor support packages on the logic
analyzer for which the TMS 261 68360 support was purchased, you will
probably only need this instruction manual to set up and run the support.
If you are not familiar with operating microprocessor support packages, you will
need to supplement this instruction manual with information on basic operations
to set up and run the support.
Information on basic operations of microprocessor support packages is included
with each product. Each logic analyzer has basic information that describes how
to perform tasks common to supports on that platform. This information can be
in the form of online help, an installation manual, or a user manual.
This manual provides detailed information on the following topics:
HConnecting the logic analyzer to the system under test
Manual Conventions
HSetting up the logic analyzer to acquire data from the system under test
HAcquiring and viewing disassembled data
HUsing the probe adapter
This manual uses the following conventions:
HThe term disassembler refers to the software that disassembles bus cycles
into instruction mnemonics and cycle types.
HThe phrase “information on basic operations” refers to online help, an
installation manual, or a basic operations of microprocessor supports user
manual.
HIn the information on basic operations, the term XXX or P54C used in field
selections and file names must be replaced with 68360. This is the name of
the microprocessor in field selections and file names you must use to operate
the 68360 support.
HThe term system under test (SUT) refers to the microprocessor-based system
from which data will be acquired.
TMS 261 68360 Microprocessor Support Instruction Manual
ix
Preface: Microprocessor Support Documentation
HThe term logic analyzer refers to the Tektronix logic analyzer for which this
product was purchased.
HThe term module refers to a 102/136-channel or a 96-channel module.
H68360 refers to all supported variations of the 68360 microprocessor unless
otherwise noted.
HAn asterisk (*) following a signal name indicates an active low signal.
Logic Analyzer Documentation
A description of other documentation available for each type of Tektronix logic
analyzer is located in the corresponding module user manual. The manual set
provides the information necessary to install, operate, maintain, and service the
logic analyzer and associated products.
Contacting Tektronix
Product
Support
Service
Support
For other
information
To write usTektronix, Inc.
For application-oriented questions about a Tektronix measurement product, call toll free in North America:
1-800-TEK-WIDE (1-800-835-9433 ext. 2400)
6:00 a.m. – 5:00 p.m. Pacific time
Or, contact us by e-mail:
tm_app_supp@tek.com
For product support outside of North America, contact your
local Tektronix distributor or sales office.
Contact your local Tektronix distributor or sales office. Or, visit
our web site for a listing of worldwide service locations.
http://www.tek.com
In North America:
1-800-TEK-WIDE (1-800-835-9433)
An operator will direct your call.
P.O. Box 1000
Wilsonville, OR 97070-1000
x
TMS 261 68360 Microprocessor Support Instruction Manual
Getting Started
Getting Started
Support Description
This chapter provides information on the following topics and tasks:
HA description of the TMS 261 microprocessor support package
HLogic analyzer software compatibility
HYour system under test requirements
HSupport restrictions
HHow to configure the probe adapter
HHow to connect to the system under test (SUT)
HHow to apply power to and remove power from the probe adapter
The TMS 261 microprocessor support package disassembles data from systems
that are based on the Motorola 68360 microprocessor. The support runs on a
compatible Tektronix logic analyzer equipped with a 102/136-channel module or
a 96-channel module.
Refer to information on basic operations to determine how many modules and
probes your logic analyzer needs to meet the minimum channel requirements for
the TMS 261 microprocessor support.
The TMS 261 supports the Motorola 68360 microprocessor in a 241-pin PGA
package. Support for the QFP package is also available by purchasing a
PGA-to-QFP converter clip from ITT Pomona (part number 5968) and using it
with this probe adapter.
The product is intended to be used with the low-profile probe adapter to connect
to the SUT. Descriptions of the conventional probe adapter are also included if
you purchased an earlier version of the product.
A complete list of standard and optional accessories is provided at the end of the
parts list in the Replaceable Mechanical Parts chapter.
To use this support efficiently, you need to have the items listed in the information on basic operations as well as the MC68360 Quad Integrated Communica-tions Controller User’s Manual, Motorola, 1993.
Information on basic operations also contains a general description of supports.
TMS 261 68360 Microprocessor Support Instruction Manual
1–1
Getting Started
Logic Analyzer Software Compatibility
The label on the microprocessor support floppy disk states which version of logic
analyzer software the support is compatible with.
Logic Analyzer Configuration
To use the 68360 support, the Tektronix logic analyzer must be equipped with
either a 102/136-channel module, or a 96-channel module at a minimum. The
module must be equipped with enough probes to acquire channel and clock data
from signals in your 68360-based system.
Refer to information on basic operations to determine how many modules and
probes the logic analyzer needs to meet the channel requirements.
Requirements and Restrictions
You should review the general requirements and restrictions of microprocessor
supports in the information on basic operations as they pertain to your SUT.
You should also review electrical, environmental, and mechanical specifications
in the Specifications chapter in this manual as they pertain to your system under
test, as well as the following descriptions of other 68360 support requirements
and restrictions.
System Clock Rate. The TMS 261 support can acquire data from the 68360
microprocessor at speeds of up to 33 MHz
DSACK Signals. The 68360 microprocessor allows 8-, 16-, and 32-bit data
transfers. The DSACK group of signals, which indicate which bytes on the bus
are valid, are not always asserted. When the DSACK signals are not asserted, the
software disassembles data using the selection in the Int DSACKs Bus Width
field. Refer to the Operating Basics section for more information on this field.
Valid Address Lines. The address bus is 28- or 32-bits wide. You can select either
bus width in the Disassembly Format Definition overlay.
1
; it has been tested to 25 MHz.
1–2
1
Specification at time of printing. Contact your Tektronix sales representative for
current information on the fastest devices supported.
TMS 261 68360 Microprocessor Support Instruction Manual
Configuring the Probe Adapter
There are nine jumpers and one switch bank on the probe adapter. The jumpers
and switch descriptions apply to both the low-profile and conventional probe
adapters; the circuit numbers may differ, but the functionality is identical unless
otherwise indicated.
If the SUT uses dynamic memory controlled by the 68360 microprocessor, you
should place the Memory Size jumper in the position that corresponds to the
memory size used. The jumper positions are: 128, 256, or 512 Kbytes, or 1, 2, 4,
8, 16, or 32 Mbytes.
If the SUT does not use dynamic memory, you can place the Memory Size
jumper in any position.
You can also place the Memory Size jumper in any position if the RAS/Trans
jumper is in the Trans position.
Figure 1–1 shows the location of the Memory Size jumper on the probe adapter.
Memory size jumper
Figure 1–1: Memory Size jumper location
TMS 261 68360 Microprocessor Support Instruction Manual
1–3
Getting Started
RAS/Trans Jumper
If your SUT does not use dynamic memory, or if you want to acquire data using
Internal clocking (asynchronous), you should place the RAS/Trans Jumper in the
Trans (transparent) position. This is the default setting.
If your SUT uses dynamic memory, you should place the RAS/Trans jumper in
the RAS (row address strobe) position. This causes the probe adapter to rearrange
the upper and lower bits of the Address group for disassembly during DRAM
accesses.
If you do not know the size of the dynamic memory, or which RAS lines are
used, then place the jumper in the Trans position.
NOTE. The RAS position meets Motorola’s requirement that the complete address
not be on the bus at the end of each RAS/CAS cycle. Observations on a limited
set of microprocessors show that the complete address is on the bus at the end of
each RAS/CAS cycle. If you find that the microprocessor does not place the
complete address on the bus at the end of a RAS/CAS cycle (CAS part), then
place the jumper in the RAS position.
Figure 1–2 shows the location of the RAS/Trans jumper.
If you want to acquire data using standard 68360 signals (such as AS* and DS*),
you should place the 68360/68040 Clocking jumper in the 68360 position. This is
the default setting.
If you want to acquire data using 68040-type signals (such as TS* and TA*), you
should place the jumper in the 68040 position.
Figure 1–3 shows the location of this jumper.
68360/68040
clocking jumper
Figure 1–3: 68360/68040 clocking jumper location
TMS 261 68360 Microprocessor Support Instruction Manual
1–5
Getting Started
CLK01/EXTAL Clock
Jumper
Place the clock jumper in the CLK01 position when CLK01 is enabled in the
CLKOCR register. Place the jumper in the EXTAL position when the EXTAL
signal is driven with the system frequency.
Figure 1–4 shows the location of the CLK01/EXTAL jumper. This jumper is only
available on the low-profile probe adapter.
CLK01/EXTAL
clock jumper
1–6
Figure 1–4: CLK01/EXT AL clock jumper location
TMS 261 68360 Microprocessor Support Instruction Manual
Getting Started
A31-A28/WE3-WE0 Signal
Jumpers
The 68360 microprocessor can be configured to use either the A31-A28 address
signals or the WE3-WE0 signals. The probe adapter has four jumpers that you
must set to match the configuration of your SUT.
If the SUT is configured to use A31-A28, you should place the jumpers in the A
position. With the jumpers in the A position, the WE signals sent to the logic
analyzer are held high.
If the SUT is configured to use WE3-WE0, you should place the jumpers in the
WE position. With the jumpers in the WE position, the A31-A28 signals sent to
the logic analyzer are held low.
Figure 1–5 shows the location of the A31-A28/WE3-WE0 jumpers.
Figure 1–5: A31-A28/WE3-WE0 signal jumpers locations
WE0*/A28
WE1*/A29
WE3*/A31
WE2*/A30
TMS 261 68360 Microprocessor Support Instruction Manual
1–7
Getting Started
e
Low-p
ile probe adapte
Power Source Jumper
rof
rConventional probe adapter
If your SUT has a +3 V 68360 microprocessor or you do not want your SUT to
provide power to the 68360 probe adapter, you can use an alternate power source.
If you use an alternate power source, you should set the Power Source jumper to
the Ext Pwr position. This is the default setting.
If you do not use an alternate power source, you should set this jumper in the
SUT position. In this position, the SUT provides power to the 68360 probe
adapter.
For more information on using an alternate power source, refer to Applying andRemoving Power in this chapter.
Figure 1–6 shows the location of the Power Source jumper.
Power
Sourc
jumper
Power
Source
jumper
Figure 1–6: Power Source jumper location
1–8
TMS 261 68360 Microprocessor Support Instruction Manual
Getting Started
CS/RAS Signal Selection
Switch Block
The CS/RAS Signal Selection switch block has a switch for each RAS signal that
the SUT might use. For each RAS signal used, you should close the corresponding switch on the RAS Signal Selection switch block. If the SUT does not use
dynamic memory, you should open all the switches.
If you do not know which RAS lines are used by the SUT, you should open all
the switches and place the RAS/Trans jumper in the Trans position.
Table 1–1 shows the switch numbers printed on the switch block and the CS or
RAS signal that connects to each switch.
T able 1–1: Switch numbers and CS/RAS signals
Switch numberSignal name
1CS0*/RAS0*
2CS1*/RAS1*
3CS2*/RAS2*
4CS3*/RAS3*
5CS4*/RAS4*
6CS5*/RAS5*
7CS6*/RAS6*
8CS7*/RAS7*
Connecting to a System Under Test
Before you connect to the SUT, you must connect the probes to the module.
Your SUT must also have a minimum amount of clear space surrounding the
microprocessor to accommodate the probe adapter. Refer to the Specifications
chapter in this manual for the required clearances.
The channel and clock probes shown in this chapter are for a 102/136-channel
module. The probes will look different if you are using a 96-channel module.
The general requirements and restrictions of microprocessor supports in the
information on basic operations shows the vertical dimensions of a channel or
clock probe connected to square pins on a circuit board.
Low-Profile Probe Adapter
with a High-Density Probe
If a probe adapter has one or two high-density cables (probe adapter does not
have pins to which the channel and clock probes connect), the probe adapter
requires a high-density probe to make connections between the logic analyzer
and a SUT.
TMS 261 68360 Microprocessor Support Instruction Manual
1–9
Getting Started
To connect the logic analyzer to a SUT using the low-profile probe adapter and a
high-density probe, follow these steps:
1. Turn off power to your SUT. It is not necessary to turn off power to the logic
analyzer.
CAUTION. Static discharge can damage the microprocessor, the low-profile probe
adapter, the probes, or the module. To prevent static damage, handle all of the
above only in a static-free environment.
Always wear a grounding wrist strap or similar device while handling the
microprocessor and low-profile probe adapter.
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. Then, touch the black foam on the
underside of the probe adapter to discharge stored static electricity from the
probe adapter.
3. Remove the microprocessor from the SUT.
4. Line up the pin A1 indicator on the probe adapter board with the pin A1
indicator on the microprocessor.
CAUTION. Failure to correctly place the microprocessor into the probe adapter
might permanently damage the microprocessor once power is applied.
5. Place the microprocessor into the probe adapter as shown in Figure 1–7.
1–10
TMS 261 68360 Microprocessor Support Instruction Manual
Microprocessor
Getting Started
Pin A1
Figure 1–7: Placing a microprocessor into a PGA probe adapter
6. Remove the black foam from the underside of the probe adapter.
7. Line up the pin A1 indicator on the probe adapter board with the pin A1
indicator on the SUT.
8. Place the probe adapter onto the SUT as shown in Figure 1–8.
NOTE. You might need to stack one or more replacement sockets between the SUT
and the probe adapter to provide sufficient vertical clearance from adjacent
components. However, keep in mind this might increase loading, which can
reduce the electrical performance of the probe adapter.
TMS 261 68360 Microprocessor Support Instruction Manual
1–11
Getting Started
SUT socket
Pin A1
Figure 1–8: Placing a PGA probe adapter onto the SUT
9. Connect the channel and clock probes to the high-density probe as shown in
Figure 1–9. Match the channel groups and numbers on the probe labels to the
corresponding pins on the high-density probe. Match the ground pins on the
probes to the corresponding pins on the probe adapter.
1–12
TMS 261 68360 Microprocessor Support Instruction Manual
Clock probe
Getting Started
Hold the channel probes by the podlet
holder when connecting them to the
high-density probe. Do not hold them
by the cables or necks of the podlets.
Channel probe
and podlet holder
Channels connect to
the logic analyzer
High-density probe
Figure 1–9: Connecting channel and clock probes to a high-density probe
10. Align pin 1 on the LO cable connector, the end on the narrowest cable strip
of the cable, with pin 1 on the LO connector on the high-density probe.
Connect the cable to the connector as shown in Figure 1–10.
NOTE. The LO cable is 12 inches long; the HI cable is 13 inches long.
11. Align pin 1 on the HI cable connector, the end on the narrowest cable strip of
the cable, with pin 1 on the HI connector on the high-density probe. Connect
the cable to the connector as shown in Figure 1–10.
TMS 261 68360 Microprocessor Support Instruction Manual
1–13
Getting Started
HI cable
Pin 1 side
LO cable
High-density probe
Figure 1–10: Connecting LO and HI cables to a high-density probe
Conventional Probe
Adapter
To connect the logic analyzer to a SUT using a conventional probe adapter,
follow these steps:
1. Turn off power to your SUT. It is not necessary to turn off power to the logic
analyzer.
CAUTION. Static discharge can damage the microprocessor, the probe adapter,
the probes, or the module. To prevent static damage, handle all of the above only
in a static-free environment.
Always wear a grounding wrist strap or similar device while handling the
microprocessor and probe adapter.
1–14
TMS 261 68360 Microprocessor Support Instruction Manual
Getting Started
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. Then, touch any of the ground pins of the
probe adapter to discharge stored static electricity from the probe adapter.
3. Place the probe adapter onto the antistatic shipping foam to support the probe
as shown in Figure 1–11. This prevents the circuit board from flexing and the
socket pins from bending.
4. Remove the microprocessor from your SUT.
5. Line up the pin A1 indicator on the probe adapter board with the pin A1
indicator on the microprocessor.
CAUTION. Failure to correctly place the microprocessor into the probe adapter
might permanently damage the microprocessor once power is applied.
6. Place the microprocessor into the probe adapter as shown in Figure 1–11.
Microprocessor
Probe adapter
Foam
Figure 1–11: Placing a microprocessor into a PGA probe adapter
7. Connect the channel and clock probes to the probe adapter as shown in
Figure 1–12. Match the channel groups and numbers on the probe labels to
the corresponding pins on the probe adapter. Match the ground pins on the
probes to the corresponding pins on the probe adapter.
TMS 261 68360 Microprocessor Support Instruction Manual
1–15
Getting Started
Channel probe
and podlet holder
Hold the channel probes by the podlet
holder when connecting them to the
probe adapter. Do not hold them by
the cables or necks of the podlets.
Foam
Figure 1–12: Connecting probes to a PGA probe adapter
Clock probe
Probe adapter
8. Line up the pin A1 indicator on the probe adapter board with the pin A1
indicator on your SUT.
9. Place the probe adapter onto the SUT as shown in Figure 1–13.
NOTE. You might need to stack one or more replacement sockets between the SUT
and the probe adapter to provide sufficient vertical clearance from adjacent
components. However, keep in mind that this might increase loading, which can
reduce the electrical performance of your probe adapter.
1–16
TMS 261 68360 Microprocessor Support Instruction Manual
SUT socket
Getting Started
Figure 1–13: Placing a PGA probe adapter onto the SUT
Probe Names Printed on
the Conventional Probe
Adapter or High-Density
Probe
The high-density probe, used with the low-profile probe adapter, has LO_ and
HI_ designators. Table 1–2 shows the clock and channel probes you need to connect
to the pins with the LO_ or HI_ designators on the conventional probe adapter or the
high-density probe.
T able 1–2: Probe connections printed on the conventional probe adapter or high-density probe
TMS 261 68360 Microprocessor Support Instruction Manual
1–17
Getting Started
Without a Probe Adapter
You can use channel probes, clock probes, and leadsets with a commercial test
clip (or adapter) to make connections between the logic analyzer and your SUT.
To connect the probes to 68360 signals using a test clip, follow these steps:
1. Turn off power to your SUT. It is not necessary to turn off power to the logic
analyzer.
CAUTION. Static discharge can damage the microprocessor, the probes, or the
module. To prevent static damage, handle all of the above only in a static-free
environment.
Always wear a grounding wrist strap or similar device while handling the
microprocessor.
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. If you are using a test clip, touch any of the
ground pins on the clip to discharge stored static electricity from it.
3. Use Table 1–3 to connect the channel probes to 68360 signal pins on the test
clip or in the SUT.
Use leadsets to connect at least one ground lead from each channel probe and
the ground lead from each clock probe to ground pins on your test clip (or
adapter).
T able 1–3: 68360 signal connections for channel probes
Section:channel 68360 signalSection:channel 68360 signal
TMS 261 68360 Microprocessor Support Instruction Manual
Getting Started
T able 1–3: 68360 signal connections for channel probes (cont.)
Section:channel68360 signalSection:channel68360 signal
A2:0A16D2:0D16
A1:7A15D1:7D15
A1:6A14D1:6D14
A1:5A13D1:5D13
A1:4A12D1:4D12
A1:3A11D1:3D1 1
A1:2A10D1:2D10
A1:1A9D1:1D9
A1:0A8D1:0D8
A0:7A7D0:7D7
A0:6A6D0:6D6
A0:5A5D0:5D5
A0:4A4D0:4D4
A0:3A3D0:3D3
A0:2A2D0:2D2
A0:1A1D0:1D1
A0:0A0D0:0D0
C3:7FC0C2:7RMC*
C3:6FC2C2:6BG*
C3:5
C3:4SIZ1C2:4
C3:3
C3:2FC1C2:2TA*
C3:1
C3:0SIZ0C2:0Not connected
C1:7FREEZEC0:7HAL T*
C1:616MB*C0:6CONFIG1
C1:5Not connectedC0:5DSACK* TA*
C1:4
C1:3AS*C0:3BERR*
C1:2CONFIG0C0:2CONFIG2
C1:1
C1:0IFETCH*C0:0R/W*
[Signal not required for disassembly.
WE3[
WE1[
WE2[
EXT AL[
AVEC IACK5[
C2:5BGACK*
WE0[
C2:3
C2:1DS*
C0:4FC3
C0:1DSACK* TBI
RESETH[
TMS 261 68360 Microprocessor Support Instruction Manual
1–19
Getting Started
Table 1–4 shows the clock probes and the 68360 signal to which they must
connect for disassembly to be correct.
T able 1–4: 68360 signal connections for clock probes
Section:channel 68360 signal
CK:3EXTAL or CLK01
CK:2Not connected
CK:1Not connected
CK:0AS* (held high in 68040 mode)
4. Align pin 1 or A1 of your test clip with the corresponding pin 1 or A1 of the
68360 microprocessor in your SUT and attach the clip.
Applying and Removing Power
If your microprocessor system cannot supply power to the 68360 probe adapter
or your system has a +3.3 V 68360 microprocessor (probe adapters need +5 V),
you must use an alternate power source. A +5 V power supply for the 68360
probe adapter is available. Refer to the Replaceable Mechanical Parts chapter for
information on how to order a power supply.
The alternate power supply provides +5 volts to the 68360 probe adapter. The
center connector of the power jack connects to Vcc.
To use the power supply, the Power Source jumper (Jxxx) on the probe adapter
must be set in the EXT position.
NOTE. Whenever the SUT is powered off, be sure to remove power from the probe
adapter.
To apply power to the 68360 probe adapter and SUT, follow these steps:
CAUTION. Failure to use the +5 V power supply provided by Tektronix might
permanently damage the probe adapter and 68360 microprocessor. Do not
mistake another power supply that looks similar for the +5 V power supply.
1–20
1. Connect the +5 V power supply to the jack on the probe adapter. Figure 1–14
shows the location of the jack on the adapter board.
TMS 261 68360 Microprocessor Support Instruction Manual
Getting Started
Low-p
ile probe adapte
CAUTION. Failure to apply power to the probe adapter before applying power to
your SUT might permanently damage the 68360 microprocessor and SUT.
2. Plug the power supply for the probe adapter into an electrical outlet.
3. Power on the SUT.
rof
rConventional probe adapter
Figure 1–14: Location of the power jack
Power Jack
Power Jack
To remove power from the SUT and 68360 probe adapter, follow these steps:
CAUTION. Failure to power down your SUT before removing the power from the
probe adapter might permanently damage the 68360 microprocessor and SUT.
1. Power off the SUT.
2. Unplug the power supply for the probe adapter from the electrical outlet.
TMS 261 68360 Microprocessor Support Instruction Manual
1–21
Getting Started
1–22
TMS 261 68360 Microprocessor Support Instruction Manual
Operating Basics
Setting Up the Support
This section provides information on how to set up the support. Information
covers the following topics:
HChannel group definitions
HClocking options
HSymbol table files
Remember that the information in this section is specific to the operations and
functions of the TMS 261 68360 support on any Tektronix logic analyzer for
which it can be purchased. Information on basic operations describes general
tasks and functions.
Before you acquire and disassemble data, you need to load the support and
specify setups for clocking and triggering as described in the information on
basic operations. The support provides default values for each of these setups,
but you can change them as needed.
Channel Group Definitions
Clocking Options
The software automatically defines channel groups for the support. The channel
groups for the 68360 support are Address, Data, Control, DataSize, and Misc. If
you want to know which signal is in which group, refer to the channel assignment tables beginning on page 3–10.
The TMS 261 support offers a microprocessor-specific clocking mode for the
68360 microprocessor. This clocking mode is the default selection whenever you
load the 68360 support.
A description of how cycles are sampled by the module using the support and
probe adapter is found in the Specifications chapter.
Disassembly will not be correct with the Internal or External clocking modes.
Information on basic operations describes how to use these clock selections for
general purpose analysis.
The clocking options for the TMS 261 application are: Probe Interface Type,
Alternate Bus Master Cycles, and Refresh Cycles.
TMS 261 68360 Microprocessor Support Instruction Manual
2–1
Setting Up the Support
Probe Interface Type
You can acquire data with or without using a probe adapter. If you do not use the
68360 probe adapter, keep the following in mind:
HThe disassembler supports 68360 signal clocking. It does not support 68040
signal clocking.
HDynamic memory accesses may be unpredictable when the upper address
bits are not stable at the end of a cycle.
HAlternate Bus Master cycles are always acquired and displayed.
HRefresh cycles are not acquired.
HThe CK2, CK1, C2:0, and C1:5 podlets must be tied low in your SUT.
HThe C2:2 podlet must be tied to Vcc in your SUT.
HThe Config2–Config0 and 16MB* signals must be connected to ground or
Vcc (in your SUT) to match their values when the 68360 microprocessor
reset is removed; these signals connect to C0:2, C0:6, C1:2, and C1:6
respectively.
HIf your SUT is configured to use the WE3-WE0 signals, you should connect
the C3:5, C3:1, C3:3, and C2:4 podlets to the WE3-WE0 signals and the
A31-A28 podlets (A3:7, A3:6, A3:5, and A3:4) to ground in your SUT.
Alternate Bus Master
Refresh Cycles
Symbols
Cycles
HIf your SUT is configured to use the A31-A28 signals, you should connect
the A3:7, A3:6, A3:5, and A3:4 podlets to the A31-A28 signals and the
WE3-WE0 podlets (C3:5, C3:1, C3:3, and C2:4) to Vcc in your SUT.
An alternate bus master cycle is defined as the 68360 microprocessor giving up
the bus to an alternate device (a DMA device or another microprocessor). These
types of cycles are acquired when you select Included. The default selection is
Excluded.
A refresh cycle is defined as CAS before RAS when using dynamic memory.
These types of cycles are acquired when you select Included. The default
selection is Excluded.
The TMS 261 support supplies one symbol table file. The 68360_Ctrl file
replaces specific Control channel group values with symbolic values when
Symbolic is the radix for the channel group.
Table 2–1 shows the name, bit pattern, and meaning for the symbols in the file
68360_Ctrl, the Control channel group symbol table.
2–2
TMS 261 68360 Microprocessor Support Instruction Manual
T able 2–1: Control group symbol table definitions
Control group value
RESETH*BG_B*RMC*IFETCH*PORT32
FREEZEBGACK_B*R_W*CONFIG2S68040
Symbol
RESET
B_GND_MD1
B_GND_MD2
HAL T
BUS_ERROR
AL T_RD–1
AL T_RD–2
AL T_RD–3
AL T_RD–4
AL T_RD–5
AL T_RD–6
AL T_WR–1
AL T_WR–2
AL T_WR–3
AL T_WR–4
AL T_WR–5
AL T_WR–6
68040_RD
68040_WR
READ
WRITE
PREFETCH
REFRESHBERR*AS*CONFIG1FC3
TA_D*HALT*DS_D*CONFIG0
0XXX XXXX XXXX XXXX XXX
X1XX XXXX XXXX XX11XXX
X1XXXXXXXXXXX10X XXX
1XXXXXX0XXXXXXXXXXX
1XXXXX0XXXXXXXXXXXX
1XXX1XXXX1XXXX10XXX
1XXX1XXXX1XXX00XXXX
1XXX0XXXX1XXX10XXXX
1XXX0XXXX1XXXX11XXX
1XXXX0XXX1XXX10XXXX
1XXXX0XXX1XXXX11XXX
1XXX1XXXX0XXXX10XXX
1XXX1XXXX0XXX00XXXX
1XXX0XXXX0XXX10XXXX
1XXX0XXXX0XXXX11XXX
1XXXX0XXX0XXX10XXXX
1XXXX0XXX0XXXX11XXX
1XX0XXXXX1XXXXXXX1X
1XX0XXXXX0XXXXXXX1X
1XXXXXXX110X1XXXX00
1XXXXXXX100XXXXXX00
1XXXXXXXX10X0XXXX00
Setting Up the Support
Meaning
Reset
Back ground mode; this is a
dual function pin
Back ground mode; this is a
dual function pin
Halt
Bus error
BR* signal out. Alt bus master
Symbols used only for triggering; they do not appear in the Disassembly or State displays.
*Symbols used only for triggering; they are not displayed.
REFRESHBERR*AS*CONFIG1FC3
TA_D*HALT*DS_D*CONFIG0
1XXXXXXX11101XXXX00
1XXXXXXX101XXXXXX00
1XXXXXXXX1100XXXX00
1XXXXXXX0110XXXXX00
1XXXXXXX001XXXXXX00
1XXXXX00XXXXXXXXX00
1XXXXXXX0100XXXXX00
1XXXXXXX000XXXXXX00
1XXXXXXX0XXXXXXXX00
1XXXXXXXXX0XXXXXXX1
1X1XXXXXXXXXXXXXXXX
Show cycle read
Show cycle write
Show cycle fetch
Show cycle RMW read
Show cycle RMW write
Bus Error Retry
Read part of RMW cycle
Write part of RMW cycle
Read modify Write cycle
DMA access
Refresh cycle
Information on basic operations describes how to use symbolic values for
triggering and for displaying other channel groups symbolically, such as the
Address channel group.
2–4
TMS 261 68360 Microprocessor Support Instruction Manual
Acquiring and Viewing Disassembled Data
This section describes how to acquire data and view it disassembled. Information
covers the following topics and tasks:
HAcquiring data
HViewing disassembled data in various display formats
HCycle type labels
HChanging the way data is displayed
HChanging disassembled cycles with the mark cycles function
Acquiring Data
Once you load the 68360 support, choose a clocking mode, and specify the
trigger, you are ready to acquire and disassemble
If you have any problems acquiring data, refer to information on basic operations
in your online help or Appendix A: Error Messages and Disassembly Pr oblems in
the basic operations user manual.
data.
Viewing Disassembled Data
You can view disassembled data in four display formats: Hardware, Software,
Control Flow, and Subroutine. The information on basic operations describes
how to select the disassembly display formats.
NOTE. Selections in the Disassembly property page (the Disassembly Format
Definition overlay) must be set correctly for your acquired data to be disassembled correctly. Refer to Changing How Data is Displayed on page 2–10.
The default display format shows the Address, Data, and Control channel group
values for each sample of acquired data.
The disassembler displays special characters and strings in the instruction
mnemonics to indicate significant events. Table 2–2 shows these special
characters and strings, and gives a definition of what they represent.
TMS 261 68360 Microprocessor Support Instruction Manual
2–5
Acquiring and Viewing Disassembled Data
T able 2–2: Meaning of special characters in the display
Character or string displayedMeaning
>> or mThe instruction was manually marked as a program fetch
****Indicates there is insuf ficient data available for complete
#Indicates an immediate value
tIndicates the number shown is in decimal, such as #12t
disassembly of the instruction; the number of asterisks
indicates the width of the data that is unavailable. Each two
asterisks represent one byte.
Hardware Display Format
(S) or (U)
A-LINE OPCODEDisplayed for an A-Line trap instruction
F-LINE OPCODEDisplayed for an F-Line trap instruction
Indicates the mode in which the microprocessor is operating,
Supervisor or User
In Hardware display format, the disassembler displays certain cycle type labels in
parentheses. Table 2–3 shows these cycle type labels and gives a definition of the
cycle they represent. Reads to interrupt and exception vectors will be labeled
with the vector name.
T able 2–3: Cycle type definitions
Cycle typeDefinition
( 68040 READ )68040 signals used. Read
( 68040 WRITE )68040 signals used. Write
( ALT BUS MASTER: READ–1 )Another master has control of the bus and is doing a memory
read
( ALT BUS MASTER: READ–2 )Another master has control of the bus and is doing a memory
read
2–6
( ALT BUS MASTER: READ–3 )Another master has control of the bus and is doing a memory
read
( ALT BUS MASTER: READ–4 )Another master has control of the bus and is doing a memory
read
( ALT BUS MASTER: READ–5 )Another master has control of the bus and is doing a memory
read
( ALT BUS MASTER: READ–6 )Another master has control of the bus and is doing a memory
read
( ALT BUS MASTER: WRITE–1 ) Another master has control of the bus and is doing a memory
write
( ALT BUS MASTER: WRITE–2 ) Another master has control of the bus and is doing a memory
write
TMS 261 68360 Microprocessor Support Instruction Manual
Acquiring and Viewing Disassembled Data
T able 2–3: Cycle type definitions (cont.)
Cycle typeDefinition
( ALT BUS MASTER: WRITE–3 ) Another master has control of the bus and is doing a memory
write
( ALT BUS MASTER: WRITE–4 ) Another master has control of the bus and is doing a memory
write
( ALT BUS MASTER: WRITE–5 ) Another master has control of the bus and is doing a memory
write
( ALT BUS MASTER: WRITE–6 ) Another master has control of the bus and is doing a memory
write
( BACKGROUND READ )A read has occurred while the processor is in background
mode
( BACKGROUND WRITE )A write has occurred while the processor is in background
mode
( BUS ERROR )External logic aborts current bus cycle
( DMA )DMA access
( HALT )HALT* asserted, processor stops
( READ )Data read from memory
( READ RMW )Read from memory during read-modify–write cycle
( REFRESH )Refresh cycle
( RESET )Processor asserts RESET* signal
( SHOW CYCLE READ )This is an internal READ made visible on the external bus
( SHOW CYCLE WRITE )This is an internal WRITE made visible on the external bus
( SHOW CYCLE READ RMW )This is an internal READ made visible on the external bus
(part of a RMC cycle)
( SHOW CYCLE WRITE RMW )This is an internal WRITE made visible on the external bus
(part of a RMC cycle)
( UNKNOWN )An unrecognized combination of control values
( WRITE )Data is written to memory
( WRITE RMW )Write to memory during read-modify-write cycle
( BREAKPOINT ACK n )
( INT ACK LEVEL: n )
( INTERNAL REG ACCESS )
1
1
A19-A16 indicates type 0000, n is break number for a READ
A19-A16 indicates type 11 11, n is level number for a READ
1
A19-A16 indicates type 0011; this occurs at low power
standby mode or a base address register access for a
WRITE
( FLUSH )
1
Pipeline flush; occurs when the processor branches to
nonsequential address
TMS 261 68360 Microprocessor Support Instruction Manual
2–7
Acquiring and Viewing Disassembled Data
T able 2–3: Cycle type definitions (cont.)
Cycle typeDefinition
( EXTENSION )
1
Computed cycle types.
Figure 2–1 shows an example of the Hardware display.
Sample Column. Lists the memory locations for the acquired data.
2
Address Group. Lists data from channels connected to the 68360 address
bus.
3
Data Group. Lists data from channels connected to the 68360 data bus.
4
Mnemonics Column. Lists the disassembled instructions and cycle types.
5
Timestamp. Lists the timestamp values when a timestamp selection is made.
Information on basic operations describes how you can select a timestamp.
TMS 261 68360 Microprocessor Support Instruction Manual
Acquiring and Viewing Disassembled Data
Software Display Format
Control Flow Display
Format
The Software display format shows only the first fetch of executed instructions.
Read extensions will be used to disassemble the instruction, but will not be
displayed as a separate cycle in the Software display format. Data reads and
writes are not displayed.
The Software display format also shows the following cycles:
HReset cycle
HHalt cycle
HBus Error cycle
HSpecial cycles: Breakpoint Ack, Int Ack, Internal Reg Access, Reset Vector
HReads from the vector table that appear due to servicing exceptions or traps
HIllegal instructions
H( UNKNOWN ) cycle types; the disassembler does not recognize the Control
group value
The Control Flow display format shows only the first fetch of instructions that
change the flow of control.
The Control Flow display format also shows the following cycles:
HReset cycle
HHalt cycle
HBus Error cycle
HSpecial cycles: Breakpoint Ack, Int Ack, Internal Reg Access
HReset vector
HReads from the vector table that appear due to servicing exceptions
HIllegal instructions
H( UNKNOWN ) cycle types; the disassembler does not recognize the Control
group value
Instructions that generate a change in the flow of control in the 68360
microprocessor are as follows:
TMS 261 68360 Microprocessor Support Instruction Manual
2–9
Acquiring and Viewing Disassembled Data
CHKJSRTRAP
CHK2LPSTOPTRAPcc
DBcc (test condition, decrement, and branch)TRAPV
DIVSRESET
Subroutine Display
Format
The Subroutine display format shows only the first fetch of subroutine call and
return instructions. It will display conditional subroutine calls if they are
considered to be taken.
The Subroutine display format also shows the following cycles:
HReset Cycle
HHalt Cycle
HBus Error Cycle
HSpecial cycles: Breakpoint Ack, Int Ack, Internal Reg Access
HReset Vector
HReads from the vector table that appear due to servicing exceptions
HIllegal instructions
H( UNKNOWN ) cycle types; the disassembler does not recognize the Control
group value
Instructions that generate a subroutine call or a return in the 68360 microprocessor are as follows:
There are common fields and features that allow you to further modify displayed
data to suit your needs. You can make common and optional display selections in
the Disassembly property page (the Disassembly Format Definition overlay).
You can make selections unique to the 68360 support to do the following tasks:
HChange how data is displayed across all display formats
HChange the interpretation of disassembled cycles
2–10
TMS 261 68360 Microprocessor Support Instruction Manual
Acquiring and Viewing Disassembled Data
Optional Display
Selections
You can make optional selections for disassembled
common selections (described in the information on basic operations), you can
change the displayed data in the following ways:
HChoose to acquire A27-A0 or A31-A0 signals on the address bus.
HSpecify the bus width when the DSACK signals are generated internally.
HChoose to display invalid bytes as dashes.
HSpecify the starting address of the vector table.
HSpecify the size of the vector table.
The 68360 microprocessor support product has five additional fields: Address
Bus Width, Internal Bus Width of the DSACK Signals, Dash Invalid Bytes,
Vector Base Register, and Vector Table Size. These fields appear in the area
indicated in the basic operations user manual.
Address Bus Width. The address bus of the 68360 microprocessor can be 28- or
32-bits wide, inclusive. You should select the bus width that matches the width of
the address bus in your SUT in the Address Lines A0 thru field. The choices
are A27-A0 or A31-A0.
data. In addition to the
The disassembler ignores upper address bits that fall outside the selected range
and displays them as 0.
If you create a symbol table for the Address group, be sure that the number of
bits in the symbol table matches the bus width for the Address group.
Internal Bus Width of the DSACK Signals. The 68360 microprocessor allows
8-, 16-, and 32-bit wide data transfers. The DSACK signals, which indicate the
valid bytes on the bus, are not always asserted.
For cycles when the DSACK signals are asserted, the disassembler uses the
binary value on the DSACK signals for displaying the valid bytes and dashing
invalid bytes (unless the field for dashing bytes is disabled).
For nonfetch Show cycles, the disassembler always displays 32 bits.
For cycles when the DSACK signals are not asserted, the disassembler uses the
selection in the Int. DSACKs Bus Width field to determine the DSACK bus
width. When Best Guess is selected, the disassembler will try to determine if the
data transfer was 8-, 16-, or 32-bits wide by looking at the surrounding fetches.
Data will be disassembled accordingly. This selection can be changed to an 8-bit,
16-bit, or 32-bit bus width.
TMS 261 68360 Microprocessor Support Instruction Manual
2–11
Acquiring and Viewing Disassembled Data
Dash Invalid Bytes. The disassembler uses the DSACK signals to determine
which bytes are valid for data transfers. When you select Yes in the Dash Invalid
Bytes field, the disassembler displays dashes for invalid bytes.
Vector Base Register. The disassembler uses the vector base register (VBR) value
(the base of the interrupt table) to compute the name of the interrupt or to
determine if a conditional interrupt occurred. You can enter the VBR value, the
starting address of the vector table, in the Vector Base Register field.
The disassembler ignores upper address bits that fall outside the selected range in
the Address Lines A0 thru field.
A0 of the VBR must be set to 0.
The reset vector information must be located from address 0x0 to 0x7. It does not
matter what the VBR is set to; the disassembler will always display the reset
vector at 0 (0x00000000).
Vector Table Size. The disassembler uses the vector table size to compute the
name of the interrupt whenever an exception occurs. The default vector table size
is 400. Enter any value between 8 and 400. The value must be divisible by four.
Marking Cycles
The disassembler has a Mark Opcode function that allows you to change the
interpretation of a cycle type. Using this function, you can select a cycle and
change it to one of the following cycle types:
HOpcode (the first word of an instruction)
HExtension (a subsequent word of an instruction)
HFlush (an opcode or extension that is fetched but not executed)
HAnything (any valid opcode, extension or flush)
Information on basic operations contains more details on marking cycles and
how to view the file.
TMS 261 68360 Microprocessor Support Instruction Manual
Viewing an Example of Disassembled Data
A demonstration system file (or demonstration reference memory) is provided so
you can see an example of how your 68360 microprocessor bus cycles and
instruction mnemonics look when they are disassembled. Viewing the system file
is not a requirement for preparing the module for use and you can view it without
connecting the logic analyzer to your SUT.
Acquiring and Viewing Disassembled Data
TMS 261 68360 Microprocessor Support Instruction Manual
2–13
Acquiring and Viewing Disassembled Data
2–14
TMS 261 68360 Microprocessor Support Instruction Manual
Specifications
Specifications
This chapter contains the following information:
HProbe adapter description
HSpecification tables
HDimensions of the probe adapter
HChannel assignment tables
HDescription of how the module acquires 68360 signals
HList of other accessible microprocessor signals and extra probe channels
Probe Adapter Description
The probe adapter is nonintrusive hardware that allows the logic analyzer to
acquire data from a microprocessor in its own operating environment with little
effect, if any, on that system. Information on basic operations contains a figure
showing the logic analyzer connected to a typical probe adapter. Refer to that
figure while reading the following description.
Configuration
The probe adapter consists of a circuit board and a socket for a 68360
microprocessor. The probe adapter connects to the microprocessor in the SUT.
Signals from the microprocessor-based system flow from the probe adapter to the
channel groups and through the probe signal leads to the module.
Circuitry on the probe adapter can be powered from either the SUT or an external
power source. Refer to Applying and Removing Power in the Getting Started
chapter on page 1–20 for information on using an external power source.
The probe adapter accommodates the Motorola 68360 microprocessor in a
241-pin PGA package. The low-profile probe adapter is designed to be used with
the 192-Channel High Density Probe. The conventional probe adapter was
available in earlier versions of the product.
There are many jumpers on the probe adapter. Table 3–1 shows a summary of the
jumpers, jumper positions, and functions for the low-profile. and conventional
probe adapters.
TMS 261 68360 Microprocessor Support Instruction Manual
3–1
Specifications
T able 3–1: Jumper positions and functions
Jumper
(low-profile
probe adapter)
J1120J1260SelectableIf the SUT uses dynamic memory controlled by the microprocessor, place the
J1200J1210RAS
J1205J125568360Use when acquiring standard 68360 signals (such as AS* and DS*). This is
J1520Not PresentCLK01Use when CLK01 is enabled in the CLKOCR register.
J1540J1630WE0Use when microprocessor is configured to use WE3–WE0 signals. The logic
J1545J1635WE1Use when microprocessor is configured to use WE3–WE0 signals. The logic
J1550J1640WE2Use when microprocessor is configured to use WE3–WE0 signals. The logic
J1555J1645WE3Use when microprocessor is configured to use WE3–WE0 signals. The logic
J1560J1290EXT PWRUse when the probe adapter is powered by an alternate power supply.
1
The RAS position meets Motorola’s requirement that the complete address not be on the bus at the end of each RAS/CAS
cycle. Observations on a limited set of microprocessors show that the complete address is on the bus at the end of each
RAS/CAS cycle. If you find that the microprocessor does not place the complete address on the bus at the end of a
RAS/CAS cycle (CAS part), then place the jumper in the RAS position.
Jumper
(conventional
probe adapter)
PositionFunction
jumper in the position corresponding to the memory size used (128, 256, or
512 Kbytes, or 1, 2, 4, 8, 16, or 32 Mbytes). If the SUT does not use dynamic
memory , place the jumper in any position. You can also place the jumper in
any position if the RAS/Trans jumper (J1200) is in the Trans position (Pins 2,
3).
1
TransUse if the SUT does not use dynamic memory or if you want to acquire data
68040Use when acquiring 68040-type signals (such as TS* and TA*).
EXT ALUse when EXTAL is driven with the system frequency.
A28Use when microprocessor is configured to use A31–A28 address signals.
A29Use when microprocessor is configured to use A31–A28 address signals.
A30Use when microprocessor is configured to use A31–A28 address signals.
A31Use when microprocessor is configured to use A31–A28 address signals.
SUT PWRUse when the probe adapter is powered by the SUT. This is the default
Use if the SUT uses dynamic memory. Place the jumper in this position to
rearrange the upper and lower bits of the Address group for disassembly.
using transitional clocking (asynchronous). This is the default jumper setting.
the default jumper setting.
analyzer reads these signals as lows. This is the default position.
The logic analyzer reads the WE3–WE0 signals as highs.
analyzer reads these signals as lows. This is the default position.
The logic analyzer reads the WE3–WE0 signals as highs.
analyzer reads these signals as lows. This is the default position.
The logic analyzer reads the WE3–WE0 signals as highs.
analyzer reads these signals as lows. This is the default position.
The logic analyzer reads the WE3–WE0 signals as highs.
jumper setting.
3–2
TMS 261 68360 Microprocessor Support Instruction Manual
Figure 3–1 shows the locations of the jumpers and switches on the probe
adapters. Refer to Table 3–1 for descriptions of each jumper.
Figure 3–1: Jumper and switch locations on the probe adapters
The CS/RAS Signal Selection switch block (S1140 on the low-profile probe
adapter or S1230 on the conventional probe adapter) has a switch for each RAS
switch that the SUT might use. For each RAS signal used, close the corresponding switch on the switch block. If the SUT does not use dynamic memory, open
all of the switches.
If you do not know which RAS lines are used by the SUT, open all of the
switches and place the RAS/Trans jumper in the Trans position.
Table 3–2 shows the switch numbers printed on the switch block and the CS or
RAS signal that connects to each switch.
TMS 261 68360 Microprocessor Support Instruction Manual
These specifications are for a probe adapter connected between a compatible
Tektronix logic analyzer and a SUT. Table 3–3 shows the electrical requirements
for the low-profile probe adapter the SUT must produce for the support to
acquire correct data.
In Table 3–3, for the 102/136-channel module, one podlet load is 20 kW in
parallel with 2 pF. For the 96-channel module, one podlet load is 100 kW in
parallel with 10 pF.
T able 3–3: Electrical specifications: Low-profile probe adapter
CharacteristicsRequirements
Adapter DC power requirements
Voltage4.75-5.25 VDC
Current (power supplied by SUT)I Maximum (calculated)1.4 A
I Typical (measured)1.1 A
Power supply requirements
Voltage90-265 VAC
Current1.1 A maximum at 100 VAC
Frequency47-63 Hz
Power25 W maximum
SUT clock
Clock rateMaximum.33 MHz
Tested25 MHz
Minimum setup time required
D0 – D318 ns worst case; 3 ns typical
3–4
TMS 261 68360 Microprocessor Support Instruction Manual
Specifications
T able 3–3: Electrical specifications: Low-profile probe adapter (cont.)
CharacteristicsRequirements
All other signals5 ns
Minimum hold time required
IFETCH*, DSACK0–1*, AVEC*8 ns
All other signals1 ns
Without probe adapter
Minimum setup time required, all signals5 ns
Minimum hold time required, all signalst0 ns
Table 3–4 lists the typical SUT loading you can expect when you use the
low-profile probe adapter.
T able 3–4: Typical SUT signal loading: Low-profile probe adapter
CharacteristicsAC loadDC load
A0–A1411–15 pF74FCT162501
A15, A20–A2513–17 pF20L8-10
A16–A19, A26, A27, BG*, BGACK*13–17 pF22V10-10
A28 (J1540 in WE0 position)13 pF74FCT162244ET
A28 (J1540 in A28 position)15 pF22V10-10
A29 (J1545 in WE1 position)17 pF74FCT162244ET
A29 (J1545 in A29 position)19 pF22V10-10
A30 (J1550 in WE2 position)13 pF74FCT162244ET
A30 (J1550 in A30 position)21 pF22V10-10
A31 (J1555 in WE3 position)15 pF74FCT162244ET
A31 (J1555 in A31 position)15 pF22V10-10
BCLRO*, PRTY39–11 pF16V8–7
CAS0*–CAS3*16–19 pF20L8–5
DSACK1*26 pF20L8–5
AS*23 pF20L8–5
CLK01, EXTAL4–16 pF
CS0*–CS7*5–19 pF
RMC*26 pF16V8-7
FREEZE31 pF16V8-7
DS*12 pF16V8-7
1
2
20L8–5
74F30
TMS 261 68360 Microprocessor Support Instruction Manual
3–5
Specifications
T able 3–4: Typical SUT signal loading: Low-profile probe adapter (cont.)
Loading varies with position of J1520 (CLK01/EXTAL jumper)
2
Loading varies with positions of S1230 (CAS/RAS selection switch)
Table 3–5 shows the electrical requirements for the conventional probe adapter.
T able 3–5: Electrical specifications: Conventional probe adapter
CharacteristicsRequirements
Adapter DC Power Requirements
Voltage4.75-5.25 VDC
Current (Power Supplied by SUT)I maximum (calculated)1.3 A
I typical (measured)1.0 A
Power supply requirements
Voltage90-265 VAC
Current1.1 A maximum at 100 VAC
Frequency47-63 Hz
Power25 W maximum
SUT Clock
Clock RateMin.DC
Max.33 MHz
Tested25 MHz
With Probe Adapter
Minimum Setup Time Required
D0 – D317 ns worst case; 3 ns typical
All Other Signals4 ns
Minimum Hold Time Required
IFETCH*, DSACK0–1*, AVEC*7 ns
All Other Signals0 ns
Without Probe Adapter
Minimum Setup Time Required, All Signals5 ns
Minimum Hold Time Required, All Signals0 ns
3–6
TMS 261 68360 Microprocessor Support Instruction Manual
Specifications
Table 3–6 lists the typical SUT loading you can expect when you use the
conventional probe adapter. In Table 3–6, for themodule, one podlet load is
100 kW in parallel with 10 pF.
T able 3–6: Typical SUT signal loading: Conventional probe adapter
Non-operating–55° C to +75° C (–67° to +167° F)
Humidity10 to 95% relative humidity
Altitude
Operating4.5 km (15,000 ft) maximum
Non-operating15 km (50,000 ft) maximum
Electrostatic immunityThe probe adapter is static sensitive
*Designed to meet Tektronix standard 062-2847-00 class 5.
[
Not to exceed 68360 microprocessor thermal considerations. Forced air cooling might
be required across the CPU.
+50° C (+122° F)[
TMS 261 68360 Microprocessor Support Instruction Manual
3–7
Specifications
Table 3–8 shows the certifications and compliances that apply to the probe
adapter.
T able 3–8: Certifications and compliances
EC ComplianceThere are no current European Directives that apply to this product.
Figure 3–2 shows the dimensions of the probe adapter. The figure also shows the
minimum vertical clearance of the high-density probe cable.
56 mm
(2.22 in)
47 mm
(1.85 in)
120 mm
(4.75 in)
Figure 3–2: Dimensions of the low-profile probe adapter
89 mm
(3.50 in)
Pin B1
25.4 mm
(1.00 in)
7 mm (.26 in)
3–8
Figure 3–3 shows the placement of tie-down holes on the probe adapter. If you
purchase a converter clip (PGA-to-QFP) from ITT Pomona (part number 5968),
you can use screws to secure the clip and probe adapter to the microprocessor in
your system. The dimension of the holes is 0.110/0.116 inch.
TMS 261 68360 Microprocessor Support Instruction Manual
Specifications
48 mm
(1.88 in)
Pin B1
43 mm
(1.71 in)
4 mm (.16 in)
45.2 mm
(1.78 in)
44.9 mm
(1.77 in)
3.5 mm (0.14 in)
Figure 3–3: Tie-down hole placement on the low-profile probe adapter
6 mm
(.23 in)
8 mm
(.33 in)
Figure 3–4 shows the dimensions of the conventional probe adapter. The basic
operations user manual shows the vertical clearance of the clock and channel
probes when connected to a probe adapter under Requirements and Restrictions
in the Getting Started chapter.
TMS 261 68360 Microprocessor Support Instruction Manual
3–9
Specifications
108 mm
(4.27 in)
25 mm
(1.00 in)
Channel Assignments
42 mm
(1.67 in)
Pin 1A
102 mm
(4.00 in)
Figure 3–4: Dimensions of the conventional probe adapter
Channel assignments shown in Table 3–9 through Table 3–14 use the following
conventions:
HAll signals are required by the support unless indicated otherwise.
HChannels are shown starting with the most significant bit (MSB) descending
to the least significant bit (LSB).
HChannel group assignments are for all modules unless otherwise noted.
HAn asterisk following a signal name indicates an active low signal.
HAn equals sign (=) following a signal name indicates that it is double probed.
Table 3–9 shows the probe section and channel assignments for the Address
group and the microprocessor signal to which each channel connects. By default,
this channel group is displayed in hexadecimal.
3–10
TMS 261 68360 Microprocessor Support Instruction Manual
Table 3–10 shows the probe section and channel assignments for the Data group
and the microprocessor signal to which each channel connects. By default, this
channel group is displayed in hexadecimal.
TMS 261 68360 Microprocessor Support Instruction Manual
Table 3–11 shows the probe section and channel assignments for the Control
group and the microprocessor signal to which each channel connects. By default,
this channel group is displayed symbolically.
TMS 261 68360 Microprocessor Support Instruction Manual
Table 3–12 shows the probe section and channel assignments for the DataSize
group and the microprocessor signal to which each channel connects. By default,
this channel group is displayed in symbolically.
TMS 261 68360 Microprocessor Support Instruction Manual
3–13
Specifications
Table 3–13 shows the probe section and channel assignments for the Misc group
and the microprocessor signal to which each channel connects. By default, this
channel group is not visible.
Table 3–14 shows the probe section and channel assignments for the clock probes
(not part of any group) and the 68360 signal to which each channel connects.
T able 3–14: Clock channel assignments
Logic analyzer
Section: channel 68360 signal name
CK:0AS* (held high in
68040 mode)
CK:1noneREFRESH (CAS be-
CK:2noneALT_D (derived signal
CK:3EXTALSYSCLK_040*
1
Channel is double probed.
signal name
AS_B*1
fore RAS cycle)
– Config lines with BG*
& BGACK*)
1
3–14
These channels are used only to clock in data; they are not acquired or displayed.
To acquire data from any of the signals shown in Table 3–14, you must connect
another channel probe to the signal, a technique called double probing.
TMS 261 68360 Microprocessor Support Instruction Manual
How Data is Acquired
Specifications
This part of this chapter explains how the module acquires 68360 signals using
the TMS 261 software and probe adapter. This part also provides additional
information on microprocessor signals accessible on or not accessible on the
probe adapter, and on extra probe channels available for you to use for additional
connections.
Custom Clocking
A special clocking program is loaded to the module every time you load the
68360 support. This special clocking is called Custom.
With Custom clocking, the module logs in signals from multiple groups of
channels at different times as they become valid on the 68360 bus. The module
then sends all the logged-in signals to the trigger machine and to the memory of
the module for storage.
In Custom clocking, the module clocking state machine (CSM) generates one
master sample for each microprocessor bus cycle, no matter how many clock
cycles are contained in the bus cycle.
Figure 3–5 shows the sample points and the master sample point for 68360 bus
timing. Sample point 1 includes lower address signals latched on probe
(RAS_CAS). Sample point 2 includes IFETCH*, SYSCLK_B, FC3, and R_W*.
Sample point 3 includes all Address, Data and remaining control signals.
Figure 3–6 shows the sample points for 68040 microcontroller bus timing.
TMS 261 68360 Microprocessor Support Instruction Manual
3–15
Specifications
CLK_040*
Address
lines
AS*
Data
S0S1S2S3S4S5S0
Master sample
Sample point 1:
Lower Address lines
latch on probe
(RAS_CAS only).
Sample point 2:
92A96:
IFETCH*
SYSCLK_B
FC3
R_W*
Sample point 3:
All Address, Data &
all other assigned
control signals.
point
Figure 3–5: 68360 bus timing
C1C2CWC3
CLK_040*
TA*
Figure 3–6: 68040 bus timing
Clocking Options
32GPX:
IFETCH*
AVEC*
Config 0
AS_B*
Master sample
point
All signals sampled
& logged In
The clocking algorithm for the 68360 microprocessor support has the following
variations: Probe Interface Type With Probe Adapter, Probe Interface Type
Without Probe Adapter, Alternate Bus Master Cycles Excluded, Alternate Bus
Master Cycles Included, Refresh Cycles Excluded, and Refresh Cycles Included.
3–16
TMS 261 68360 Microprocessor Support Instruction Manual
Specifications
Probe Interface T ype. You can acquire data with or without using a probe adapter.
Refer to the guidelines under Probe Interface Type on page 2–2 when acquiring
data without a 68360 probe adapter.
Alternate Bus Master Cycles. An alternate bus master cycle is defined as the
68360 giving up the bus to an alternate device (a DMA device or another
microprocessor). These types of cycles are acquired when you select Included.
The default selection is Excluded.
Refresh Cycles. A refresh cycle is defined as CAS before RAS when using
dynamic memory. These types of cycles are acquired when you select Included.
The default selection is Excluded.
NOTE. The RAS switches must be set correctly in order to detect Refresh cycles.
Alternate Microprocessor Connections
You can connect to microprocessor signals that are not required by the support so
that you can do more advanced timing analysis. These signals might or might not
be accessible on the probe adapter board. The following paragraphs and tables
list signals that are or are not accessible on the probe adapter board.
For a list of signals required or not required for disassembly, refer to the channel
assignment tables beginning on page 3–10. Remember that these channels are
already included in a channel group. If you do connect these channels to other
signals, you should set up another channel group for them.
Signals On the Probe
Adapter
The probe adapter board contains pins for microprocessor signals that are not
acquired by the TMS 261 application. You can connect extra podlets to these
pins, because they can be useful for general purpose analysis.
Table 3–15 shows the pin strip names and component designations (for example,
J1180) for these miscellaneous 68360 signal connections. Table 3–16 through
Table 3–23 show the pin number and signal name assignments for each pin strip.
TMS 261 68360 Microprocessor Support Instruction Manual
3–17
Specifications
T able 3–15: Pin strip names used for alternate connections
AUX0J1 180J1110
AUXJ1140J1185
TIMERSpart of J1490part of J1790
PORTApart of J1490part of J1790
PORTBpart of J1490part of J1790
PORTCpart of J1490part of J1790
JTAGJ1185J1215
BDMJ1160J1285
Figure 3–7 shows the locations of the miscellaneous pin strips you can use to
make alternate connections.
Table 3–24 lists extra sections and channels that are left after you have connected
all the probes used by the support. You can use these extra channels to make
alternate SUT connections.
These channels are not defined in any channel group and data acquired from
them is not displayed. To display data, you will need to define a channel group.
TMS 261 68360 Microprocessor Support Instruction Manual
3–25
Specifications
3–26
TMS 261 68360 Microprocessor Support Instruction Manual
WARNING
The following servicing instructions are for use only by qualified personnel. To
avoid injury, do not perform any servicing other than that stated in the operating
instructions unless you are qualified to do so. Refer to all Safety Summaries
before performing any service.
Maintenance
Maintenance
This chapter contains information on the following topics:
HProbe adapter circuit description
HHow to replace a fuse
Probe Adapter Circuit Description
The following paragraphs provide descriptions of the PAL/gates on the probe
adapter.
HMUX1–4. In CPU32+ mode, these PALs determine which lower address
needs to be multiplexed onto a higher address line for RAS–CAS cycles. On
cycles that are not RAS–CAS, or in Slave mode, the high order address line
passes straight through.
HALT–MUX. The MUX part of the PAL does the same job as the MUX1–4
PALs. The ALT part of the PAL determines when a cycle belongs to an
alternate master and uses the output signal (ALT_D) for clocking only. To do
this, it uses the BG* and BGACK* signals, and the BROUT signal from the
LATCH PAL.
HLATCH. This PAL latches the Config and Port Size lines on RESET going
away. These lines are then sent as data lines for the disassembler, and
generate the BROUT signal for the ALT–MUX PAL.
The LATCH PAL also looks at the J68040 jumper and the Config lines to
determine if 68040 type signals are being used. It places this information on
the S68040 line to the RAS PAL.
HCONFIG. The 74F148 takes the memory space jumpers and turns them into
three bits of gray code.
HRAS. This PAL determines CAS before RAS cycles and outputs a RE-
FRESH signal. The AMS must ensure that only one REFRESH cycle is
stored for each RAS cycle.
The PAL buffers the clock delay to the clock podlet. This will add from 1 to
5 ns of delay with a typical delay of 3 ns. This helps data setup time
problems. When working with 68040 timing signals, the clock will be
inverted when the S68040 signal for the LATCH PAL is high.
The AS* signal is held high when in 68040 signal mode and is buffered the
rest of the time.
TMS 261 68360 Microprocessor Support Instruction Manual
4–1
Maintenance
The DS* signal is held high when in 68040 signal mode and is buffered the
rest of the time.
The TA_D* signal is held high in non 68040 timing modes and is buffered
when in 68040 timing modes.
HRAS switches. Set these switches to indicate which RAS lines are being
used. If you do not know the RAS lines or if they do not know the memory
size when using dynamic memories, then you should move the RAS–CAS/
Transparent jumper to the Transparent (Trans) position. This will turn off the
multiplexing of address lines and send the address lines directly to the logic
analyzer. Most observed microprocessors have the total address on the bus at
the end of the cycle when the transparent position has no negative impact. If
the RAS switches cannot be set up correctly, then no refresh cycles will be
captured.
The transparent position (Trans) should also be used in timing mode.
Replacing Signal Leads
Information on basic operations describes how to replace signal leads (individual
channel and clock probes).
Replacing Protective Sockets
Information on basic operations describes how to replace protective sockets.
4–2
TMS 261 68360 Microprocessor Support Instruction Manual
Replacing the Fuse
Low-p
ile probe adapte
Maintenance
If the fuse on the 68360 probe adapter opens (burns out), you can replace it with
a 5 A, 125 V fuse. Figure 4–1 shows the location of the fuse on the probe adapter.
rof
rConventional probe adapter
Figure 4–1: Location of the fuse
Fuse
Fuse
TMS 261 68360 Microprocessor Support Instruction Manual
4–3
Maintenance
4–4
TMS 261 68360 Microprocessor Support Instruction Manual
Replaceable Electrical Parts
Replaceable Electrical Parts
This chapter contains a list of the replaceable electrical components for the
TMS 261 68360 microprocessor support. Use this list to identify and
order replacement parts.
Parts Ordering Information
Replacement parts are available through your local Tektronix field office or
representative.
Changes to Tektronix products are sometimes made to accommodate improved
components as they become available and to give you the benefit of the latest
improvements. Therefore, when ordering parts, it is important to include the
following information in your order:
HPart number
HInstrument type or model number
HInstrument serial number
HInstrument modification number, if applicable
If you order a part that has been replaced with a different or improved part, your
local Tektronix field office or representative will contact you concerning any
change in part number.
Change information, if any, is located at the rear of this manual.
Using the Replaceable Electrical Parts List
The tabular information in the Replaceable Electrical Parts List is arranged for
quick retrieval. Understanding the structure and features of the list will help you
find all of the information you need for ordering replacement parts. The
following table describes each column of the electrical parts list.
TMS 261 68360 Microprocessor Support Instruction Manual
5–1
Replaceable Electrical Parts
Parts list column descriptions
ColumnColumn nameDescription
1Component numberThe component number appears on diagrams and circuit board illustrations, located in the diagrams
section. Assembly numbers are clearly marked on each diagram and circuit board illustration in the
Diagrams section, and on the mechanical exploded views in the Replaceable Mechanical Parts list
section. The component number is obtained by adding the assembly number prefix to the circuit
number (see Component Number illustration following this table).
The electrical parts list is arranged by assemblies in numerical sequence (A1, with its subassemblies
and parts, precedes A2, with its subassemblies and parts).
Chassis-mounted parts have no assembly number prefix, and they are located at the end of the
electrical parts list.
2Tektronix part numberUse this part number when ordering replacement parts from Tektronix.
3 and 4Serial numberColumn three indicates the serial number at which the part was first effective. Column four indicates
the serial number at which the part was discontinued. No entry indicates the part is good for all serial
numbers.
5Name & descriptionAn item name is separated from the description by a colon (:). Because of space limitations, an item
name may sometimes appear as incomplete. Use the U.S. Federal Catalog handbook H6-1 for
further item name identification.
6Mfr. codeThis indicates the code number of the actual manufacturer of the part.
7Mfr. part numberThis indicates the actual manufacturer’s or vendor’s part number.
Abbreviations
Component Number
List of Assemblies
Chassis Parts
Mfr. Code to Manufacturer
Cross Index
Abbreviations conform to American National Standard ANSI Y1.1–1972.
Component number
A23A2R1234 A23 R1234
Assembly numberCircuit number
Read: Resistor 1234 (of Subassembly 2) of Assembly 23
A2
Subassembly number
(optional)
A list of assemblies is located at the beginning of the electrical parts list. The
assemblies are listed in numerical order. When a part’s complete component
number is known, this list will identify the assembly in which the part is located.
Chassis-mounted parts and cable assemblies are located at the end of the
Replaceable Electrical Parts List.
The table titled Manufacturers Cross Index shows codes, names, and addresses of
manufacturers or vendors of components listed in the parts list.
5–2
TMS 261 68360 Microprocessor Support Instruction Manual
Replaceable Electrical Parts
Manufacturers cross index
Mfr.
code
00779AMP INC.CUSTOMER SERVICE DEPT
01295TEXAS INSTRUMENTS INCSEMICONDUCTOR GROUP
04222AVX/KYOCERAPO BOX 867MYRTLE BEACH, SC 29577
04713MOTOROLA INCSEMICONDUCTOR PRODUCTS SECTOR
50434HEWLETT PACKARD370 W TRIMBLE ROADSAN JOSE, CA 95131–1008
55420DYSAN INTERNATIONAL218 RAILROAD AVEMILPITAS, CA 95035
61772INTEGRATED DEVICE TECHNOLOGY2975 STENDER WAYSANTA CLARA, CA 95054
61857SAN–O INDUSTRIAL CORP91–3 COLIN DRIVEHOLBROOK, NY 11741
63058MCKENZIE TECHNOLOGY910 PAGE AVEFREMONT, CA 945387340
65786CYPRESS SEMICONDUCTOR CORP3901 N FIRST STSAN JOSE, CA 95134–1506
80009TEKTRONIX INC14150 SW KARL BRAUN DR
85480BRADY USANAMEPLA TE DIVISION
S3109FELLER U.S. CORPORATION72 VERONICA AVE
TK0875MATSUO ELECTRONICS2134 MAIN STREET
ManufacturerAddressCity , state, zip code
HARRISBURG, PA 17105–3608
PO BOX 3608
DALLAS, TX 75272–5303
13500 N CENTRAL EXPRESSWA Y
PO BOX 655303
PHOENIX, AZ 85008–4229
5005 E MCDOWELL ROAD
YANKTON, SD 57078
P.O. BOX 180
MINNEAPOLIS, MN 55428
BROOKLINE PARK
CHICAGO, IL 60656–4548
7444 WEST WILSON AVE
SUNNYVALE, CA 94088–3453
PO BOX 3453
EL PASO, TX 79936
1414 ALLEN BRADLEY DRIVE
BEAVERT ON, OR 97077–0001
PO BOX 500
HILLSBOROUGH, NC 27278
P O BOX 571
346 ELIZABETH BRADY RD
SOMERSET, NJ 08873
UNIT #4
HUNTINGTON BEACH, CA 92648
SUITE 200
TMS 261 68360 Microprocessor Support Instruction Manual
A02J1120131–5267–00CONN,HDR:PCB,MALE,STR,2 X 40,0.1 CTR00779104326–4
A02J1140131–5267–00CONN,HDR:PCB,MALE,STR,2 X 40,0.1 CTR00779104326–4
A02J1160131–5267–00CONN,HDR:PCB,MALE,STR,2 X 40,0.1 CTR00779104326–4
A02J1180131–5267–00CONN,HDR:PCB,MALE,STR,2 X 40,0.1 CTR00779104326–4
A02J1185131–5267–00CONN,HDR:PCB,MALE,STR,2 X 40,0.1 CTR00779104326–4
A02J1200131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1205131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1490131–5267–00CONN,HDR:PCB,MALE,STR,2 X 40,0.1 CTR00779104326–4
A02J1520131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1540131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1545131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1550131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1555131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1560131–4530–00CONN,HDR:PCB,MALE,STR,1 X 3,0.1 CTR00779104344–1
A02J1680131–5527–00JACK,POWER DC:PCB,MALE,RTANG,2MM PIN,11MM