Tektronix TMS109A Instruction Manual
Instruction Manual
TMS 109A
Socket 7 Microprocessor Support
071-0497-01
Warning
The servicing instructions are for use by
qualified personnel only. To avoid personal
injury, do not perform any servicing unless you
are qualified to do so. Refer to all safety
summaries prior to performing service.
Copyright E T ektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and are protected by United States copyright laws and international treaty provisions.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the
Rights in T echnical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the
Commercial Computer Software – Restricted Rights clause at F AR 52.227-19, as applicable.
T ektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material. Specifications and price change privileges reserved.
Printed in the U.S.A.
T ektronix, Inc., P.O. Box 1000, Wilsonville, OR 97070–1000
TEKTRONIX and TEK are registered trademarks of T ektronix, Inc.
SOFTWARE WARRANTY
T ektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, T ektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
T ektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If T ektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
HARDWARE WARRANTY
T ektronix warrants that the products that it manufactures and sells will be free from defects in materials and
workmanship for a period of one (1) year from the date of shipment. If a product proves defective during this
warranty period, T ektronix, at its option, either will repair the defective product without charge for parts and labor,
or will provide a replacement in exchange for the defective product.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period and make suitable arrangements for the performance of service. Customer shall be
responsible for packaging and shipping the defective product to the service center designated by T ektronix, with
shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a
location within the country in which the T ektronix service center is located. Customer shall be responsible for
paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. T ektronix shall not be obligated to furnish service under this warranty a) to repair damage
resulting from attempts by personnel other than T ektronix representatives to install, repair or service the product;
b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any
damage or malfunction caused by the use of non-T ektronix supplies; or d) to service a product that has been
modified or integrated with other products when the effect of such modification or integration increases the time
or difficulty of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE AND
EXCLUSIVE REMEDY PROVIDED TO THE CUST OMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT , SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR
THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
Table of Contents
Getting Started
General Safety Summary v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Service Safety Summary vii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preface ix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manual Conventions ix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacting T ektronix x. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Support Package Description 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Software Compatibility 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Configuration 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Requirements and Restrictions 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functionality Not Supported 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuring the Probe Adapter 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MFG_TEST Jumper 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CLK Jumper 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Processor Selection Jumper 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D/P# Signal Jumper 1–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tracking Jumper 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Address Synthesis Jumper 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting to a System Under T est 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connect the P6434 Probes to the Probe Adapter 1–6. . . . . . . . . . . . . . . . . . . . .
Remove the Microprocessor 1–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Choose a Protective Socket 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Insert Probe Adapter 1–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Insert Microprocessor in the Probe Adapter 1–10. . . . . . . . . . . . . . . . . . . . . . . . .
Alternate Connections 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Applying and Removing Power 1–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Assignments 1–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU To Mictor Connections 1–22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Basics
Setting Up the Support 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Group Definitions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking Options 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Custom Clocking 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ClockingOptions 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Differences 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Component Mode 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip Set Mode 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Symbols 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acquiring and Viewing Disassembled Data 2–9. . . . . . . . . . . . . . . . . . . . .
Acquiring Data 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing Disassembled Data 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing-Waveform Display Format 2–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Display Format 2–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TMS 109A Socket 7 Microprocessor Support
i
Table of Contents
Specifications
Software Display Format 2–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Flow Display Format 2–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Display Format 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing How Data is Displayed 2–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optional Display Selections 2–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dual Microprocessors Execution Tracing 2–18. . . . . . . . . . . . . . . . . . . . . . . . . . .
Branch Trace Messages 2–21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out-Of-Order Fetches 2–21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Speculative Prefetch Cycles 2–23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cache Invalidation Cycles 2–24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Burst Cycles 2–24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Management Mode (SMM) 2–24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MMX Instruction Set 2–25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3DNow! 2–25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Marking Cycles 2–25. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Displaying Exception Vectors 2–26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing an Example of Disassembled Data 2–28. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Probe Adapter Description 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifications 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maintenance
Probe Adapter Circuit Description 4–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Replacing the Fuse 4–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagrams
Replaceable Electrical Parts
Parts Ordering Information 6–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Index
ii TMS 109A Socket 7 Microprocessor Support
List of Figures
Table of Contents
Figure 1–1: Jumper locations on the probe adapter 1–5. . . . . . . . . . . . . .
Figure 1–2: Connecting a probe to the probe adapter 1–7. . . . . . . . . . . . .
Figure 1–3: Protective sockets 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–4: Placing the socket and probe adapter onto the
system under test 1–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–5: Inserting a microprocessor into the probe adapter 1–10. . . . .
Figure 1–6: ITP and system reset pin locations on the probe adapter 1–12
Figure 1–7: Power jack location on the probe adapter 1–14. . . . . . . . . . . .
Figure 1–8: Pin assignments for a Mictor connector
(component side) 1–22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–1: Nonpipelined single and Burst Transfer cycles 2–2. . . . . . . .
Figure 2–2: Pipelined cycles 2–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–3: Hardware display format 2–14. . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–4: Data displayed from the Primary and
Dual microprocessors 2–19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–5: Disassembled data displayed from the Primary
microprocessor only 2–20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–6: Disassembled data displayed from the Dual
microprocessor only 2–20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–7: Display of target and source Branch Trace Messages 2–21. . .
Figure 2–8: Software display for the AMD Bus cycles 2–22. . . . . . . . . . . .
Figure 2–9: Hardware display for the AMD Bus cycles 2–23. . . . . . . . . . .
Figure 2–10: Speculative Prefetch cycles 2–24. . . . . . . . . . . . . . . . . . . . . . .
Figure 3–1: Dimensions of the probe adapter 3–4. . . . . . . . . . . . . . . . . . . .
Figure 4–1: Location of the fuse on the probe adapter 4–2. . . . . . . . . . . .
Figure 6–1: TMS 109A Socket 7 probe adapter exploded view 6–5. . . . .
TMS 109A Socket 7 Microprocessor Support
iii
Table of Contents
List of Tables
Table 1–1: Jumper positions and function 1–4. . . . . . . . . . . . . . . . . . . . . .
Table 1–2: ITP (J580) signal Information 1–11. . . . . . . . . . . . . . . . . . . . . .
Table 1–3: J260 jumper pin assignments 1–12. . . . . . . . . . . . . . . . . . . . . . .
Table 1–4: Address channel group assignments 1–14. . . . . . . . . . . . . . . . .
Table 1–5: Data channel group assignments 1–16. . . . . . . . . . . . . . . . . . . .
Table 1–6: Data_Lo channel group assignments 1–17. . . . . . . . . . . . . . . . .
Table 1–7: Control channel group assignments 1–18. . . . . . . . . . . . . . . . . .
Table 1–8: Data Size channel group assignments 1–19. . . . . . . . . . . . . . . .
Table 1–9: Cache channel group assignments 1–19. . . . . . . . . . . . . . . . . . .
Table 1–10: Misc channel group assignments 1–19. . . . . . . . . . . . . . . . . . .
Table 1–11: Clock channel group assignments 1–20. . . . . . . . . . . . . . . . . .
Table 1–12: Signals not required for clocking or disassembly 1–21. . . . . .
Table 1–13: Signals on the probe adapter but not acquired 1–21. . . . . . . .
Table 1–14: Signals not connected to probe adapter 1–21. . . . . . . . . . . . . .
Table 1–15: CPU to Mictor connections for Mictor A pins 1–23. . . . . . . .
Table 1–16: CPU to Mictor connections for Mictor D pins 1–24. . . . . . . .
Table 1–17: CPU to Mictor connections for Mictor E pins 1–25. . . . . . . .
Table 1–18: CPU to Mictor connections for Mictor C pins 1–27. . . . . . . .
Table 2–1: Control group symbol table definitions 2–5. . . . . . . . . . . . . . .
Table 2–2: Meaning of special characters in the display 2–10. . . . . . . . . .
Table 2–3: Cycle type definitions 2–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–4: Trace Processor and Other Processor field selections 2–19. . .
Table 2–5: Exception vectors for Real Addressing mode 2–26. . . . . . . . . .
Table 2–6: Exception vectors for Protected Addressing mode 2–27. . . . . .
Table 3–1: Electrical specifications 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–2: Environmental specifications 3–3. . . . . . . . . . . . . . . . . . . . . . . .
Table 4–1: Socket 7 signal delays using the probe adapter 4–2. . . . . . . .
iv TMS 109A Socket 7 Microprocessor Support
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
To Avoid Fire or Personal Injury
Use Proper Power Cord. Use only the power cord specified for this product and
certified for the country of use.
Connect and Disconnect Properly . Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Connect and Disconnect Properly . Connect the probe output to the measurement
instrument before connecting the probe to the circuit under test. Disconnect the
probe input and the probe ground from the circuit under test before disconnecting
the probe from the measurement instrument.
Ground the Product. This product is indirectly grounded through the grounding
conductor of the mainframe power cord. To avoid electric shock, the grounding
conductor must be connected to earth ground. Before making connections to the
input or output terminals of the product, ensure that the product is properly
grounded.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and markings on the product. Consult the product manual for further ratings
information before making connections to the product.
Do not apply a potential to any terminal, including the common terminal, that
exceeds the maximum rating of that terminal.
Use Proper AC Adapter. Use only the AC adapter specified for this product.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Use Proper Fuse. Use only the fuse type and rating specified for this product.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Do Not Operate in Wet/Damp Conditions.
TMS 109A Socket 7 Microprocessor Support
v
General Safety Summary
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry .
Provide Proper Ventilation. Refer to the manual’s installation instructions for
details on installing the product so it has proper ventilation.
Symbols and Terms
T erms in this Manual. These terms may appear in this manual:
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
T erms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
Symbols on the Product. The following symbols may appear on the product:
CAUTION
Refer to Manual
WARNING
High Voltage
Double
Insulated
Protective Ground
(Earth) Terminal
vi TMS 109A Socket 7 Microprocessor Support
Service Safety Summary
Only qualified personnel should perform service procedures. Read this Service
Safety Summary and the General Safety Summary before performing any service
procedures.
Do Not Service Alone. Do not perform internal service or adjustments of this
product unless another person capable of rendering first aid and resuscitation is
present.
Disconnect Power. To avoid electric shock, switch off the instrument power, then
disconnect the power cord from the mains power.
Use Care When Servicing With Power On. Dangerous voltages or currents may
exist in this product. Disconnect power, remove battery (if applicable), and
disconnect test leads before removing protective panels, soldering, or replacing
components.
To avoid electric shock, do not touch exposed connections.
TMS 109A Socket 7 Microprocessor Support
vii
Service Safety Summary
viii TMS 109A Socket 7 Microprocessor Support
Preface
This instruction manual contains specific information about the TMS 109A Socket 7 microprocessor support package and is part of a set of information on how to
operate this product on compatible Tektronix logic analyzers.
If you are familiar with operating microprocessor support packages on the logic
analyzer for which the TMS 109A Socket 7 support was purchased, you will only
need this instruction manual to set up and run the support.
If you are not familiar with operating microprocessor support packages, you will
need to supplement this instruction manual with information on basic operations
to set up and run the support.
NOTE. The disassembly software is optimized to decode instruction streams and
bus activities from Intel microprocessors and AMD-K6-2 therefore, the disassembler may not support unique characteristics of other manufacturers. However,
you can reliably conduct timing analysis of nonIntel Socket 7 processors. Consult
your Tektronix field office for future enhancements.
Manual Conventions
This manual uses the following conventions:
H The term “disassembler” refers to the software that decodes bus cycles into
instruction mnemonics and cycle types.
H A pound sign (#) following a signal name indicates an active low signal.
H The phrase “information on basic operations” refers to your online help.
TMS 109A Socket 7 Microprocessor Support
ix
Preface
Contacting Tektronix
Product
Support
Service
Support
For other
information
To write us
Website
For questions about using Tektronix measurement products, call
toll free in North America:
1-800-TEK-WIDE (1-800-835-9433 ext. 2400)
6:00 a.m. – 5:00 p.m. Pacific time
Or contact us by e-mail:
tm_app_supp@tek.com
For product support outside of North America, contact your
local Tektronix distributor or sales office.
Tektronix offers extended warranty and calibration programs as
options on many products. Contact your local Tektronix
distributor or sales office.
For a listing of worldwide service centers, visit our web site.
In North America:
1-800-TEK-WIDE (1-800-835-9433)
An operator will direct your call.
Tektronix, Inc.
P.O. Box 1000
Wilsonville, OR 97070-1000
USA
Tektronix.com
x
TMS 109A Socket 7 Microprocessor Support
Getting Started
Getting Started
This chapter contains information on the TMS 109A Socket 7 microprocessor
support package:
H How to configure the probe adapter
H How to connect to the system under test
H How to apply power to and remove power from the probe adapter
Support Package Description
The TMS 109A Socket 7 microprocessor support package disassembles data
from systems that are based on the Intel Pentium, low-power embedded Pentium
with MMX technology, AMD-K6-2 and Socket 7 microprocessor devices. The
support runs on a compatible Tektronix logic analyzer equipped with a 136-channel module.
A complete list of standard and optional accessories is provided at the end of the
parts list in the Replaceable Parts List chapter.
To use this support efficiently, you must have the items listed in the information
on basic operations (in the online help) and the following items:
H Pentium Processors Family Developer’s Manual, Intel 1997(p/n to be
updated)
H AMD-K6-2 Processor, Data Sheet, AMD, 1999
Information on basic operations is also in your online help.
Logic Analyzer Software Compatibility
The label on the microprocessor support floppy disk states which version of logic
analyzer software the support is compatible with.
Logic Analyzer Configuration
To use the TMS 109A Socket 7 support package, the Tektronix logic analyzer
must be equipped with a 136-channel module at a minimum.
TMS 109A Socket 7 Microprocessor Support
1–1
Getting Started
Refer to information on basic operations to determine how many modules and
probes your logic analyzer needs to meet the minimum channel requirements for
the TMS 109A Socket 7 microprocessor support.
Requirements and Restrictions
You should review the general requirements and restrictions of microprocessor
supports in the information on basic operations as they pertain to your system
under test.
You should also review electrical, environmental, and mechanical specifications
in the Specifications chapter in this manual as they pertain to your system under
test, as well as the following descriptions of other Socket 7 support requirements
and restrictions.
System Clock Rate. The TMS 109A Socket 7 support can acquire data from the
Socket 7 microprocessors at bus speeds of up to 100 MHz; the tested clock speed
is 100 MHz. This specification is valid at the time this manual was printed.
Contact your Tektronix sales representative for current information on the fastest
devices supported.
System Under Test Power. Whenever the system under test is powered off, be sure
to remove power from the probe adapter. Refer to Applying and Removing Power
on page 1–13 for information on how to remove power from the probe adapter.
Disabling the Instruction Cache. To disassemble acquired data, you must disable
the internal instruction cache. Disabling the cache makes all instruction
prefetches visible on the bus so they can be acquired and disassembled.
Cache Invalidation Cycles. Cache Invalidation addresses are not acquired.
Bus Hold Cycles. Bus Hold cycles are not acquired while the RESET signal is
active.
AHOLD Signal. If the AHOLD signal is active (high) during a Writeback cycle (a
four cycle Burst Write), the acquired address is undefined.
Burst Cycles. The Socket 7 microprocessor expects the memory system to
increment addresses during a Burst cycle. When viewing disassembled data, the
disassembler synthesizes the addresses. When viewing state data, the addresses
appear to be identical.
1–2
TMS 109A Socket 7 Microprocessor Support
Getting Started
Probe Mode Cycles. Probe Mode cycles are not identified.
Directory T able and Descriptor Table Reads and Writes. These reads and writes are
not disassembled.
Bus Anomalies. Some combinations of instructions and operating modes of the
microprocessor can cause additional cycles to be fetched. This behavior is
unpredictable, not documented, and can cause the disassembler to operate
incorrectly with fetched cycles. This is most likely to occur during Floating Point
operations.
AMD-K6-2 processor has a out-of-order fetch mechanism. For fetches, AMD
always loads 32 bytes, starting from the most significant octabyte (octet) in the
block. For example these addresses 00, 08, 10, and18 would be fetched in this
order 18, 10, 08, and 00. Regardless of what the critical word is or if the cache is
enabled. For the disassembler to work properly it needs these 32 byte fetch
blocks or the disassembly will be incorrect.
Nonintrusive Acquisition. The Socket 7 microprocessor support will not intercept,
modify, or present signals back to the system under test.
Functionality Not Supported
Reads/Writes. The TMS 109A Socket 7 support package does not interpret
directory or descriptor tables for reads/writes. When long jumps and calls are
executed you may need to supply a code-segment size (see page 2–18), and the
first opcode byte using the Mark Opcode function (see page 2–25).
TMS 109A Socket 7 Microprocessor Support
1–3
Getting Started
Configuring the Probe Adapter
There are five jumpers on the probe adapter. Table 1–1 lists the jumper positions
and functions.
T able 1–1: Jumper positions and function
Probe adapter Position Function
J240
MFG_TEST
J250
CLK
J900
Proc Sel
J910
D/P#
J920
Tracking
J921
SYNTH
1–2
OPEN
1–2
2–3
1–2
2–3
1–2
OPEN
1–2
2–3
1–2
2–3
When the processor extends the clock speed to below 40 MHz, the jumpered pins 1-2
turn the phased lock loop into a buffer that disables the phased lock loop signal.
Default, phased look loop signal enabled
Extends the Socket 7 microprocessor system speed between 40–150 MHz
Extends the Socket 7 microprocessor system speed between 20–75 MHz
Supports microprocessors that do not have the D/P# pin.
Supports microprocessors that have the D/P# pin.
Acquires the D/P# signal from pin AE35 of the socket being probed.
Acquires the D/P# signal from an external source. If this jumper is left open, you must
route the D/P# signal to pin 1 of this jumper from an external source. This allows you to
probe your system from the Dual socket as long as the D/P# signal is accessible on the
system board. Ensure that the jumper J900 is in position 2–3 before routing the D/P#
signal to pin 1 of J910.
Enables tracking of burst and pipelined cycles while BOFF# and HLDA are asserted
Disables tracking of burst and pipelined cycles while BOFF# and HLDA are asserted.
This setting can be used if an external master’s signal timing is different from that of the
P54C.
Enable Address Synthesis (A(2:0) are derived from BE(7:0)#)
Disable Address Synthesis (A(2:0)=0)
1–4
MFG_TEST Jumper
To acquire data at frequencies below 40 MHz on the probe adapter, short the two
pins on J240. This disables the phased lock loop signal to all clocked components. Figure 1–1 shows the location of J240 on the probe adapter.
TMS 109A Socket 7 Microprocessor Support
Getting Started
CLK Jumper
The CLK jumper (J250 on the probe adapter) should be placed in the 40–150
MHz position to acquire data from a system running at or faster than 45 MHz.
The jumper should be placed in the 20–75 MHz position to acquire data from a
system running slower than 45 MHz. Figure 1–1 shows the location of J250 on
the probe adapter.
J240
MFG_TEST
J250
CLK
Processor Selection
Jumper
D/P# Signal Jumper
J900
Proc Sel
J910
D/P#
J920
Tracking
J921
SYNTH
Figure 1–1: Jumper locations on the probe adapter
Place the Processor Selection jumper, J900, in the 1–2 position to support
microprocessors that do not have the D/P# pin.
Place the Processor Selection jumper in the 2–3 position to support microprocessors that have the D/P#. Figure 1–1 shows the location of J900 on the probe
adapter.
When the D/P# signal jumper J910 on the probe adapter is in the 1– 2 position,
the D/P# signal is acquired from pin AE35 of the socket being probed. Figure
1–1 shows the location of J910 on the probe adapter.
TMS 109A Socket 7 Microprocessor Support
1–5
Getting Started
When the jumper is open (not connected), the Socket 7 support acquires the D/P#
signal from an external source, and you will have to route the D/P# signal to pin
1 of this jumper externally. This allows you to probe your system from the dual
socket as long as the D/P# signal is accessible on the system under test.
Tracking Jumper
Address Synthesis
Jumper
The Tracking jumper J920 on the probe adapter (see Figure 1–1) does not need to
be moved from the default position (pins 1–2 connected).
The only time this jumper should be moved is when the tracking circuitry
malfunctions. An indication of such a malfunction is when you see activity on
the bus during a BOFF or HLDA cycle that is uncharacteristic of the Socket 7
microprocessor. When the jumper is in the 2–3 position, the circuitry on the
probe adapter does not track BOFF and HLDA cycles. A data sample will show
that such a cycle occurred, but it will not contain meaningful information.
When the Address Synthesis jumper (J921 on the probe adapter) is in position
1–2, A(2:0) is derived from the BE(7:0)# signals and stored in the acquisition
memory with the rest of the address.
When the jumper is in position 2–3, it disables address synthesis, A(2:0)=0.
Figure 1–1 shows the location of J921 on the probe adapter.
Connecting to a System Under Test
Before you connect to the system under test, you must connect the probes to the
module. Your system under test must also have a minimum amount of clearance
surrounding the microprocessor to accommodate the probe adapter. Refer to the
Specifications chapter in this manual for the required clearances.
Connect the P6434 Probes
to the Probe Adapter
1–6
To connect the logic analyzer to a system under test using a probe adapter, follow
these steps:
1. Power off your system under test. It is not necessary to power off the logic
analyzer.
CAUTION. To prevent static damage to the microprocessor, the probe adapter, the
probes, and the module, handle in a static-free environment. Static discharge can
damage all the above components.
Always wear a grounding wrist strap or similar device while handling the
microprocessor and probe adapter.
TMS 109A Socket 7 Microprocessor Support
Getting Started
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. Then, touch any of the ground pins of the
probe adapter to discharge stored static electricity from the probe adapter.
3. Connect the P6434 probes to the probe adapter as shown in Figure 1–2.
Match the channel groups and numbers on the probe labels to the corre-
sponding pins on the probe adapter. Match the ground pins on the probes to
the corresponding pins on the probe adapter.
CAUTION. To prevent damage to the probe and probe adapter, always position the
probe perpendicular to the mating connector and gently connect the probe.
Incorrect handling of the P6434 probe while connecting it to the probe adapter
can result in damage to the probe or to the mating connector on the probe
adapter.
4. Position the probe tip perpendicular to the mating connector and gently
connect the probe (see Figure 1–2).
Push down to latch after
probe is connected
Pin 1
Pin 1
Figure 1–2: Connecting a probe to the probe adapter
Push down to latch after
probe is connected
5. When connected, push down the latch releases on the probe to set the latch.
Remove the
Microprocessor
6. Follow the procedure from the Socket 7 microprocessor vendor to remove
the microprocessor from the socket on your system under test.
TMS 109A Socket 7 Microprocessor Support
1–7
Getting Started
Choose a Protective
Socket
7. Choose the correct protective socket.
Choose the 321-pin or 296-pin protective socket depending on the processor
pinout (see Figure 1–3).
NOTE. Use one protective socket at a time. Do not install a protective socket
without removing all existing sockets from the system under test and from the
bottom of the probe adapter assembly.
For the 321 pin processor
Fro the 296 pin processor
Black holes
are no pins
Figure 1–3: Protective sockets
8. Align the A3 pin indicator on the protective socket with A3 pin of the socket
on your system under test.
9. Insert the protective socket into the system under test as shown in
Figure 1–4.
10. Align the A3 pin indicator on the probe adapter with the A3 pin indicator on
the installed protective socket.
1–8
TMS 109A Socket 7 Microprocessor Support
Getting Started
Insert Probe Adapter
11. Insert the probe adapter into the installed protective socket as shown in
Figure 1–4.
Pin A3
Pin A3
Protective
socket
System under test
Figure 1–4: Placing the socket and probe adapter onto the system under test
TMS 109A Socket 7 Microprocessor Support
1–9
Getting Started
CAUTION. To prevent permanent damage to the micropr ocessor once power is
applied, correctly place the microprocessor into the probe adapter.
Insert Microprocessor in
the Probe Adapter
12. Insert the microprocessor into the probe adapter as shown in Figure 1–5.
Microprocessor
Pin A3
System under test
Alternate Connections
ITP
1–10
Figure 1–5: Inserting a microprocessor into the probe adapter
13. Apply forced air cooling across the probe adapter to keep the components on
the probe adapter cool.
NOTE. Refer to the Intel document ITP700 Port Users Guide for more informa-
tion on the ITP interface.
The Socket 7 probe adapter provides an ITP square-pin header (J580) to connect
to the In-Target Probing (ITP) debugging hardware on the probe adapter as
shown in Figure 1–6 on page 1–12. Table 1–2 lists the signals on the connector
(J580). The ITP debugging hardware is not included with this TMS 109A Socket 7 hardware support package. Contact your microprocessor vendor for
information on how to obtain the ITP debugging hardware.
TMS 109A Socket 7 Microprocessor Support
Getting Started
NOTE. The ITP connection is implemented as a point-to-point connection. As
such, it cannot be used in a loopthrough mode for programming other Socket 7
modules.
Table 1–2 lists the pin-to-signal assignments of the In-Target Probe (ITP)
connector J580 on the probe adapter.
T able 1–2: ITP (J580) signal Information
Pin number Signal name
1 B_INIT
2 DBRESET
3 B_RESET
4 GND
5 –
6 +3.3 V
7 R_S#
8 GND
9 –
10 GND
11 PRDY
12 TDI
13 TDO
14 TMS
15 GND
16 TCK
17 GND
18 TRST#
19 –
20 –
These channels are not defined in any channel group and data acquired from
them is not displayed. To display data, you will need to define a channel group.
TMS 109A Socket 7 Microprocessor Support
1–11
Getting Started
J260, ITP
reset signal
J580, ITP
connector
Figure 1–6: ITP and system reset pin locations on the probe adapter
Optional System Reset. The ITP circuitry on the Interposer board does not allow
external ITP debugging hardware to induce a system reset through the
DBRESET# signal on the ITP connector. If you need to enable this feature, you
must provide the connection to your system under test. Table 1–3 lists the signals
on J260 and Figure 1–6 shows the location.
T able 1–3: J260 jumper pin assignments
Jumper pin number Socket 7 signal name
1 OC_DBRESET# (Open
Collector, active low version
of DBRESET)
2 NC
3 DBRESET
The probe adapter contains pins that allow you to connect the DBRESET (or the
active low, open collector version OC_DBRESET#) signal to your system under
test. Table 1–3 shows the pins and signals you can connect to on J260 on the
probe adapter.
When using these signals, you need to make sure that the system under test is not
driving the OC_DBRESET# or DBRESET signal.
1–12
Check that the R/S#, TDI, TMS, TCLK, and TRST# signals are not driven. If
this is not possible, you may clip these five pins on one of the sacrificial sockets
TMS 109A Socket 7 Microprocessor Support
provided with the probe adapter. Inserting this modified socket into your system
socket will isolate these signals on the probe adapter for use by the ITP cable.
Applying and Removing Power
A power supply for the Socket 7 probe adapter is included with the support. The
power supply provides +5 volts power to the probe adapter. The center connector
of the power jack connects to Vcc.
NOTE. Whenever the system under test is powered off, be sure to remove power
from the probe adapter.
To apply power to the Socket 7 probe adapter and system under test, follow these
steps:
CAUTION. To prevent possible permanent damage to the probe adapter and
Socket 7 microprocessor., use the +5 V power supply provided by Tektronix. Do
not mistake another power supply that looks similar for the +5 V power supply.
Getting Started
1. Connect the +5 V power supply to the jack on the probe adapter. Figure 1–7
shows the location of the jack on the probe adapter.
CAUTION. To prevent possible permanent damage to the Socket 7 microprocessor
and system under test, apply power to the probe adapter before applying power
to your system under.
2. Plug the power supply for the probe adapter into an electrical outlet.
3. Power on the system under test.
TMS 109A Socket 7 Microprocessor Support
1–13
Getting Started
Channel Assignments
Power jack
Figure 1–7: Power jack location on the probe adapter
Channel assignments shown in Tables 1–4 through 1–10 use the following
conventions:
H A pound sign (#) following a signal name indicates an active low signal.
H All signals are required by the support unless indicated otherwise.
H An equals sign (=) following a signal name indicates that it is double probed.
H Channels are shown starting with the most significant bit (MSB) descending
to the least significant bit (LSB).
The channel group assignment tables for disassembly and Timing are Address,
Data, Data_Lo, Control, DataSize, Cache, and Misc.
Table 1–4 lists the probe section and channel assignments for the Address group
and the microprocessor signal for each channel connect. By default the Address
channel group assignments are displayed in hexadecimal.
T able 1–4: Address channel group assignments
Bit
order
31 A3:7 A31
Section:channel
Socket 7
signal name
1–14
30 A3:6 A30
29 A3:5 A29
28 A3:4 A28
TMS 109A Socket 7 Microprocessor Support
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