Tektronix TMS109 Instruction Manual
Instruction Manual
TMS 109
P54 & P55 Microprocessor Support
070-9811-00
There are no current European directives that
apply to this product. This product provides
cable and test lead connections to a test object of
electronic measuring and test equipment.
Warning
The servicing instructions are for use by
qualified personnel only. To avoid personal
injury, do not perform any servicing unless you
are qualified to do so. Refer to all safety
summaries prior to performing service.
Copyright T ektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and are
protected by United States copyright laws and international treaty provisions.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the
Rights in T echnical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the
Commercial Computer Software – Restricted Rights clause at F AR 52.227-19, as applicable.
T ektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material. Specifications and price change privileges reserved.
Printed in the U.S.A.
T ektronix, Inc., P.O. Box 1000, Wilsonville, OR 97070–1000
TEKTRONIX and TEK are registered trademarks of T ektronix, Inc.
SOFTWARE WARRANTY
T ektronix warrants that the media on which this software product is furnished and the encoding of the programs on
the media will be free from defects in materials and workmanship for a period of three (3) months from the date of
shipment. If a medium or encoding proves defective during the warranty period, T ektronix will provide a
replacement in exchange for the defective medium. Except as to the media on which this software product is
furnished, this software product is provided “as is” without warranty of any kind, either express or implied.
T ektronix does not warrant that the functions contained in this software product will meet Customer’s
requirements or that the operation of the programs will be uninterrupted or error-free.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period. If T ektronix is unable to provide a replacement that is free from defects in materials and
workmanship within a reasonable time thereafter, Customer may terminate the license for this software product
and return this software product and any associated materials for credit or refund.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPLACE DEFECTIVE MEDIA OR REFUND CUSTOMER’S PAYMENT IS
THE SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS
WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER
TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH
DAMAGES.
HARDWARE WARRANTY
T ektronix warrants that the products that it manufactures and sells will be free from defects in materials and
workmanship for a period of one (1) year from the date of shipment. If a product proves defective during this
warranty period, T ektronix, at its option, either will repair the defective product without charge for parts and labor,
or will provide a replacement in exchange for the defective product.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period and make suitable arrangements for the performance of service. Customer shall be
responsible for packaging and shipping the defective product to the service center designated by T ektronix, with
shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a
location within the country in which the T ektronix service center is located. Customer shall be responsible for
paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. T ektronix shall not be obligated to furnish service under this warranty a) to repair damage
resulting from attempts by personnel other than T ektronix representatives to install, repair or service the product;
b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any
damage or malfunction caused by the use of non-T ektronix supplies; or d) to service a product that has been
modified or integrated with other products when the effect of such modification or integration increases the time
or difficulty of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE AND
EXCLUSIVE REMEDY PROVIDED TO THE CUST OMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT , SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR
THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
Table of Contents
Getting Started
General Safety Summary vii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Service Safety Summary ix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preface: Microprocessor Support Documentation xi. . . . . . . . . . . . . . . .
Manual Conventions xi. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Documentation xii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacting T ektronix xii. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Support Description 1–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Software Compatibility 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Analyzer Configuration 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Requirements and Restrictions 1–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuring the Probe Adapter 1–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CLK Jumper 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disassembly/Timing Jumper 1–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tracking Jumper 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Address Synthesis Jumper 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D/P# Signal Jumper 1–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting to a System Under T est 1–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Conventional Probe Adapter 1–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-Profile Probe Adapter with a High-Density Probe 1–10. . . . . . . . . . . . . . . .
Applying and Removing Power 1–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Basics
Setting Up the Support 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Channel Group Definitions 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking Options 2–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Symbols 2–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acquiring and Viewing Disassembled Data 2–5. . . . . . . . . . . . . . . . . . . . .
Acquiring Data 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing Disassembled Data 2–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hardware Display Format 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software Display Format 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Flow Display Format 2–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Display Format 2–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing How Data is Displayed 2–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Optional Display Selections 2–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dual Microprocessors Execution Tracing 2–12. . . . . . . . . . . . . . . . . . . . . . . . . . .
Branch Trace Messages 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out-Of-Order Fetches 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Speculative Prefetch Cycles 2–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cache Invalidation Cycles 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Burst Cycles 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Management Mode (SMM) 2–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MMX Instruction Set 2–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
i
Table of Contents
Specifications
Maintenance
Marking Cycles 2–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Displaying Exception Vectors 2–18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Viewing an Example of Disassembled Data 2–20. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Probe Adapter Description 3–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifications 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Differences 3–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Component Mode 3–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip Set Mode 3–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
How Data is Acquired 3–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Custom Clocking 3–17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking Options 3–19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Alternate Microprocessor Connections 3–21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signals Not On the Probe Adapter 3–23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Extra Channels 3–23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signals on the High-Density Probe 3–24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Probe Adapter Circuit Description 4–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Replacing Signal Leads 4–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Replacing Protective Sockets 4–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Replacing the Fuse 4–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Replaceable Electrical Parts
Parts Ordering Information 5–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Replaceable Electrical Parts List 5–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Replaceable Mechanical Parts
Parts Ordering Information 6–1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Replaceable Mechanical Parts List 6–1. . . . . . . . . . . . . . . . . . . . . . . . . . .
Index
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TMS 109 P54 & P55 Microprocessor Support Instruction Manual
List of Figures
Table of Contents
Figure 1–1: Jumper locations on the conventional probe adapter 1–5. . .
Figure 1–2: Jumper locations on the low-profile probe adapter 1–5. . . .
Figure 1–3: Placing a microprocessor into the conventional probe
adapter 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–4: Connecting probes to the conventional probe
adapter 1–9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–5: Placing the conventional probe adapter onto the
SUT 1–10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–6: Placing a microprocessor into the low-profile probe
adapter 1–11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–7: Placing the low-profile probe adapter onto the SUT 1–12. . . .
Figure 1–8: Connecting clock and channel probes to a high-density
probe 1–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–9: Connecting LO and HI cables to a high-density
probe 1–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–10: Power jack location on the conventional probe
adapter 1–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1–11: Power jack location on the low-profile probe
adapter 1–16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–1: Hardware display format 2–8. . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–2: Data displayed from the Primary and Dual
microprocessors 2–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–3: Disassembled data displayed from the Primary
microprocessor only 2–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–4: Disassembled data displayed from the Dual
microprocessor only 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–5: Display of target and source Branch Trace
Messages 2–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2–6: Speculative Prefetch cycles 2–16. . . . . . . . . . . . . . . . . . . . . . . .
Figure 3–1: Dimensions of the low-profile probe adapter 3–5. . . . . . . . . .
Figure 3–2: Dimensions of the conventional probe adapter 3–6. . . . . . . .
Figure 3–3: Nonpipelined single and Burst Transfer cycles 3–18. . . . . . . .
Figure 3–4: Pipelined cycles 3–19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 3–5: Location of J1140 and J1150 on the conventional
probe adapter 3–22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 3–6: Location of J1700 and J1701 on the low-profile
probe adapter 3–22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
iii
Table of Contents
List of Tables
Figure 4–1: Location of the fuse on the conventional probe
adapter 4–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4–2: Location of the fuse on the low-profile probe
adapter 4–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–1: Jumper positions and function 1–3. . . . . . . . . . . . . . . . . . . . . .
Table 1–2: Disassembly/Timing jumper information 1–4. . . . . . . . . . . . .
Table 1–3: Probe adapter exceptions for the 136-channel
module 1–8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 1–4: High-density probe exceptions for the 136-channel
module 1–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–1: Control group symbol table definitions 2–2. . . . . . . . . . . . . . .
Table 2–2: Meaning of special characters in the display 2–6. . . . . . . . . .
Table 2–3: Cycle type definitions 2–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 2–4: Trace Processor and Other Processor field selections 2–12. . .
Table 2–5: Exception vectors for Real Addressing mode 2–18. . . . . . . . . .
Table 2–6: Exception vectors for Protected Addressing mode 2–19. . . . . .
Table 3–1: Jumper positions and function 3–2. . . . . . . . . . . . . . . . . . . . . .
Table 3–2: Electrical specifications 3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–3: Environmental specifications 3–4. . . . . . . . . . . . . . . . . . . . . . .
Table 3–4: Certifications and compliances 3–4. . . . . . . . . . . . . . . . . . . . . .
Table 3–5: Address group channel assignments 3–8. . . . . . . . . . . . . . . . . .
Table 3–6: Data group channel assignments 3–9. . . . . . . . . . . . . . . . . . . . .
Table 3–7: Data_Lo group channel assignments 3–10. . . . . . . . . . . . . . . . .
Table 3–8: Control group channel assignments 3–11. . . . . . . . . . . . . . . . . .
Table 3–9: DataSize group channel assignments 3–12. . . . . . . . . . . . . . . . .
Table 3–10: 136-channel module: Cache group channel
assignment 3–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–11: 136-channel module: Misc group channel
assignments 3–12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–12: 192-channel module: Cache group channel
assignments 3–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–13: 192-channel module: Debug group channel
assignments 3–13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–14: 192-channel module: APIC group channel
assignments 3–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Table of Contents
Table 3–15: 192-channel module: Priv_Bus group channel
assignments 3–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–16: 192-channel module: Parity group channel
assignments 3–14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–17: 192-channel module: Misc group channel
assignments 3–15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–18: Clock channel assignments 3–16. . . . . . . . . . . . . . . . . . . . . . . .
Table 3–19: P54/P55 signals on J1140/J1700 3–21. . . . . . . . . . . . . . . . . . . .
Table 3–20: J1150/J1701 jumper pin assignments 3–23. . . . . . . . . . . . . . .
Table 3–21: Extra channels 3–24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 3–22: 136-channel module: Signals on the high-density
probe 3–24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 4–1: Microprocessor signal delays when using the probe
adapter 4–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
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Table of Contents
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TMS 109 P54 & P55 Microprocessor Support Instruction Manual
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
To Avoid Fire or
Personal Injury
Use Proper Power Cord. Use only the power cord specified for this product and
certified for the country of use.
Connect and Disconnect Properly . Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and marking on the product. Consult the product manual for further ratings
information before making connections to the product.
Do not apply a potential to any terminal, including the common terminal, that
exceeds the maximum rating of that terminal.
Use Proper AC Adapter. Use only the AC adapter specified for this product.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Use Proper Fuse. Use only the fuse type and rating specified for this product.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry .
Provide Proper Ventilation. Refer to the manual’s installation instructions for
details on installing the product so it has proper ventilation.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
vii
General Safety Summary
Symbols and Terms
T erms in this Manual. These terms may appear in this manual:
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
T erms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
Symbols on the Product. The following symbols may appear on the product:
WARNING
High Voltage
Protective Ground
(Earth) T erminal
CAUTION
Refer to Manual
Double
Insulated
viii
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Service Safety Summary
Only qualified personnel should perform service procedures. Read this Service
Safety Summary and the General Safety Summary before performing any service
procedures.
Do Not Service Alone. Do not perform internal service or adjustments of this
product unless another person capable of rendering first aid and resuscitation is
present.
Disconnect Power. To avoid electric shock, disconnect the main power by means
of the power cord or, if provided, the power switch.
Use Care When Servicing With Power On. Dangerous voltages or currents may
exist in this product. Disconnect power, remove battery (if applicable), and
disconnect test leads before removing protective panels, soldering, or replacing
components.
To avoid electric shock, do not touch exposed connections.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
ix
Service Safety Summary
x
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Preface: Microprocessor Support Documentation
This instruction manual contains specific information about the TMS 109
P54/P55 microprocessor support and is part of a set of information on how to
operate this product on compatible Tektronix logic analyzers.
If you are familiar with operating microprocessor supports on the logic analyzer
for which the TMS 109 P54/P55 support was purchased, you will probably only
need this instruction manual to set up and run the support.
If you are not familiar with operating microprocessor supports, you will need to
supplement this instruction manual with information on basic operations to set up
and run the support.
Information on basic operations of microprocessor supports is included with each
product. Each logic analyzer has basic information that describes how to perform
tasks common to supports on that platform. This information can be in the form
of online help, an installation manual, or a user manual.
This manual provides detailed information on the following topics:
H Connecting the logic analyzer to the system under test
Manual Conventions
H Setting up the logic analyzer to acquire data from the system under test
H Acquiring and viewing disassembled data
H Using the probe adapter
This manual uses the following conventions:
H The term disassembler refers to the software that disassembles bus cycles
into instruction mnemonics and cycle types.
H The phrase “information on basic operations” refers to online help, an
installation manual, or a basic operations of microprocessor supports user
manual.
H In the information on basic operations, the term XXX used in field selections
and file names must be replaced with P54C. This is the name of the
microprocessor in field selections and file names you must use to operate the
P54/P55 support.
H The term system under test (SUT) refers to the microprocessor-based system
from which data will be acquired.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
xi
Preface: Microprocessor Support Documentation
H The term logic analyzer refers to the Tektronix logic analyzer for which this
product was purchased.
H The term module refers to a 136-channel or a 192-channel module.
H P54/P55 refers to all supported variations of the P54 and P55 micropro-
cessors unless otherwise noted.
H A pound sign (#) following a signal name indicates an active low signal.
Logic Analyzer Documentation
A description of other documentation available for each type of Tektronix logic
analyzer is located in the corresponding module user manual. The manual set
provides the information necessary to install, operate, maintain, and service the
logic analyzer and associated products.
Contacting Tektronix
Product
Support
Service
Support
For other
information
To write us Tektronix, Inc.
For application-oriented questions about a Tektronix measurement product, call toll free in North America:
1-800-TEK-WIDE (1-800-835-9433 ext. 2400)
6:00 a.m. – 5:00 p.m. Pacific time
Or, contact us by e-mail:
tm_app_supp@tek.com
For product support outside of North America, contact your
local Tektronix distributor or sales office.
Contact your local Tektronix distributor or sales office. Or, visit
our web site for a listing of worldwide service locations.
http://www.tek.com
In North America:
1-800-TEK-WIDE (1-800-835-9433)
An operator will direct your call.
P.O. Box 1000
Wilsonville, OR 97070-1000
xii
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Getting Started
Getting Started
Support Description
This chapter provides information on the following topics and tasks:
H A description of the TMS 109 microprocessor support package
H Logic analyzer software compatibility
H Your system under test requirements
H Support restrictions
H How to configure the probe adapter
H How to connect to the system under test (SUT)
H How to apply power to and remove power from the probe adapter
The TMS 109 microprocessor support package disassembles data from systems
that are based on the Intel P54C, P54CM, P55C, and P55CM microprocessors.
The support runs on a compatible Tektronix logic analyzer equipped with a
136-channel module or a 192-channel module.
Refer to information on basic operations to determine how many modules and
probes your logic analyzer needs to meet the minimum channel requirements for
the TMS 109 microprocessor support.
The TMS 109 supports the P54C, P54CM, P55C, and P55CM microprocessors in
a 296-pin PGA package.
The low-profile probe adapter requires a 192-Channel High-Density Probe to
make connections from the logic analyzer to your SUT.
A complete list of standard and optional accessories is provided at the end of the
parts list in the Replaceable Mechanical Parts chapter.
To use this support efficiently, you need to have the items listed in the information on basic operations as well as the P54/P55 Microprocessor User’s Manual,
Intel, 1997.
Information on basic operations also contains a general description of supports.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
1–1
Getting Started
Logic Analyzer Software Compatibility
The label on the microprocessor support floppy disk states which version of logic
analyzer software the support is compatible with.
Logic Analyzer Configuration
To use the TMS 109 support, the Tektronix logic analyzer must be equipped with
either a 136-channel module or a 192-channel module at a minimum. The
module must be equipped with enough probes to acquire clock and channel data
from signals in your P54/P55-based system.
Refer to information on basic operations to determine how many modules and
probes the logic analyzer needs to meet the channel requirements.
Requirements and Restrictions
You should review the general requirements and restrictions of microprocessor
supports in the information on basic operations as they pertain to your SUT.
You should also review electrical, environmental, and mechanical specifications
in the Specifications chapter in this manual as they pertain to your system under
test, as well as the following descriptions of other P54/P55 support requirements
and restrictions.
System Clock Rate. The TMS 109 support can acquire data from the P54/P55
microprocessor at speeds of up to 66.66 MHz
SUT Power. Whenever the SUT is powered off, be sure to remove power from
the probe adapter. Refer to Applying and Removing Power at the end of this
chapter for information on how to remove power from the probe adapter.
Disabling the Instruction Cache. To disassemble acquired data, you must disable
the internal instruction cache. Disabling the cache makes all instruction
prefetches visible on the bus so they can be acquired and disassembled.
Cache Invalidation Cycles. Cache Invalidation addresses are not acquired.
1
.
1–2
Bus Hold Cycles. Bus Hold cycles are not acquired while the RESET signal is
active.
1
Specification at time of printing. Contact your Tektronix sales representative for
current information on the fastest devices supported.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Getting Started
AHOLD Signal. If the AHOLD signal is active (high) during a Writeback cycle (a
four cycle Burst Write), the acquired address is undefined.
Burst Cycles. The P54/P55 microprocessor expects the memory system to
increment addresses during a Burst cycle. When viewing disassembled data, the
disassembler synthesizes the addresses. When viewing state data, the addresses
appear to be identical.
Probe Mode Cycles. Probe Mode cycles are not identified.
Directory T able and Descriptor Table Reads and Writes. These reads and writes are
not disassembled.
Bus Anomalies. Some combinations of instructions and operating modes of the
microprocessor can cause additional cycles to be fetched. This behavior is
unpredicatable, not documented, and can cause the disassembler to misinterpret if
fetched cycles were or were not executed. This is most likely to occur during
Floating Point operations.
Configuring the Probe Adapter
There are five jumpers on each probe adapter. Table 1–1 lists the jumper
positions and functions.
T able 1–1: Jumper positions and function
Conventional
probe adapter
J1 155 J1501 1–2
J1 160 J1500 1–2
J1 165 J1401 1–2
Low-profile
probe adapter
Position Function
Match the P54/P55 microprocessor system speed at 40–80 MHz
2–3
2–3
2–3
Match the P54/P55 microprocessor system speed at 25–50 MHz
Configure probe adapter for Custom clocking (disassembly)
Configure probe adapter for timing analysis
Enable tracking of burst and pipelined cycles while BOFF# and HLDA are asserted
Disable tracking of burst and pipelined cycles while BOFF# and HLDA are asserted. This
setting can be used if an external master’s signal timing is different from that of the P54C.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
1–3
Getting Started
T able 1–1: Jumper positions and function (cont.)
Conventional
probe adapter
J1 170 J1400 1–2
J1340 J1404 1–2
Low-profile
probe adapter
2–3
OPEN
CLK Jumper
Disassembly/Timing
Jumper
FunctionPosition
Enable Address Synthesis (A(2:0) are derived from BE(7:0)#)
Disable Address Synthesis (A(2:0)=0)
Acquire the D/P# signal from pin AE35 of the socket being probed
Acquire the D/P# signal from an external source. If this jumper is left open, you must
route the D/P# signal to pin 1 of this jumper from an external source. This allows you to
probe your system from the Dual socket as long as the D/P# signal is accessible on the
system board.
The CLK jumper (J1155 on the conventional probe adapter or J1501 on the
low-profile probe adapter) should be placed in the ≥45 position to acquire data
from a system running at or faster than 45 MHz. The jumper should be placed in
the <45 position to acquire data from a system running slower than 45 MHz.
Figure 1–1 shows the location of J1155 on the conventional probe adapter;
Figure 1–2 shows the location of J1501 on the low-profile probe adapter.
The Disassembly/Timing jumper (J1160 on the conventional probe adapter or
J1500 on the low-profile probe adapter) should be placed in the D position to
acquire disassembled data and in the T position to acquire timing data.
Table 1–2 shows how to position this jumper depending on the type of clocking
you are using and the type of display you want to view.
T able 1–2: Disassembly/T iming jumper information
J1160/J1500 position Clocking Data window
D (Disassembly)
T (Timing) Internal Waveform window, or Timing
Custom Listing window, Disassembly,
State, or Graph displays
display
External Waveform window , Listing
window, or Timing display
Figure 1–1 shows the location of J1160 on the conventional probe adapter;
Figure 1–2 shows the location of J1500 on the low-profile probe adapter.
1–4
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
J1170
Getting Started
J1340
J1155
J1160
J1165
Figure 1–1: Jumper locations on the conventional probe adapter
J1401
J1400
J1404
J1501
J1500
Figure 1–2: Jumper locations on the low-profile probe adapter
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
1–5
Getting Started
Tracking Jumper
Address Synthesis
Jumper
The Tracking jumper (J1165 on the conventional probe adapter or J1401 on the
low-profile probe adapter) should not need to be moved from the default position
(pins 1 and 2 connected).
The only time this jumper should be moved is when the tracking circuitry
malfunctions. An indication of such a malfunction is when you see activity on
the bus during a BOFF or HLDA cycle that is uncharacteristic of the P54/P55
microprocessor. When the jumper is in the 2, 3 position, the circuitry on the
probe adapter does not track BOFF and HLDA cycles. A data sample will show
that such a cycle occurred but it will not contain meaningful information.
This jumper only affects the probe adapter when the Disassembly/Timing jumper
(J1160 on the conventional probe adapter or J1500 on the low-profile probe
adapter) is in the D position.
Figure 1–1 shows the location of J1165 on the conventional probe adapter;
Figure 1–2 shows the location of J1401 on the low-profile probe adapter.
When the Address Synthesis jumper (J1170 on the conventional probe adapter or
J1400 on the low-profile probe adapter) is in position 1, 2, A(2:0) are derived
from the BE(7:0)# signals and stored in the acquisition memory with the rest of
the address.
D/P# Signal Jumper
When the jumper is in position 2, 3, it disables address synthesis, A(2:0)=0.
Figure 1–1 shows the location of J1170 on the conventional probe adapter;
Figure 1–2 shows the location of J1400 on the low-profile probe adapter.
When the D/P# signal jumper (J1340 on the conventional probe adapter or J1404
on the low-profile probe adapter) is in the 1, 2 position, the D/P# signal is
acquired from pin AE35 of the socket being probed.
When the jumper is open (not connected), it acquires the D/P# signal from an
external source, and you will have to route the D/P# signal to pin 1 of this jumper
externally. This allows you to probe your system from the dual socket as long as
the D/P# signal is accessible on the SUT.
Figure 1–1 shows the location of J1340 on the conventional probe adapter;
Figure 1–2 shows the location of J1404 on the low-profile probe adapter.
1–6
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Connecting to a System Under Test
Before you connect to the SUT, you must connect the probes to the module.
Your SUT must also have a minimum amount of clear space surrounding the
microprocessor to accommodate the probe adapter. Refer to the Specifications
chapter in this manual for the required clearances.
The channel and clock probes shown in this chapter are for a 136-channel
module. The probes will look different if you are using a 192-channel module.
The general requirements and restrictions of microprocessor supports in the
information on basic operations shows the vertical dimensions of a channel or
clock probe connected to square pins on a circuit board.
Getting Started
Conventional Probe
Adapter
To connect the logic analyzer to a SUT using a conventional PGA probe adapter,
follow these steps:
1. Turn off power to your SUT. It is not necessary to turn off power to the logic
analyzer.
CAUTION. Static discharge can damage the microprocessor, the probe adapter,
the probes, or the module. To prevent static damage, handle all of the above only
in a static-free environment.
Always wear a grounding wrist strap or similar device while handling the
microprocessor and probe adapter.
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. Then, touch any of the ground pins of the
probe adapter to discharge stored static electricity from the probe adapter.
3. Place the probe adapter onto the antistatic shipping foam to support the probe
as shown in Figure 1–3. This prevents the circuit board from flexing and the
socket pins from bending.
4. Remove the microprocessor from your SUT.
5. Line up the pin 2B indicator on the probe adapter board with the pin 2B
indicator on the microprocessor.
CAUTION. Failure to correctly place the microprocessor into the probe adapter
might permanently damage the microprocessor once power is applied.
6. Place the microprocessor into the probe adapter as shown in Figure 1–3.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
1–7
Getting Started
Microprocessor
Probe adapter
Foam
Figure 1–3: Placing a microprocessor into the conventional probe adapter
7. Connect the channel and clock probes to the probe adapter as shown in
Figure 1–4. For the 192-channel module, match the channel groups and
numbers on the probe labels to the corresponding HI_ and LO_pins on the
probe adapter. Match the ground pins on the probes to the corresponding pins
on the probe adapter.
For the 136-channel module, match the channel groups and numbers on the
probe labels to the corresponding LO_ pins on the probe apapter. There are
some exceptions; they are shown in Table 1–3.
T able 1–3: Probe adapter exceptions for the 136-channel module
Section Connect to probe adapter pins
E3, E2, E1, E0 HI_A3, HI_A2, HI_A1, HI_A0
C1, C0 HI_C3, HI_C2
1–8
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Getting Started
8-channel probe
and podlet holder
Hold the channel probes by the podlet
holder when connecting them to the
probe adapter. Do not hold them by
the cables or necks of the podlets.
Foam
Clock probe
Figure 1–4: Connecting probes to the conventional probe adapter
Probe adapter
8. Line up the pin 2B indicator on the probe adapter board with the pin 2B
indicator on your SUT.
9. Place the probe adapter onto the SUT as shown in Figure 1–5.
NOTE. You might need to stack one or more replacement sockets between the SUT
and the probe adapter to provide sufficient vertical clearance from adjacent
components. However, keep in mind that this might increase loading, which can
reduce the electrical performance of your probe adapter.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
1–9
Getting Started
SUT socket
Low-Profile Probe Adapter
with a High-Density Probe
Figure 1–5: Placing the conventional probe adapter onto the SUT
If a probe adapter has one or two high-density cables (probe adapter does not
have pins to which the channel and clock probes connect), the probe adapter
requires a high-density probe to make connections between the logic analyzer
and a SUT.
To connect the logic analyzer to a SUT using the low-profile PGA probe adapter
and a high-density probe, follow these steps:
1. Turn off power to your SUT. It is not necessary to turn off power to the logic
analyzer.
CAUTION. Static discharge can damage the microprocessor, the low-profile probe
adapter, the probes, or the module. To prevent static damage, handle all of the
above only in a static-free environment.
Always wear a grounding wrist strap or similar device while handling the
microprocessor and low-profile probe adapter.
1–10
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
Getting Started
2. To discharge your stored static electricity, touch the ground connector located
on the back of the logic analyzer. Then, touch the black foam on the
underside of the probe adapter to discharge stored static electricity from the
probe adapter.
3. Remove the microprocessor from the SUT.
4. Line up the pin 2B indicator on the probe adapter board with the pin 2B
indicator on the microprocessor.
CAUTION. Failure to correctly place the microprocessor into the probe adapter
might permanently damage the microprocessor once power is applied.
5. Place the microprocessor into the probe adapter as shown in Figure 1–6.
Microprocessor
Pin 2B
Figure 1–6: Placing a microprocessor into the low-profile probe adapter
6. Remove the black foam from the underside of the probe adapter.
7. Line up the pin 2B indicator on the probe adapter board with the pin 2B
indicator on the SUT.
8. Place the probe adapter onto the SUT as shown in Figure 1–7.
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
1–11
Getting Started
NOTE. You might need to stack one or more replacement sockets between the SUT
and the probe adapter to provide sufficient vertical clearance from adjacent
components. However, keep in mind this might increase loading, which can
reduce the electrical performance of the probe adapter.
SUT socket
Pin 2B
Figure 1–7: Placing the low-profile probe adapter onto the SUT
9. Connect the clock and channel probes to the high-density probe as shown in
Figure 1–8. For the 192-channel module, match the channel groups and
numbers on the probe labels to the corresponding HI_ and LO_pins on the
high-density probe. Match the ground pins on the probes to the corresponding pins on the probe adapter.
For the 136-channel module, match the channel groups and numbers on the
probe labels to the corresponding LO_ pins on the high-density probe. There
are some exceptions; they are shown in Table 1–4.
T able 1–4: High-density probe exceptions for the 136-channel module
Section Connect to high-density probe pins
E3, E2, E1, E0 HI_A3, HI_A2, HI_A1, HI_A0
C1, C0 HI_C3, HI_C2
1–12
TMS 109 P54 & P55 Microprocessor Support Instruction Manual
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