Tektronix TLA7000 DATASHEET

Tektronix Logic Analyzers

TLA7000 Series Data Sheet

PCI Express Gen1 through Gen3 including Gen3 Protocol to Physical
Layer Analysis for Link Widths from x1 through x16 with up to 8.0 GT/s
Acquisition Rates and up to 16 GB Deep Memory (for x16 Link)

Comprehensive PCI Express Probing Solutions, including Midbus, Slot
Interposer, and Solder-down Connectors

Modular Mainframes provide Flexibility and Expandability

Supports u p to 6,528 Logic Analyzer Channels, 48 Independent Buses

Broad Processor and Bus Support

Applications

FPGA Debug and Verification

Features & Benefits

68/102/136 Channel Logic Ana lyzers with up to 512 Mb Record Length

MagniVu™ Acquisition Technology provides up to 20 ps (50 GHz) Timing
Resolution to Find and Measure Elusive Timing Problems Quickly

Up to 156 ps (6.4 GHz)/512 Mb Record Length Timing Analysis

Up to 1.4 GHz Clock with up to 3.0 Gb/s Data with a Data Valid

of 180 ps for State Acquisition Analysis of High-performance

Window
Synchronous Buses

Glitch and Setup/Hold Triggering and Display Finds and Displays Elusive
Hardware Problems

Transitional Sto rage Extends the Signal Analysis Capture Time for
Signals that Transition Infrequently

aneous State, High-speed Timing, and Analog Ana lysis through

Simult
the Same Probe Pinpoints Elusive Faults

Compression Probing System with 0.5 pF Capacitive Loading Eliminates
Need for Onboard Connectors, Minimizes Intrusion on Circuits, and is

for Differential Signal Applications

Ideal

Trace Problems from Symptom back to Root Cause in Real Time across
Multiple Modules by Viewing Time-correlated Data in a Wide Variety of
Display Formats

MIPI Proto

DDR2 and DDR3 Debug and Verification

Signal Integrity

PCI Express Debug from Protocol Layer to Physical Layer

Processor/Bus Debug and Verification

Embedded Software Integration, Debug, and Verification

Breakthr
Systems A

Tektronix provides breakthrough digital systems analysis tools that enable
digital h
of elusive problems that threaten product development schedules. The
TLA7000 Series provides the speed you need to capture the source of those
elusive problems, plus the visibility you want with large displays and fast
system data throughput, while protecting your investment with compatibility
with all TLA modules.

col Analysis

Silicon Validation
Computer System Validation
Embedded S

ystem Debug and Validation

ough Solutions for Real-time Digital

nalysis

ardware and software designers to capture and analyze the source

Data Sheet

TLA7012 and TLA7016 Mainframes

The TLA7012 Portable and TLA7016 Benchtop mainframes are modular
mainframes t hat accept TLA logic analyzer and pattern generator modules.
The TLA7012 and TLA7016 can be configured as either master or
expansion ma in
high channel-count requirements.

The TLA7012 Po
with the TLAPC1 Benchtop Controller are built on a Microsoft Wind ows XP
Professional PC platform that offers a familiar work environment for the TLA
application software. They provide multiple display capability for extended
desktop viewing, in addition to an internal DVD-RW, hard drive, and multiple
USB 2.0 ports for expansion. A replaceable hard drive is standard on both
mainframes,
personal setups and data. Trigger in/out connections provide an interface to
other external instrumentation, such as DPO oscilloscopes, for correlating
measurement results.

frames to provide solutions for large numbers of buses and

rtable Mainframe and TLA701 6 Benchtop M ainframe along

ideal for security or enabling individual team members to store

P6800 and P6900 Series Probes

No test and me
industry’s lowest capacitance, t he P6800 and P6900 Series logic analyzer
probes protect the integrity of your signal – critical for connect ing to fast
buses like DDR2 and DDR3 where low intrusion is key to the proper
operation of your design. Select from single-ended and differential probes
and a variety of attachment mechanisms, including the “connectorless”
compressio

For applications where circuit board space is at a premium, the high-density
P6900 Serie

asurement solution is complete without probing. With the

n connection that eliminates the need for onboard connectors.

swithD-Max

®

Probing Technology offers the industry’s

smallest available footprint. For debugging the signal integrity glitches
common on fast buses, the P6900 Series works with the TLA7Bxx
and TLA7ACx mod
iCapture™ simultaneous digital-analog acquisition. This allows you to
clearly see the time-correlated digital and analog behavior of your design,
without th e extra capacitance and setup time of double-probing.

For differential signaling applications where signal integrity is critical, the
high-fidelity P6980 and P6982 are perfect for those applications where
noise performance is critical. In addition, the P6980 and P6982 can
support the small voltage swings that differential signaling often requires.
The P6962DBL, when used with a TLA7000 Series logic analyzer with
the TLA7Bxx module, supports digital validation and debug of DDR3
memory with data rates up to 1600 mega-transfers per second. For board
designs that do not include high-density probe footprints, the P6960 with
its companion flying leadset provides the flexibility required to meet many
different debug needs.

ules and their iLink™ Tool Set capability to provide

P6700 Series Probes for PCI Express

The P6700 Series probes provide validation engineers with a
comprehensi
slot interposer, and solder-down connectors. With support for PCI Express
Gen3 channel lengths up to 24 in. with 2 connectors, these probes
offer minima l electrical loading with the highest signal fidelity and active
equalization to ensure accurate da ta recovery of closed eyes. All P6700
Series probes feature a graphical lane s wizzling capability for maximum
flexibility

ve set of PCI Express probing solutions, including midbus,

to accommodate unique circuit board layouts.

2 www.tektronix.com

Tektronix Logic Analyzers — TLA7000 Series

TLA7ACx and TLA7Bxx Modules

Today’s digital design engineers face daily pressures to speed new products
to the marketplace. The TLA7ACx and TLA7Bxx Series logic analyzer
modules answer the need with breakthrough solutions for the entire design
team, providin
digital system operation in order to debug, verify, optimize, and validate
digital systems. Hardware developers, hardware/software integrators, and
embedded software developers will appreciate the range of capabilities of
the TLA7ACx and TLA7Bxx Series logic analyzer modules. Its broad feature
set includes capturing and correlating elusive hardware and software faults;
providing sim
through the same probe; using deep state acquisition to find the cause
of complex problems; real-time, nonintrusive software execution tracing
that correlates to source code and to hardware events; and nonintrusive
connectorless probing.

The TLA7Bxx Series logic analyzer modules offer breakthrough MagniVu™
technology by Tektronix for providing high-speed sampling (up to 50 GHz)
that dramatically changes the way logic analyzers work and enables them
to provide st
offer high-speed state synchronous capture, high-speed timing capture ,
and analog capture through the same set of probes. They capitalize on
MagniVu technology to offer up to 20 ps timing on all channels, glitch and
setup/hold triggering, and display and time stamp that is always on at up to
20 ps resolution.

To compliment the high-performance logic analyzer modules, the TLA7ACx
Series logic analyzer modules offer all the same debug and verification
functional
designer. The TLA7ACx modules offer high-speed state synchronous
capture, high-speed timing capture, and analog capt ure through the same
set of probes. MagniVu technology offering up to 125 ps timing on all
channels, glitch and setup/hold triggering, and display and time stamp that
is always on at 125 ps resolution is available as standard on all models.

g the ability to quickly monitor, capture, and analyze real-time

ultaneous state, high-speed timing, and analog analysis

artling ne w measurement capabilities. The TLA7Bxx modules

ity, but with performance levels more suited to the embedded

TLA7SAxx PCI Express Logic Protocol
Analyzer Modules

PCI Express 3.0 introduces new challenges for validation engineers.
Time-to-market pressures require a solution that can quickly pinpoint
problems. The TLA7SAxx Serie s logic protocol analyzer modules provide
an innovative
protocol from the physical layer to the transaction layer.

Reduce your ti
deep memory in just seconds with rapid disp lay updates enabled by our
industry-leading hardware acceleration. With improved information density
you can then quickly ascertain the health of the system and identify patterns
of interest (errors, specific transactions, ordered sets, etc.) with statistics
using the Summary Profile window. Protocol behavior can be viewed at
the packet an
in a single innovative Transaction window. Further insight into physical
layer details can be gained with the unique Listing window showing packet
details at the symbol level by lane and you can view individual lane activity
correlated with analog wavefo rms from your high-bandwidth oscilloscope in
the Waveform window.

Hardware developers, hardware/software integrators, and embedded
system designers will appreciate the tight integration w ith the Tektronix
Logic A nalyz
time-correlated, multibus analysis on a single display. Cross triggering and
a common global time stamp enables accurate and efficient debugging by
showing e xactly what was happening on one bus relative to another at any
given instant of time. Coupled with the P6700 Series probing solutions,
engineers have flexible options for platform accessibility.

approach to PCI Express validation that spans all layers of the

metoinformationbyviewingandsearchingupto16GB

d transaction level interspersed with physical layer activity

er. This provides visibility of complete system interactions with

Module Timing

TLA7ACx 125 ps (8 GHz)
TLA7Bxx

Resolution

20ps(50GHz) Upto1.4GHz

State Speed

Up to 800 MHz Up to 128 Mb

Memory

Up to 128 Mb

www.tektronix.com 3

Data Sheet

TLA7012 and TLA7016 Characteristics

General

Characteristic Description

Instrument Slots

Expansion Capability The TLA7000 Series mainframes can be used

TLA7012: Hold
TLA7016: Hold

as either master or expansion mainframes
(TL708EX 8-port Instrument Hub and Expander
is required for 3-8 mainframes connected
together using TekLink™ cable)
TLA7012: Up to eight TLA7012 mainframes
canbeused,providingsupportforupto16TLA
modules (2,176 channels)
TLA7016: Up to eight TLA7016 mainframes
canbeused,providingsupportforupto48TLA
modules (6,528 channels)

TLA7012 PC Characteristics

Characteristic Description

Operating System Microsoft®Windows®XP Professional and

Processor

Chipset Intel®9

Memory

Sound Line In and Mic Out connectors

RemovableHardDrive

cal Drive

Opti

External Display Port
Type

External Display
Resolution

Network Port

USB 2.0 Port Seven (7); three (3) in front and four (4) in rear

Multilingual User Interface Pack

2 GHz Intel

1 GB DDR PC 533 MHz (SODIMM), expandable
to 2 GB DDR memory

3.5 in., ≥80 GB Serial ATA, 7200 RPM

rnal 4.7 GB DVD±R/RW

Inte

One (1) DVI-D (primary – digital only) and
one (1) DVI-I (secondary – digital and analog)
connectors

Up to 1600×1200 noninterlaced at 32-bit color,
each for both primary and secondary displays

One (1) 10/100/1000 LAN with RJ-45 connector

TLA7012 Integral Controls

Characteristic Description

Front-panel Display

Simultaneous Display
Capability

Front Panel

TouchScreen AvailablewithOption18

Size: 15 in. (38.1 cm) diagonal
Type: Active-matrix color TFT LCD with backlight
Resolution: 1024×768

Both the front-panel and one external display can
be used simultaneously at 1024×768 resolution

General-purpose knob with dedicated hotkeys
and knobs for horizontal a nd vertical scaling and
scrolling

s 2 TLA modules
s 6 TLA modules

®

Pentium®M-760

15GM

Integrated View (iView™) Capability

tions

c

Description

GPIB-iView (Opt. 1C) requires TLA Application
Software 5.0 or greater

1

More than 100. For a complete listing of currently
supported oscilloscopes, please visit our website
http://www.tektronix.com/iview

USB, Trigg

GPIB, Trigger In, Trigger Out, Clock In (when
available) for the GPIB-iView cable (Opt. 1C)

iView™ external oscilloscope wizard automates
setup

data is automatically transferred to the TLA and
time correlated with the TLA acquisition data

deskewed and time correlated when using the
iView™ external oscilloscope cable

2m

er In, Trigger Out, Clock Out

Characteristi

TLA Mainframe
Configuration
Requirements

Number of Tektronix
Oscilloscopes that can
be Connected to a TLA
System

External Oscilloscopes
Supported

TLA Connec

Oscilloscope
Connections

Setup

Data Correlation After oscilloscope acquisition is complete, the

Deskew The oscilloscope and TLA data is automatically

iView™ External
Oscilloscope Cable
Length

Symbolic Support

Characteristic Description

Number of
Symbols/Ranges

Object File Formats
Supported

Unlimited (limited only by amount of virtual
memory available on TLA)

IEEE695, OMF 51, OMF 86, OMF 166,
OMF 286, OMF 386, COFF, Elf/Dwarf 1 and 2,
Elf/Stabs, TSF (If your software development
tools do not generate output in one of the
above formats, TSF, or the Tektronix symbol
file, a generic ASCII file format is supported.
The generic ASCII file format is documented
in the TLA User Manual). If a format is not
listed, please contact your local Tektronix
representative

TLA7012 and TLA7016 External Instrumentation Interfaces

Characteristic Description

System Trigger Output

System Trigger Input Forces a system trigger (triggers all modules)

External Signal Output Can be used to drive external circuitry from a

External Signal Input Can be used to provide an external signal to

Asserted whenever a system trigger occurs
(TTL-compatible output, back-terminated into
50 Ω)

when asserted (adjustable threshold between

0.5 V and 1.5 V, edge-sensitive, falling-edge
latched)

module’s trigger mechanism (TTL-compatible
output, back-terminated into 50 Ω)

arm or trigger any or all modules (adjustable
threshold between 0.5 V and 1.5 V, level
sensitive)

4 www.tektronix.com

Tektronix Logic Analyzers — TLA7000 Series

Power

Product Characteristi

TLA7012

Voltage Range/Frequency: 90-250 V AC at

cs

45-66 Hz
100-132 V AC at 360-440 Hz
Input Current: 7 A maximum at 90 V AC (70 A
surge)
Power Consumption: 750 W maximum

TLA7016

Voltage Range/Frequency: 90-250 V AC at
45-66 Hz, 100-132 V AC at 360-440 Hz
Input Current: 16.5 A maximum at 90 V AC (70 A
surge)
Power Consumption: 1,450 W maximum

TL708EX

Voltage Range/Frequency: 100-240 V AC at
50-60 Hz
Input Current: 2 A maximum at 100 V AC
Power Consumption: 200 W maximum

Environmental

Characteristic Description

Temperature

Operating: +5 °C to +45 °C
Nonoperating: –20 °C to +60 °C

y

Humidit

20% to 80%
Operating: ≤30 °C; 80% relative humidity (29 °C
maximum wet-bulb t emperature)
Nonoperating: 8% to 80% (29 °C maximum
wet-bulb temperature)

Altitude

Operating: –1,000 ft. to 10,000 ft. (–305 meters
to 3,050 meters)

Safety UL3111-1, CSA1010.1, EN61010-1, IEC61010-1

Physical Characteristics

TLA7012 Port able

Dimensions

mm

in.

Height 295 11.6
Width 451 17.75
Depth 460 18.1

Weight kg lb.

Net (w/o modules)
Shipping (Typical)

TLA7016 Benchtop

Dimensions mm in.

14 30
27 59

Height 350 13.7
Width 425 16.7
Depth 673 26.5

Weight kg lb.

Net (w/o modules)
Shipping (Typical)

TL708EX 8-port Instrument Hub and Expander

Dimensions mm in.

25

51.8 115

55

Height 51 2
Width 445 17.5
Depth 305 12

Weight kg lb.

Net 3 6
Shipping

5

11

TLA7ACx Characteristics

General

Characteristic Description

Number of Channels (All channels are acquired including clocks)

TLA7AC2 68 channels (4 are clock channels)

TLA7AC3 102 channels (4 are clock and 2 are qualifier

TLA7AC4 136 channels (4 are clock and 4 are qualifier

Channel grouping No limit to number of groups or number of

Module "Merging”

Time Stamp 51 bits at 125 ps resolution (3.25 days duration)

Clocking/Acquisition
Modes

Number of Mainframe
Instrument Slots
Required per TLA
Series Module

Input Cha racteristics (with P6800 or P6900 Series probes)

Characteristic Description

Capacitive Loading 0.5 pF clock/data (P6900 Series)

Threshold Selection
Range

Threshold Selection
Channel Granularity

Threshold Accuracy
(including probe)

Input Voltage Range

Operating

Nondestructive ±15 V

Minimum Input Signal
Swing

Input Signal Minimum
Slew Rate

channels)

channels)

channels per group (all channels can be reused
in multiple groups)

Up to five 102-channel or 136-channel modules
can be "merged" to make up to a 680-channel
module. Merged modules exhibit the same depth
as the lesser of the five individual modules.
Word/setup-and-hold/glitch/transition
recognizers span all five modules. Range
recognizers limited to three-module merge. Only
one set of clock connections is required.

Asynchronous/Synchronous 8 GHz MagniVu
high-speed timing is available simultaneous with
all modes

1

<0.7 pF clock/data (P6800 Series)
(1.0 pF for P6810 in group configuration)

From –2.0 V to +4.5 V in 5 mV increments
Threshold presets include TTL (1.5 V), CMOS
(1.65 V), ECL (–1.3 V), PECL (3.7 V), LVPECL
(2.0 V), LVCMOS 1.5 V (0.75 V), LVCMOS 1.8 V
(0.9 V), LVCMOS 2.5 V (1.25 V), LVCMOS 3.3 V
(1.65 V), LVDS (0 V), and user defined

Separate selection for each of the clock/qualifier
channels and one per group of 16 data channels
for each 34-channel probe

±(35 mV + 1%)

–2.5 V to 5.0 V

300 mV (single ended)

¯

V

MAX–VMIN

> 150 mV (differential)

200 mV/ns typical

www.tektronix.com 5

Data Sheet

State Acquisition Characteristics
(with P6800 or P6900 Series probes)

Full Channel Half Channel Quarter Channel

235 MHz

450 MHz Optional 800 MHz / 800 Mb/s or

Characteristic Description

State Record Length
with Time Stamps

Setup-and-Hold Time
Selection Range

Setup-and-Hold Window

All channels 625 ps typical

Single channel

Minimum Clock Pulse
Width

ctive Clock Edge

A

eparation

S

Demux Channel
Selection

Source Synchronous
Clocking

450 MHz / 450 Mb/s or

470 Mb/s (DDR)

900 Mb/s (DDR)

(Quarter/Half/Full channels) 8/4/2 Mb,
32/16/8 Mb, 128/64/32 Mb, 512/256/128 Mb per
channel

From 16 ns before, to 8 ns after clock edge
in 125 ps increments. Range may be shifted
towards the setup region by 0 ns [+8, –8] ns, 4 ns
[+12, –4] ns, or 8 ns [+16, 0] ns

500 ps typical

500 ps (P6960, P6964, P6980, P6982, P6860,
P6864, P6880), 700 ps (P6810)

400 ps

Channels can be demultiplexed to other
channels through user interface with 8-channel
granularity

Up to four "Fast Latches" per module (20 max
per 5-way merge) to strobe source-synchronous
buses into TLA7ACx modules.
Four sets of any predefined "Fast Latches"
may be combined with qualification data and
data pipelining to store four independent
source-synchronous data buses.
Two "Fast Latches" may be combined to address
DDR applications.

450 MHz / 900 Mb/s

625MHz/1.25Gb/s

Timing Acquisition Characteristics
(with P6800 or P6900 Series probes)

lf/Full

ng Record

th Glitch

Enabled

c

Description

and2ns

16 Kb per channel, with adjustable trigger
position

500ps/1ns/2nsto50ms

4nsto50ms

8/4/2 Mb, 32/16/8 Mb,128/64/32 Mb,
512/256/128 Mb per channel

Half of default main memory depth

300 ps typical

500 ps (P6960, P6964, P6980, P6982, P6860,
P6864, P6880), 750 ps (P6810)

250 ps

Sample period + channel-to-channel skew

Characteristi

MagniVu™ Timing 125 ps max, adjustments to 250 ps, 500 ps, 1 ns,

MagniVu Timing
Record Length

Deep Timing
Resolution
(Quarter/Ha
channels)

Deep Timing
Resolution with Glitch
Storage Enabled

Deep Timing
Record Length
(Quarter/Half/Full
channels with time
stamps and with or
without transitional
storage)

Deep Timi
Length wi
Storage

Channel-to-Channel
Skew

Minimum Recognizable
Pulse/Glitch Width
(Single channel)

Minimum Detectable
Setup/Hold Violation

Minimum Recognizable
Multichannel Trigger
Event

Analog Acquisition Characteristics
(with P6800 or P6900 Series probes)

Characteristic Description

Bandwidth

Attenuation

Offset and Gain
(Accuracy)

Channels
Demultiplexed

Run/Stop
Requirements

iCapture™ Analog
Outputs

iCapture Analog Output
BNC Cable

2GHztypical

10X, ±1%

±50 mV, ±2% of signal amplitude

4

None, analog outputs are always active

Compatible with any supported Tektronix
oscilloscope

Low loss, 10X, 36 in. Basic Analog Multiplexer
functionality is offered standard on all TLA7ACx
modules. This routes 4 fixed channels to the
iCapture Analog Output BNCs. The outputs
cannot be switched to other logic analyzer
channels. Option AM enables full analog
multiplexer control and allows the routing of any
4 logic analyzer channels to the iCapture Analog
Output BNCs

6 www.tektronix.com

Tektronix Logic Analyzers — TLA7000 Series

Trigger Characteristics

Characteristi

Independent Trigger

c

Description

16

States

Maximum Independent

16
If/Then Clauses per
State

Maximum Number of

8
Events per If/Then
Clause

Maximum Number of

8
Actions per If/Then
Clause

Maximum Number of
Trigger Events

Number of Word

18 (2 counters/timers plus any 16 other

resources)

16
Recognizers

Number of Transition

16
Recognizers

Number of Range

4
Recognizers

Number of

2
Counters/Timers

Trigger Event Types

Word, Group, Channel, Transition, Range,

Anything, Counter Value, Timer Value, Signal,

Glitch, Setup-and-Hold Violation, Snapshot

ger Action Types

Trig

Maximum Triggerable

ger Module, Trigger All Modules, Trigger

Trig

, Trigger MagniVu, Store, Don’t Store, Store

Main

le, Increment Counter, Decrement Counter,

Samp

t Counter, Start Timer, Stop Timer, Reset

Rese

r, Snapshot Current Sample, Goto State,

Time

Clear Signal, Do Nothing

Set/

1250 Mb/s (4X clocking mode)
Data Rate

Trigger Sequence Rate DC to 500 MHz (2 ns)

Counter/Timer Range 51 bits each (>50 days at 2 ns)

Counter Rate DC to 500 MHz (2 ns)

Timer Clock Rate 500 MHz (2 ns)

Counter/Timer Latency

Range Recognizers

2ns

Double bounded (408 channel max). Can be as

wide as any group, must be grouped according

to specifi ed order of significance

Setup-and-Hold
Violation Recognizer
SetupTimeRange

Setup-and-Hold
Violation Recognizer
Hold Time Range

From 8 ns before to 7 ns after clock edge in

125 ps increments. This range may be shifted

towards the positive region by 0 ns, 4 ns, or 8 ns

From 7 ns before to 8 ns after clock edge in

125 ps increments. This range may be shifted

towards the positive region by 0 ns [+8, –8] ns,

4 ns [+12, –4] ns, or 8 ns [+16, 0] ns

Trigger Position Any data sample

MagniVu Trigger
Position

Storage Control
(Data qualification)

MagniVu position can be set from 0% to 60%

centered around the MagniVu trigger

Global (conditional), by state (start/stop), block,

by trigger action, or transitional. Also force main

prefill selection available

Physical Characteristics

Dimensions

mm

in.

Height 262 10.3
Width 61 2.4
Depth 381 15

Weight kg lb.

Net 3.1 6.7
Shipping

6.3 13.7

TLA7Bxx Characteristics

General

Characteristic

Number of Channels (All channels are acquired including clocks )

TLA7BB2
TLA7BB3
TLA7BB4
TLA7BC4 136 channels (4 are clock, 4 are qualifier channels)

Channel grouping No limit to number of groups or number of channels

Module "Merging"

Time Stamp 54 bits at 20 ps resolution (>4 days duration)
Clocking/Acquisition Mo des Asynchronous and Synchronous. 20 ps

Number of Mainframe
Instrument Slots Required
per TLA Series Module

Input Cha racteristics (with P6800 or P6900 Series probes)

Characteristic

Threshold Selection Range

Threshold Selection
Channel Granularity

Threshold Accuracy
(including probe)

Input Voltage Range

Operating
Nondestructive ±15 V

Swing

Input Signal Minimum Slew
Rate

Description

68 channels (4 are clock channels)
102 channels (4 are clock, 2 are qualifier channels)
136 channels (4 are clock, 4 are qualifier channels)

(128 Mb)

per group (all channels can be reused in multiple
groups)

Up to five 68-channel, 102-channel, or 136-channel
modules can be "merged" to make up to a
680-channel module. Merged modules exhibit
the same depth as the lesser of the five individual
modules.
Word/setup-and-hold/glitch/transition recognizers
span all five modules. Range recognizers limited
to three module merge. Only one set of clock
connections is required.

(50 GHz) MagniVu, high-speed timing is available
simultaneous with all modes

1

Description

0.5 pF clock/data (P6900 Series)Capacitive Loading
<0.7 pF clock/data (P6800 Series); 1.0 pF for P6810

when 8-channel podlet grouper is used
From–2.0Vto+4.5Vin5mVincrements

Threshold presets include TTL (1.5 V),
(2.5 V), ECL (–1.3 V), PECL (3.7 V), LVPE

CMOS

CL (2.0 V),
LVCMOS1.5V(0.75V),LVCMOS1.8V(0.9V
LVC MOS 2.5 V (1 .25 V), LVC MOS 3. 3 V (1 .65
LVDS (0 V), and user defined

Separate selection for each of the clock/qualifier and
individual channels

±(35 mV + 1%)

–2.5 V to 5.0 V

200 mV (single ended)Minimum Input Signal
V

MAX–VMIN

> 100 mV (differential)

200 mV/ns typical

),

V),

www.tektronix.com 7

Data Sheet

State Acquisition Characteristics
(with P6800 or P6900 Series probes)

Configuration Full Channel Half Channel

750 MHz Standard 750 MHz / 750 Mb/s

(1 sample/clock)

750 MHz / 1.5 Gb/s

(2 samples/clock)

1.4 GHz Optional 1.4 GHz / 1.4 Gb/s
(1 sample/clock)

750 MHz / 3 Gb/s

(4 samples/clock)

1.4 GHz / 2.8 Gb/s
(2 samples/clock)

Characteristic

State Record Length with
Time Stamps
(Half/Full channels)

Setup-and-Hold Time
Selection Range

Setup-and-Hold Window,
Single Channel

Minimum Clock Pulse Width 200 ps (P6960, P6964, P6980, P6982, P6860,

Demux Channel Selection Channels can be demultiplexed to other channels

Description

4/2 Mb, 8/4 Mb, 16/8 Mb, 32/16 Mb, 64/32 Mb,
128/64 Mb per channel, 256/128 Mb per channel
(TLA7BC4)

From 15 ns before, to 7.5 ns after clock edge in 20 ps
increments. Range may be shifted towards the setup
region by 0 ns [+7.5, –7.5] ns, 2.5 ns [+10, –5] ns, or

7.5 ns [+15, 0] ns
180 ps typical

P6864, P6880), 250 ps (P6810)

through user interface with 8-channel granularity

Timing Acquisition Characteristics
(with P6800 or P6900 Series probes)

Characteristic

MagniVu™ Timing 20 ps max, adjustments to 40 ps, 80 ps, 160 ps,

MagniVu Timing Record
Length

Deep Timing Resolution
(Quarter/Half/Full channels)

Deep Timing Resolution
with Glitch Storage Enabled

Deep Timing Record Length
(Quarter/Half/Full channels)

ing Record Length

Deep Tim

tch Storage Enabled

with Gli
Channel-to-Channel Skew (module + probes)

Before customer deskew
After customer deskew

(see AutoDeskew
information below)

Minimum Recognizable
Pulse/Glitch Width
(Single channel)

Minimum Detectable
Setup/Hold Violation

Minimum Recognizable
Multichannel Trigger Event

Description

320ps,and640ps
128 Kb per channel, with adjustable trigger position

156.25 ps / 312.5 ps / 625 ps to 50 ms

1.25 ns to 50 ms

8/4/2 Mb, 16/8/4 Mb, 32/16/8 Mb, 64/32/16 Mb,
128/64/32 Mb, 256/128/64 Mb per channel;
512/256/128 (TLA7BC4)

Half of default main memory depth

±80 ps typical
±20 ps typical

s (P6960, P6964, P6980, P6982, P6860,

200 p

4, P6880)

P686

s (P6810)

250 p
40 ps

Sample period + channel-to-channel skew

AutoDeskew and Customer Deskew Fixture

Tektronix recommends AutoDeskew, a standard feature available within the
TLA Application, for deskewing probe channels and setting the sample point for
synchrono
and asynchronous applications (including MagniVu), Tektronix recommends the
Customer Deskew Fixture. This is an optional accessory to the TLA7Bxx modules
that is us
the TLA7Bxx module to ensure tight time alignment between all channels across all
probes. Two different fixtures are available:

us applications. However, for tight time alignment in both synchronous

ed to perform a “channel-to-channel deskew” of the probes connected to

Customer Deskew Fixture for P6800 Series Probes

Customer Deskew Fixture for P6900 Series Probes

For ordering details, please see the Ordering Information section.

Analog Acquisition Characteristics
(with P6800 or P6900 Series probes)

Characteristic

Bandwidth
Attenuation
Offset and Gain (Accuracy) ±50 mV, ±2% of signal amplitude
Channels Demultiplexed
Run/Stop Requirements
iView™ Analog Outputs Compatible with any supported external Tektronix

w Analog Output BNC

iVie

es

Cabl

Description

3GHz(typical)
10X, ±1%

4
None, analog outputs are always active

oscilloscope

(4) low loss, 10X, 36 in.

Four

Physical Characteristics

Dimensions

Height 262 10.3
Width 61 2.4
Depth 381 15

Weight kg lb.

Net 3.1 6.7
Shipping

mm

6.3 13.7

in.

8 www.tektronix.com

Tektronix Logic Analyzers — TLA7000 Series

Trigger Characteristics

Characteristic

Independent Trigger States
Maximum Independent

If/Then Clauses per State
Maximum Number of

Events per If/Then Clause
Maximum Number of

Actions per If/Then Clause
Maximum Number of

Trigger Events
Number of Word

Recognizers
Number of Transition

Recognizers
Number of Range

Recognizers
Number of Counters/Timers

er Event Types

Trigg

Trigger Action Types Trigger Module, Trigger All M odules, Trigger Main,

Maximum Triggerable Data
Rate

Trigger Sequence Rate DC to 800 MHz (1.25 ns)
Counter/Timer Range 48 bits each (~4 days at 1.25 ns)
Counter Rate DC to 800 MHz (1.25 ns)
Timer Clock Rate 800 MHz (1.25 ns)
Counter/Timer Test Latency
Range Recognizers

Setup-and-Hold Violation Recognizer

Setuptimerange
Hold time range

Trigger Position Any data sample
MagniVu Trigger Position

Storage Control
(Data qualification)

Description

16
16

8

8

26 (2 counters/timers plus any 24 other resources)

24

24

8

2
Word, Group, Channel, Transition, Range, Anything,

Counter Value, Timer Value, Signal, Glitch,
Setup-and-Hold Violation, Snapshot

Trigger MagniVu, Store, Don’t Store, Start Store,
Stop Store, Increment Counter, Decrement Counter,
Reset Counter, Start Timer, Stop Timer, Reset Timer,
Snapshot Current Sample, Goto State, Set/Clear
Signal, Do Nothing

3.0 Gb/s

0ns
Double bounded (408 channel max). Can be as wide

as any group, must be grouped according to specified
order of significance

From 7.5 ns before to 7.5 ns after clock edge in 20 ps
increments. This range may be shifted towards the
positive region by 0 ns, 2.5 ns, 5 ns, or 7.5 ns

MagniVu position can be set from 0% to 60%
centered around the MagniVu trigger

All, Global (conditional), by state (start/stop), block,
by trigger action, or transitional. Also force main
prefill selection available

TLA7SAxx Characteristics

General

Characteristic

Number of Lanes

TLA7SA08
TLA7SA16

Record Length

Time Stamp Range
Time Stamp
Clocking/Acquisition Modes TLA module without SSC (Spread Spectrum

External reference clock
frequency tolerance

Number of Mainframe
Instrument Slots Required
per TLA Series Module

Module Configuration Requirements

TLA7SA08
TLA7SA16

Input Characteristics (with P6700 Series probes)

Characteristic

Capacitive Loading See P6700 Series Probe Manual
Minimum Data Eye

Acquisition Ch ara cteristics (with P6700 Series probes)

Characteristic

Dynamic Link-width Switch
Latency

Support

FTS

Filter Characteristics

Characteristic

Ordered Sets TS1, TS2, SKP, EIOS, FTS, EIEOS
DLLPs

TLPs

Description

8 lanes
16 lanes
8 GB x8 / 16 GB x16 with 160 MS per lane (160 ms

at 8 Gb; 320 ms at 5 G b; 640 ms at 2.5 Gb at 100%
bus utilization)

62 hours
54 bits at 25

Clocking) , External Reference Clock (100 Mhz ±10%
or 125 Mhz) with or without SSC

±300 ppm

1

X1 X4 X8 X16

1100
1112

Description

See P6700 Series Probe Manual

Description

Consumes up to 48 symbols (typical)

PCI

pical)

(ty

Ie Gen3: Consumes <4 FTS packets (typical)

PC

Description

Ack, Nak, PM, Vendor Specific, InitFC1, InitiFC2,
UpdateFC

MRd, MRdL, MWr, IORd, IOWr, CfgRd0, CfgWr0,
CfgRd1, CfgWr1, Msg, MsgD, Cpl, CplD, CPlLk,
CPlDLk

ps resolution

Bi-Directional Link WidthModule

e Gen1&2: Consumes up to <12 FTS packets

www.tektronix.com 9

Data Sheet

Trigger Characteristics

Characteristic

Independent Trigger States
Maximum Independent

If/Then Clauses per State
Maximum Number of

Events per If/Then Clause
Maximum Number of

Actions per If/Then Clause
Maximum Number of Event

Counters per State
Event Counter Range
Number of TLP Packet

Recognizers per Link
Direction

Number of DLLP Packet
Recognizers per Link
Direction

of Sequence

Number

izers

Recogn
Number of Symbols per

Sequence Recognizer

ber of Link Event

Num

ognizers

Rec
Number of Global

Counters/Timers
Trigger Event Types

Trigger Action Types

Counter/Timer Range 48 bit (~5 days with 3.6 ns resolution)
Storage Control

(Data qualification)

Description

8
8

8

8

2

31 bit
4

4

4

16

4

4

Anything, TLP, DLLP, Sequence, Link Event, Counter,
Timer

Trigger, Trigger All Modules, Wait for System Trigger,
Goto, Increment Counter, Decrement Counter, Reset
Counter, Start Timer, Reset Timer, Reset and Start
Timer, Stop Timer, Reset and Stop Timer, Set Signal
Out, Clear Signal Out, Arm Module, Start Storage,
Stop Storage, Do Nothing

By state (start/stop)

Physical Characteristics

TLA7SA16 TLA7SA08

Dimensions

Height 262 10.3 262 10.3
Width 61 2.4 61 2.4
Depth 381 15 381 15

Weight kg lb. kg lb.

Net 3.20 7.06 2.84 6.25
Shipping

mm

7.30 16.1 6.94 15.3

in.

mm

in.

Ordering Information

TLA7012

Portable Logic Analyzer Mainframe, holds two TLA modules.

Includes: Min

Front-panel c
(333-4206-xx
Calibration
Please speci

TLA7012 Opt

Option

Opt. 18
Opt. 1C

Opt. PO Add Accessory Pouch for TLA7012
Opt. TL Add Teklink Cable
Opt. 1K Add LA CART logic analyzer cart LACART
Opt. 88 Factory install of module N/A

TLA7012 O

Order Number

650-4815-xx
020-2664-xx Rackmount Kit
016-1522-xx

TLA7016

Benchto

Includes: Five (5) dual-wide panel fillers for empty slots (333-4206-xx), LAN cable,

straight-through, RJ-45 (174-5225-xx), TLA Application Software CD (063-3881-xx),
Certificate of Traceable Calibration.
Please specify power cord, language, and service options when ordering.

TLA7016 Options

Option

Opt. 1C

Opt. TL Add Teklink Cable
Opt. BTB Add Benchtop System Mounting

Opt. 1K
Opt. 88 Factory install of module N/A

TLA7016 Optional Accessories

Ord

020-2369-xx Rackmount Kit
016-1651-xx

i Keyboard (119-7275-xx), Optical Wheel Mouse (119-7054-xx),
over (200-4939-xx), One dual-wide panel filler for empty slots
), TLA Application Software CD (063-3881-xx), Certificate of Traceable

.

fy power cord, language, and service options when ordering.

ions

Description

Add touch screen

Add iView™ external oscilloscope

interface kit

Order Number

012-1614-xx

016-1441-xx
174-5019-xx

ptional Accessories

Accessory

Additional Removable Hard Drive Assembly (no SW)

Wheeled Transport Case

p Logic Analyzer Mainframe, holds six TLA modules.

er Number

Description

Add iView™ external oscilloscope

interface kit

Brackets

4000 logic analyzer cart

Add K

Accessory

Wheeled Transport Case

Order Number

012-1614-xx

174-5019-xx

407-5127-xx (Left)

407-5132-xx (Right)

N/A

K400

0

10 www.tektronix.com

TL708EX

TekLink™ 8-port Instrument Hub and Expander (Used for connecting 3-to-8 TLA7012
or TLA7016 mainframes).

Includes: Instruction sheet (071-1765-xx, English only).

Please specify power cord and service options when ordering.

Tektronix Logic Analyzers — TLA7000 Series

TLA7000 Series Power Cord Options

Option

Opt. A0

Opt. A1 Universal EURO power TLA7012/TL708EX:

Opt. A2

Opt. A3

Opt. A4

Opt. A5 Switzerland power TLA7012/TL708EX:

Opt. A6

Opt. A10 China power TLA7012/TL708EX:

Opt. A11

Opt. A99 No power cord or AC adapter

Description

North America power

United King

240 V, North America power

dom power

Australia power

power

Japan

India power

Order Number

TLA7012/TL708EX:

161-0104-00

TLA7016: 161-0213-00 [15A],

161-0218-00 [20A]

161-0104-06

TLA7016: 161-0209-00

TLA7012/TL708EX:

161-0104-07

TLA7016: 161-0210-00

TLA7012/TL708EX:

161-0104-14

TLA7016: 161-0211-00

TLA7012/TL708EX:

161-0104-08

TLA7016: 161-0208-00

161-0167-00

TLA7016: 161-0212-00

TLA7012/TL708EX:

161-A005-00

TLA7016: 161-0218-00

161-0306-00

TLA7016: 161-0320-00

TLA7012/TL708EX:

161-0324-00

TLA7016: 161-0338-00

—

TLA7000 Series Installation Service

Option Description

LAINSTAL-SM Installation of single mainframe and up to 3 modules or 1 to

LAINSTAL-LG Installation of single mainframe and 4 to 6 modules

3 modules in existing mainframe

Gigabit LAN (GbE) Switch

Order
Number Description

020-2666-xx

16-port Gigabit LAN (GbE) Switch with U.S. Standard
(120 V, 60 Hz) Power Cord

Power C ords for Gigabit LAN (G bE) Switch

Order
Number Description

161-0066-00

161-0066-09

161-0066-10

161-0066-11

161-0066-12

161-0154-00

161-0298-00

161-0304-00

Power Cord, IEC320 C13, North American, Straight

Power Cord, IEC320 C13, Universal Euro, Straight

Power Cord, IEC320 C13, Universal Euro, Straight

Power Cord, IEC320 C13, Australian, Straight

Power Cord, IEC320 C13, North American, Straight

Power Cord, IEC320 C13, Switzerland, Straight

Power Cord, IEC320 C13, Japan, Straight

Power Cord, IEC320 C13, China, Straight

TLA7000 Series Language Options

Option Description

Opt. L0

Opt. L5

Opt. L10

Opt. L99

English Manual

Japanese Manual

Russian Manual

No Manual

www.tektronix.com 11

Data Sheet

TLA7ACx Modules

Includes: Certificate of calibration, and one-year warranty (return to Tektronix).

Probes must be ordered separately.

TLA7ACx Logic

Module Description

TLA7AC2 68-channel Logic Analyzer module, 8 GHz timing, 235 MHz

TLA7AC3 102-channel Logic Analyzer module, 8 GHz timing,

TLA7AC4 136-channel Logic Analyzer module, 8 GHz timing,

TLA7ACx Module Options

Base configuration is 2 Mb record length at 235 MHz state with basic Analog
Multiplexer capability.

Option Descript

Opt. 1S Increase to 8 Mb Record Length at 235 MHz State

Opt. 2S Increase to 32 Mb Record Length at 235 MHz State

Opt. 3S Increase to 128 Mb Record Length at 235 MHz State

Opt. 4S Increa

Opt. 5S Increase to 8 Mb Record Length at 450 MHz State

Opt. 6S Increase to 32 Mb Record Length at 450 MHz State

Opt. 7S Increase to 128 Mb Record Length at 450 MHz State

.AM

Opt

Opt. 88

TLA7ACx Language Options

Option Description

Opt. LG1 Global Manual

Opt. L99

Please refer to the Service section at the rear of this document for details about
Calibration and Repair options.

Analyzer Modules

state, 2 Mb record length. Options for up to 128 Mb record
length and/or up to 450 MHz state

235 MHz state, 2 Mb record length. Options for up to
128 Mb record length and/or up to 450 MHz state

235 MHz state, 2 Mb record length. Options for up to
128 Mb record length and/or up to 450 MHz state

ion

seto2MbRecordLengthat450MHzState

Enable Full Analog Multiplexer

Factory Install

No Manual

TLA7Bxx Modules

Includes: Certificate of calibration, and one-year warranty (return to Tektronix).

Note: Probes must be ordered separately.

TLA7Bxx Logic Analyzer Modules

Module Description

TLA7BB2

TLA7BB3

TLA7BB4

TLA7BC4 136-channel Logic Analyzer module, 50 GHz MagniVu timing,

TLA7Bxx Module Options

Base configuration is 2 Mb record length at 750 MHz state clock with full Analog
Multiplexer capability.

Option

Opt. 1S Increase to 4 Mb Record Length at 750 MHz State Clock
Opt. 2S Increaseto8MbRecordLengthat750MHzStateClock
Opt. 3S Increase to 16 Mb Record Length at 750 MHz State Clock
Opt. 4S Increase to 32 Mb Record Length at 750 MHz Sta te Clock
Opt. 5S Increase to 64 Mb Record Length at 750 MHz Sta te Clock
Opt. 6S Increase to 2 Mb Record Length at 1.4 GHz State Clock
Opt. 7S Increase to 4 Mb Record Length at 1.4 GHz State Clock
Opt. 8S Increase to 8 Mb Record Length at 1.4 GHz State Clock
Opt. 9S Increase to 16 Mb Record Length at 1.4 GHz State Clock
Opt. AS Increase to 32 Mb Record Length at 1.4 GHz State Clock
Opt. BS Increase to 64 Mb Record Length at 1.4 GHz State Clock
Opt. 88

TLA7BC4 Module Options

econfiguration is 128 Mb record length at 750 MHz state clock.

Bas

Option

.1S

Opt

TLA Series Module Upgrades

Please refer to the Service section at the rear of this document for details about
Calibration and Repair options.

68-channel Logic Analyzer module, 50 GHz MagniVu timing,
750 MHz state clock, 2 Mb record length. Options for up to
64 Mb record length and/or up to 1.4 GHz state clock

102-channel Logic A nalyzer module, 50 GHz MagniVu timing,
750 MHz state clock, 2 Mb record length. Options for up to
64 Mb record length and/or up to 1.4 GHz state clock

136-channel Logic A nalyzer module, 50 GHz MagniVu timing,
750 MHz state clock, 2 Mb record length. Options for up to
64 Mb record length and/or up to 1.4 GHz state clock

750 MHz state clock, 128 Mb record length. Option for 1.4 GHz
state clock

Description

Factory Install

Description

reaseto1.4GHzStateClock

Inc

12 www.tektronix.com

TLA7Bxx Customer Deskew Fixture

Option

020-2942-00
020-2940-00

Description

TLA7Bxx Custo mer Deskew Fixture for P6800 Series Probes
TLA7Bxx Custo mer Deskew Fixture for P6900 Series Probes

TLA7Bxx Language Options

Option Description

Opt. L0

Opt. L5

Opt. L10

Opt. L99

English Manual

Japanese Manual

Russian Manual

No Manual

Tektronix Logic Analyzers — TLA7000 Series

TLA7SAxx PCI Express Logic Protocol Analyzer Modules

Includes: Statement of Compliance, one-year warranty (return to Tektronix),
reference clock cable (672-6285-xx), and reference clock jumper cable
(174-5392-xx).
Probes must be ordered separately.

Module Description

TLA7SA16 16 Differential Pairs (8 Lanes, x8 Link Width) Logic Protocol

Analyzer module, up to 8 GT/s acquisition, 8 GB x8 (160 MS
per lane) record length

TLA7SA08 8 Differential Pairs (4 Lanes, x4 Link Width) Logic Protocol

Analyzer module, up to 8 GT/s acquisition, 8 GB x8 / 16 GB x16
(160 MS per lane) record length

Service Opt

ions

The following service options are offered for the TLA logic analyzer products.

Option

Opt. CA1 provides a single calibration event or coverage for the designated calibration
interval, whichever comes first

Opt. C3 Calibration Service, 3 Years
Opt. C5 Calibration Service, 5 Years
Opt. D1 Calibration Data Report
Opt. D3 Calibration Data Report, 3 Years (with Opt. C3)
Opt. D5 Calibration Data Report, 5 Years (with Opt. C5)
Opt. G3 Complete Care 3 Years (includes loaner, scheduled calibration and more).

TLA7012, TL A7BB2, TLA7BB3, TLA7BB4, TLA7S08, TLA7S16 only
Opt. G53 Complete Care 53 Years (includes loaner, scheduled calibration and more).

TLA7012, TL A7BB2, TLA7BB3, TLA7BB4, TLA7S08, TLA7S16 only
Opt. R3 Repair Service, 3 Years
Opt. R5 Repair Service, 5 Years
Opt. S1 On-site Service, 1 Year
Opt. S3 On-site Service, 3 Years (with R or C options)
Opt. R1PW Repair Service Coverage, 1-year Post Warranty
Opt. R2PW Repair Service Coverage, 2-year Post Warranty
Opt. R3DW Repair Service Coverage, 3 Years (includes product warranty period).

3-year period starts at time of instrument purchase
Opt. R5DW Repair Service Coverage, 5 Years (includes product warranty period).

5-year period starts at time of instrument purchase

TLA7SAxx PCI Express Software

Software

Description

TMS160PCIE2 TLA protocol software for PCIe 2.0
TMS160PCIE3 TLA protocol software for PCIe 3.0

Logic Analyze

Option

Opt. 88
Opt. L0
Opt. L5
Opt. L10
Opt. L99

TLA7000

Mainframes

r TLA7SAxx Module Options

Description

Factory Install
English Manual
Japanese Manual
Russian Manual
No Manual

TL7ACx

Modules

TLA7Bxx

Modules

XXXX

XXXX
XXXX
XXX
XXX
XXX

XXXX
XXXX
X
X
XXXX
XXXX
XXXX

XXXX

TLA7SAxx

Modules

XX

XX

TLA7000 Series Upgrades

You can add new capabilities to your existing TLA mainframe or increase the state
speed, memory depth, or add full analog multiplexer capability (TLA7ACx only) to
existing TLA modules by ordering the appropriate upgrade kit. Please refer to the
TLA Family Upgrade Guide for further details.

Product(s) are manufactured in ISO registered facilities.

www.tektronix.com 13

Data Sheet

14 www.tektronix.com

Tektronix Logic Analyzers — TLA7000 Series

www.tektronix.com 15

Data Sheet

Contact Tektronix:

ASEAN / Australa

Balkans, Israel, South Africa and other ISE Countries [phone]

Central East Eu

Mexico, Central/South Am erica & Caribbean (52) 56 04 50 90

* European toll-free number. If not accessible, call: [phone]

rope, Ukraine, and the Baltics [phone]

Central Europe & G reece [phone]

Middle East,

Asia, and North Africa [phone]

The Netherlands 00800 2255 4835*

People’s Rep

Republic of

United K ingdom & Ireland 00800 2255 4835*

sia (65) 6356 3900

Austria 00800 2255 4835*

Belgium 00800 22

Brazil [phone]

Canada 1 800 833 9200

Denmark [phone]

Finland +41526

France 00800 2255 4835*

Germany 00800 2255 4835*

Hong Kong 400 8

India 000 800 650 1835

Italy 00800 2255 4835*

Japan 81 (3) 67

Luxembourg [phone]

ublic of China 400 820 5835

Poland [phone]

Korea 001 800 8255 2835

Russia & CIS [phone]

South Africa [phone]

Spain 00800

Sweden 00800 2255 4835*

Switzerland 00800 2255 4835*

Tai wa n 886 (

55 4835*

75 3777

20 5835

14 3010

Norway 800 16098

Portugal 80 08 12370

2255 4835*

2) 2722 9622

USA 1 800 833 9200

Updated 25 May 2010

www.tektronix.com

For Further Information. Tektronix maintains a comprehensive, constantly expanding
collection of application notes, technical briefs and other resources to help engineers working
on the cutting edge of technology. Please visit www.tektronix.com

t © Tektronix, Inc. All rights reserved. Tektronix products are covered by U.S. and foreign patents,

Copyrigh

d pending. Information in this publication supersedes that in all previously published material.

issued an

tion and price change privileges reserved. TEKTRONIX and TEK are registered trademarks of

Specifica

x, Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks

Tek t ro n i

espective companies.

of their r

27 Sep 2010 52W-15053-10