TEKTRONIX and TEK are registered trademarks of Tektronix, Inc.
Contacting Tektronix
Tektronix, Inc.
14150 SW Karl Braun Drive
P.O. Box 500
Beaverton, OR 97077
USA
For product information, sales, service, and technical support:
•In North America, call 1-800-833-9200.
•Worldwide, visit to www.tek.com find contacts in your area.
Table of Contents
Table of Contents
List of Figures..............................................................................................................................................................................12
List of Tables............................................................................................................................................................................... 15
Getting help and support.............................................................................................................................................................18
Related documentation........................................................................................................................................................ 18
Required equipment and accessories..................................................................................................................................20
Installing the software.......................................................................................................................................................... 21
Launch the application......................................................................................................................................................... 22
Close the application............................................................................................................................................................22
Help panel.....................................................................................................................................................................36
Figure 34: TP2 Calibration: IL for DMI/CMI.................................................................................................................................54
Figure 45: Rx LEQ Test: Link Training Configuration (Link Training-External)............................................................................64
Figure 46: Rx LEQ Test: Link Training Configuration (Link Training-CBB Controller).................................................................64
Figure 47: Rx LEQ Test: Link Training Configuration (Forced Loopback)...................................................................................65
Figure 50: Rx LEQ Test: Run Test (Basic).................................................................................................................................. 69
Figure 51: Rx LEQ Test: Run Test (Advanced Debug)).............................................................................................................. 70
Figure 52: Rx LEQ Test: Link Training........................................................................................................................................ 73
Figure 53: Rx LEQ Test: Save Results........................................................................................................................................74
Figure 57: Tx LEQ Test: Link Training Configuration (External)..................................................................................................77
Figure 58: Tx LEQ Test: Link Training Configuration (CBB Controller).......................................................................................77
Figure 59: Tx LEQ Test: Tx LEQ Test Configuration................................................................................................................... 79
Figure 60: Tx LEQ Test: Run Test(System Response Time Test)...............................................................................................80
Figure 62: Tx LEQ Test: Run Test(AIC Response Time Test).....................................................................................................81
Figure 63: Tx LEQ Test: Link Training.........................................................................................................................................82
Figure 64: Tx LEQ Test: Save Results........................................................................................................................................ 83
Figure 69: JTOL Test: Link Training Configuration (Link Training-External)................................................................................87
Figure 70: JTOL Test: Link Training Configuration (Link Training-CBB Controller).....................................................................88
Figure 71: JTOL Test: Link Training Configuration (Forced Loopback).......................................................................................89
Figure 72: JTOL Test: Configure Test (Basic)............................................................................................................................. 91
Figure 73: JTOL Test: Configure Test (SKP Ordered Set).......................................................................................................... 91
Table 27: TP2 Calibration: IL for DMI/CMI.................................................................................................................................. 54
Table 35: Rx LEQ Test: Link Training Configuration for Link Training.........................................................................................65
Table 36: Rx LEQ Test: Link Training Configuration for Forced Loopback..................................................................................66
Table 37: Rx LEQ Test: Rx LEQ Test Configuration (Basic)........................................................................................................68
Table 39: Rx LEQ Test: Run Test (Basic).................................................................................................................................... 70
Table 40: Rx LEQ Test: Run Test (Advanced Debug)................................................................................................................. 71
Table 41: Rx LEQ Test: Link Training..........................................................................................................................................73
Table 42: Rx LEQ Test: Save Results......................................................................................................................................... 74
Table 44: Tx LEQ Test: Link Training Configuration....................................................................................................................78
Table 45: Tx LEQ Test: Tx LEQ Test Configuration.....................................................................................................................79
Table 46: Tx LEQ Test: Run Test.................................................................................................................................................82
Table 47: Tx LEQ Test: Save Results..........................................................................................................................................83
Table 49: JTOL Test: Link Training Configuration for Link Training ............................................................................................89
Table 50: JTOL Test: Link Training Configuration for Forced Loopback..................................................................................... 90
Table 51: JTOL Test: Configure Test (Basic)...............................................................................................................................92
Table 52: JTOL Test: Configure Test (SKP Order Set)................................................................................................................92
Table 56: JTOL Test (Results Table)........................................................................................................................................... 97
Table 57: JTOL Test: Link Training..............................................................................................................................................98
Table 58: JTOL Test: Save Results............................................................................................................................................. 99
16
Welcome
Welcome
Welcome to the PCIe5.0 (CEM) TekRxTest application. This application performs the test as per the Gen 5 PHY Test Specification Revision
5.0 Version 1.0 and Base Specification Revision 6.0.1 Version 1.0.
Figure 1: TekRxTest - PCIe5.0 CEM application
Receiver testing is accomplished by connecting the output of BERT PPG (which can produce specific PCIe test patterns) to the input of the
DUT through a specialized set of fixtures and cables. The BERT can be programmed to add different amounts of random jitter, sinusoidal
jitter, differential, Common mode interference along with variable signal amplitude, preshoot, and de-emphasis. Output of the DUT is
connected to the BERT error detector to identify bit errors on the DUT Tx traffic, either during loopback or during sweep of one of the
stress parameters. Any error detected can be assumed to be generated from the DUT Tx path as a result of either the DUT experiencing
a bad bit-decision at its receiver or uncompensated back channel loss at the error detector of the BERT. Additionally, DUT Tx traffic can be
analyzed to verify the DUT responses to various requests put forward by the BERT during link training process.
Key features and benefits
•Automated Calibration, Link Training, and Compliance Testing.
•Receiver JTOL test for AIC / System DUT.
•Jointly with Anritsu BERT MP1900A series, the receiver solution provides the tools and flexibility required to visualize and control the
impairments, observe real-time eye performance for PCIe Gen5 devices.
•Reliable and accurate results reduce the test execution time and minimize the skill-set required to perform calibration and testing.
PCIe5.0 (CEM) Receiver Test Application Help 17
Getting help and support
Getting help and support
Related documentation
The following documentation is available as part of the PCIe5.0 (CEM) test application.
Table 1: Product documentation
ItemPurposeLocation
Application HelpApplication operation and User Interface
details
See also
Technical support on page 18
Technical support
Tektronix values your feedback on our products. To help us serve you better, please send us your suggestions, ideas, or comments on
your application or Real Time Oscilloscope. Contact Tektronix through mail, telephone, or the Web site. See Contacting Tektronix on page
0 at the front of this document for contact information.
Help panel of the application
When you contact Tektronix Technical Support, please include the following information (be as specific as possible):
General information
•All instrument model numbers
•Hardware options, if any
•Modules used
•Your name, company, mailing address, phone number, and FAX number
•Please indicate if you would like to be contacted by Tektronix about your suggestion or comments.
Application specific information
•Software version number
•Description of the problem such that technical support can duplicate the problem
•If possible, save the setup files for all the instruments used and the application
Conventions
Help uses the following conventions:
•The term "Application", "Software", and "PCIe5.0 CEM" refers to the TekRxTest - PCIe5.0 CEM Application.
•The term “DUT” is an abbreviation for Device Under Test.
•The term “select” is a generic term that applies to the two methods of choosing a screen item (button, control, list item): using a mouse
or using the touch screen.
18
Table 2: Icon descriptions
IconMeaning
This icon identifies important information.
This icon identifies conditions or practices that could result in loss of data.
This icon identifies additional information that will help you use the application more
efficiently.
Required2Connector savers (1.85 mm)1.85 mm oscilloscope channel input
accessory
Anritsu MP1900A
Anritsu
3rd party
Required1Bit Error Rate Tester (BERT)
1
equipment
DJATektronixEquipment
Required1DPOJET advanced optionDPOJET advanced Jitter, Eye and
SW option
SDLA64TektronixEquipment
SW option
PMCABLE1MTektronixTek
accessory
Required1Serial Data Link Analysis
(SDLA) software
Required2Cable pair; 2.92-to-2.92
mm, straight, 1.5 ps phasematched, 40 GHz
174-6663-01TektronixTek
accessory
Required1Cable pair; 2.92-to-2.92
mm, straight, 1.5 ps phasematched, 500 mm, 40 GHz
174-6666-01TektronixTek
accessory
Required2Cable pair; SMA-to-SMA,
Right Angle-Right Angle, 500
mm
174-6659-01TektronixTek
accessory
MPR40MFairview
rd
3
party
Required1Cable pair; SMA - SMP cable
pair
Required2Power dividerSplit signal from DUT Tx to the
Microwave
C7035CentricRF
3rd party
Optional4Right Angle Male-Female 2.92
mm adapter
C7049CentricRF
3rd party
Required32.92 mm Male to 2.92 mm
Male adaptor
Redriver
3rd party3rd party
PowerUSB - Basic PowerUSB
TF-PCIE5-CEMX16
Tektronix
or PCI-SIG
equipment
rd
3
party
Test fixturesRequired1
Optional1Active Gen5 Redriver (back
channel equalization)
Optional1Power USB Power StripAutomate DUT power cycle
Gen 5 CEM Test fixtures
Table continued…
2
50 G or better
connection
Configuration provided by 3rd party
Timing Analysis SW option
Embedding/De-embedding/sparameter filter generation/Receiver
Virtualization and Analysis Software
Equipment connection to fixtures and
DUT
Signal connection between
oscilloscope and BERT for Tx LEQ
Signal connection between
oscilloscope and BERT for Tx LEQ
and Trigger
Refclk connection between DUT and
BERT
oscilloscope and Error Detector
Cable management
Power divider output to oscilloscope
input
High loss back channels (DUT Tx to
Error Detector) may need EQ
3
Tektronix fixtures are not officially
approved by PCI-SIG
1
Configuration for BERT provided by 3rd party vendor
2
Another matched pair of cables (e.g. 174-6663-xx) will be required if the Active redriver is used for Rx or Tx LEQ
3
Gen5 CEM Test Fixtures are not backwards compatible for Gen3 & Gen4 CEM Rx
20
Getting started
ItemVendorTypeR/OQty DescriptionNotes
RXSW-NLP-PCIE5 TektronixSW optionRequired1PCIe Gen5 Receiver software Gen5 BASE and CEM Rx test
software - Node-Locked, Perpetual
RXSW-NL1-PCIE5Gen5 BASE and CEM Rx test
software - Node Locked, Time
Based, 1 year
RXSW-FLP-PCIE5Gen5 BASE and CEM Rx test
software - Floating, Perpetual
RXSW-FL1-PCIE5Gen5 BASE and CEM Rx test
software - Floating, Time Based, 1
year
Installing the software
Complete the following steps to download and install the latest PCIe5.0 (CEM) TekRx test application.
1. Go to www.tek.com.
2. Click Downloads. In the Download menu, select DOWNLOAD TYPE as Software and enter PCIe5.0 (CEM) in the MODEL ORKEYWORD field and click SEARCH.
3. Select the latest version of the software and follow the instructions to download.
4. Copy the executable file into the instrument you wish to install the software (Real-time oscilloscope or PC).
5. Follow the installation instruction that is available in the website. The software is installed at C:\Program
Files\Tektronix\BERTScope\RxTest60
6. Double click the shortcut icon on the desktop to launch the application.
Note:
•The PCIe5.0 (CEM) TekRx test application can be installed on a Tektronix real-time oscilloscope or a PC (optional).
•You must install the TekRxService and SigTest application in the real-time oscilloscope to successfully connect the application
with the real-time oscilloscope.
PCIe5.0 (CEM) Receiver Test Application Help 21
Operating basics
Operating basics
Launch the application
To launch the PCIe5.0 (CEM) test application, double click the shortcut icon TekRxTest on the desktop and select PCIe5.0 (CEM) in the
application window.
Figure 2: TekRxTest application window
Close the application
To exit the application, click on the application title bar. Follow on-screen instructions to save the unsaved session or test setup.
Using other methods to exit the application may result in abnormal termination of the application.
Note:
Launch Real-Time Oscilloscope
The TekVISA Socket Server application on the oscilloscope provides the necessary connectivity between the TekRxTest application
and scope. Although it is launched in the background when the scope boots up and the socket is initialized for communication, it is
recommended to verify the status by clicking on the Desktop Tray ―› TekVISA LAN Server Control as shown in the image below. If it is
ready to exchange data, then a wizard would appear as in the below image.
22
Figure 3: Launch Real-Time Oscilloscope
Note: In the unlikely event when the socket is not initialized, the process can be started by clicking on “Start Socket Server” which
gets enabled during such a scenario.
Operating basics
Launch TekRxService
The PCIe5.0 (CEM) TekRxTest application interfaces with the oscilloscope for data acquisition, analysis and data retrieval utilizing
TekRxService application. This software module should be launched at the time of initiating the TekRxTest application.
PCIe5.0 (CEM) Receiver Test Application Help 23
Operating basics
Figure 4: TekRxService application window
TekRxService has to be launched if the application is being run on an external PC. To launch the application, double click
Note:
the TekRxService batch file shortcut icon in the desktop of the real-time oscilloscope.
Application panels
Application panels overview
The PCIe5.0 (CEM) TekRxTest application uses panels to group the configurations and settings. Click on any panel to configure the
associated settings. A panel may have one or more tabs that lists the selections available in that panel. Controls in a tab may change
depending on the settings made in the same tab or another tab.
Table 3: Application panels overview
ParameterDescription
Connections
Settings
Help
This panel displays the real-time oscilloscope and BERT connection settings. You can
connect to a real-time oscilloscope and BERT by entering the IP address of the
instruments.
This panel allows configuring various settings for the Components, TP3 and TP2
Calibration.
This panel displays the application help.
Table continued…
24
ParameterDescription
Calibrations
This panel allows you to configure the calibration parameters for TP3/TP2 and save the
results.
Operating basics
Tests
Options
This panel allows you to configure the Rx/Tx LEQ test settings and view the results.
This panel allows you to configure the JTOL test settings and view the results.
Connections panel
The connections panel allows you to connect to a real-time oscilloscope and BERT with the PCIe5.0 (CEM) TekRxTest application. Enter
the IP address of the instruments and click Connect to establish the connection.
Figure 5: Connections panel
Table 4: Connections panel
ConnectionsDescription
BERT
RT Scope
PCIe5.0 (CEM) Receiver Test Application Help 25
Enter the BERT IP address in the address field and click Connect. When the BERT is connected
successfully, the circle next to BERT in the right end corner turns green.
Enter the RT Scope IP address in the address field and click Connect. When the RT Scope is connected
successfully, the circle next to RT Scope and TekRxService in the right end corner turns green.
Note: Before you click Connect, if the TekRxTest application is running on an external PC, make
sure to launch the TekRxService in the real-time oscilloscope.
Operating basics
Settings panel
This panel allows you to configure the settings for instruments, calibrations, and remote access. Click any tab to configure the associated
settings.
Figure 6: Settings panel
Table 5: Settings panel configurations
ItemDescription
Restore Defaults
Save
Recall
Restores the application with default settings.
Saves the current test setup.
Recalls the saved test setup.
Components settings
The components settings display the parameters for RT Scope and TekRxService.
26
Operating basics
Figure 7: Components: RT Scope
Table 6: Components: RT Scope
ParameterDescription
Positive Channel
Negative Channel
Sample Rate
Select the generator data positive channel from BERT.
Select the generator data negative channel from BERT.
Displays the RT Scope sample rate in GS/s.
PCIe5.0 (CEM) Receiver Test Application Help 27
Operating basics
Figure 8: Components: TekRxService
Table 7: Components: TekRxService
ParameterDescription
Analysis Time Out
Sigtest Version
Seasim VersionDisplays the Seasim version.
Enter the timeout value for Sigtest analysis.
Enter the Sigtest version.
TP3 Calibration
The TP3 calibration tab allows you to configure the channel settings including the attenuators and component de-embedding, multi-tone
calibration, and insertion loss calculation.
28
Operating basics
Figure 9: TP3 Calibration: Attenuator Settings
Table 8: TP3 Calibration: Attenuator Settings
ParameterDescription
Include Ch1 De-Embedding filter fileEnable to apply Ch1 de-embedding filter file.
Ch1 De-Embedding filter fileClick to browse and navigate to the path and select the required Ch1 de-embedding filter
file.
Ch1 External AttenuationEnter the Ch1 external attenuation value in dB.
Include Ch2 De-Embedding filter fileEnable to apply Ch2 de-embedding filter file.
Ch2 De-Embedding filter fileClick to browse and navigate to the path and select the required Ch2 de-embedding filter
file.
Ch2 External AttenuationEnter the Ch2 external attenuation vaue in dB.
PCIe5.0 (CEM) Receiver Test Application Help 29
Operating basics
Figure 10: TP3 Calibration: Calibrations
Table 9: TP3 Calibration: Calibrations
ParameterDescription
AmplitudeDisplays the calibration target for generator amplitude source.
RJDisplays the calibration target for random jitter source.
SJ @ 100 MHzDisplays the calibration target for sinusoidal jitter source @ 100 MHz.
Multi-tone Calibration
Frequency Settings: Frequencies at which the SJ calibration needs to be performed for JTOL Test.
Frequency (MHz)
Lower Amplitude Limit (UI p-p)Displays the table of lower amplitude limit values at which SJ calibration starts for that
Higher Amplitude Limit (UI p-p)Displays the table of higher amplitude limit values at which SJ calibration ends for that
Min FrequencyEnter the minimum frequency value.
Max FrequencyEnter the maximum frequency value.
# FrequenciesEnter the desired number of frequencies within the specified range.
# PointsEnter the desired number of points used for calibration.
GenerateClick to view the table populated with the frequencies.
Table continued…
Select to enable the multi-tone calibration. It displays the calibration settings for multiple
tones.
Displays the table of frequencies in MHz for which Multi-tone calibration is to be performed.
frequency.
frequency.
30
Operating basics
ParameterDescription
DefaultClick to view the table populated with default list of frequencies.
TP2 Calibration
The TP2 calibration tab allows you to configure the Attenuator settings, DMI and CMI calibration , Insertion Loss, CTLE and Preset
Selection, and Stressed Eye Parameters.
Figure 11: TP2 Calibration: Attenuator Settings
Table 10: PCIe Gen 5 TP2 Calibration: Attenuator Settings
ParameterDescription
Include Ch1 De-Embedding filter fileEnable to apply Ch1 de-embedding filter file.
Ch1 De-Embedding filter fileClick to browse and navigate to the path and select the required Ch1 de-embedding filter
file.
Ch1 External AttenuationEnter the Ch1 external attenuation value in dB.
Include Ch2 De-Embedding filter fileEnable to apply Ch2 de-embedding filter file.
Ch2 De-Embedding filter fileClick to browse and navigate to the path and select the required Ch2 de-embedding filter
file.
Ch2 External AttenuationEnter the Ch2 external attenuation vaue in dB.
PCIe5.0 (CEM) Receiver Test Application Help 31
Operating basics
Figure 12: TP2 Calibration: DMI and CMI
Table 11: TP2 Calibration: DMI and CMI
ParameterDescription
DMIDisplays the nominal DMI value in mV.
CMIDisplays the nominal CMI value in mV.
32
Operating basics
Figure 13: TP2 Calibration: CTLE and Preset Selection
Table 12: TP2 Calibration: CTLE and Preset Selection
ParameterDescription
# acqs
Analysis ToolSelect the required analysis tool.
Enter the number of waveform acquisitions to be carried out for averaging during this
measurement.
Stressed Eye AlgorithmSelect the required algorithm.
•Linear Sweep
•Efficient
No. of acqs for stressed eyeDisplays the number of acquisitions value for stressed eye.
Eye Target
WidthDisplays the target eye width value as per PCIe specification.
HeightDisplays the target eye height value as per PCIe specification.
DMI Sweep
Min
Max
SJ Sweep
Table continued…
Displays the minimum value of DMI sweep during stressed eye calibration.
Displays the maximum value of DMI sweep during stressed eye calibration.
34
ParameterDescription
Min
Displays the minimum value of SJ sweep during stressed eye calibration.
Operating basics
Max
Amplitude Sweep
Min
Max
Displays the maximum value of SJ sweep during stressed eye calibration.
Displays the minimum value of amplitude sweep during stressed eye calibration.
Displays the maximum value of amplitude sweep during stressed eye calibration.
Remote access: Configuration
The remote access tab allows you to configure the remote setting parameters to access the equipment remotely.
Figure 15: Remote access: Configuration
Table 14: Remote access: Configuration
ParameterDescription
Local IP Address
Listening Port
Table continued…
PCIe5.0 (CEM) Receiver Test Application Help 35
Displays the IP address for connecting to the application over socket server.
Displays the TCP/IP port number of the port that the socket server is listening.
Default Value: 4004
Operating basics
ParameterDescription
Time OutDisplays the timeout value used when communicating with the socket server.
Default Value: 20 Seconds
Help panel
The help panel launches the PCIe5.0 (CEM) TekRxTest application help document.
Calibrations panel
Complete TP3 and TP2 calibrations before you start the DUT testing using the PCIe5.0 (CEM) test application. Follow the instructions in
the calibration wizards to automate the calibration for the test points. After calibrating the test points, you can save the results.
TP3 Calibration
The TP3 calibration panel allows you to perform calibration for TP3 and save the results. You can perform calibration for Signal Amplitude,
Preset, Random Jitter (RJ), Sinusoidal Jitter (SJ), SJ@210 MHz, and Multi-tone. Additionally, there is a provision to perform AC-DC
Balancing , and Insertion Loss measurement for theTP3 channel.
The PCIe5.0 (CEM) TekRxTest application calibrates the following at TP3:
1. Amplitude - The differential voltage swing is required to be within 720 - 800 mV. This is done only after the transition and non-transition
bit levels are made equal using de-emphasis.
2. Tx Equalization Presets - The various levels of de-emphasis and preshoot are required to be calibrated within the tolerance as
specified.
3. RJ - It is calibrated to be 0.5 ps (RMS value).
4. SJ - The SJ is calibrated over the desired range of 1-5 ps (pk-pk) including the nominal SJ specification of 0.1 UI ( or 3.125 at 100 MHz
frequency).
5. SJ @ 210 MHz - If the stressed eye calibration requires sinusoidal jitter levels greater than 0.1 UI, then SJ@210 MHz is used during
JTOL test.
6. Multi-tone - It is calibrated over a specific range for multiple user-defined frequencies.
36
TP3 Calibration procedure
Operating basics
Figure 16: TP3 Calibration
Click TP3 under the calibration tab to view the calibration results. Click at the right end corner of the application to launch the TP3
calibration wizard. This wizard will guide you through the sequential procedure to perform the calibration.
1.Connection Diagram: This tab displays the connection diagram for TP3 calibration. The connection diagram is same for AIC /
System.
PCIe5.0 (CEM) Receiver Test Application Help 37
Operating basics
Figure 17: TP3 Calibration: Connection Diagram
Click
to move to the next screen.
2.Initialization: This tab displays the description and allows you to initialize the equipment. Click Initializate Equipment and complete
the initialization process.
You can click Automatic Calibration to perform the automatic calibration with the default settings for amplitude, Tx Equalization
Presets, RJ, and SJ parameters without user intervention.
38
Operating basics
Figure 18: TP3 Calibration: Initialization
Click to move to the next screen.
3.PWJ Calibration: This tab displays the description and allows you to perform PWJ Calibration.
PCIe5.0 (CEM) Receiver Test Application Help 39
Operating basics
Figure 19: TP3 Calibration: PWJ Calibration
Table 15: TP3 Calibration: PWJ Calibration
ParameterDiscription
Procedure TypeSelect the required procedure type.
•Measure Jitter
•Manual entry
Manual EntrySelect the manual entry option and enter the calibration values in PWJ RJ value in (RMS)
ps and PWJ DJ value in ps.
Click on Start to start measurement.
Measure JitterSelect the option and click on Start to initiate the measurement.
PWJ RJ / PWJ DJDisplays the PWJ/RJ and PWJ/DJ values.
StartClick on Start to start the measurement.
Click to move to the next screen.
4.AC-DC Balance: This tab displays the graph plots of AC-DC balance.
40
Operating basics
Figure 20: TP3 Calibration: AC-DC Balance
Table 16: TP3 Calibration: AC-DC Balance
ParameterDescription
StartClick Start to run the measurements.
Click to move to the next screen.
5.Amplitude Calibration: This tab displays the graph plots of amplitude calibration.
PCIe5.0 (CEM) Receiver Test Application Help 41
Operating basics
Figure 21: TP3 Calibration: Amplitude Calibration
Table 17: TP3 Calibration: Amplitude Calibration
ParameterDescription
Ampl Setting (SE)Displays the single-ended calibrated amplitude value corresponding to 800 mV
differential.
StartClick Start to run the measurements.
Click to move to the next screen.
6.Preset Calibration: This tab displays the graph plots of preset calibration.
42
Operating basics
Figure 22: TP3 Calibration: Preset Calibration
Table 18: TP3 Calibration: Preset Calibration
ParameterDescription
StartClick Start to run the measurements.
Click to move to the next screen.
7.IL Measurement: This tab displays the description and allows you to perform IL Measurement.
PCIe5.0 (CEM) Receiver Test Application Help 43
Operating basics
Figure 23: TP3 Calibration: IL Measurement
Table 19: TP3 Calibration: IL Measurement
ParameterDescription
Manual EntrySelect the manual entry option and enter the loss value in dB.
Measure LossSelect the measure loss option for the TekRxTest application to initiate measure loss.
Settings
#Scope acqsThe number of scope acquisitions that allows the algorithm to make multiple insertion
loss measurements and report the mean insertion loss. This way, any error in a
particular acquisition will get averaged out. The mean of scope noise is usually zero. If
we have a large number of samples and we average out those samples, then the noise
component in the averaged sample will be zero.
# avgsThe number of averages that will run the insertion loss measurement multiple times
and calculate the average value. This way, any error in a particular acquisition will get
averaged out.
Loss ValueDisplays the Final Loss value after computing.
StartClick Start to run the measurements.
Click to move to the next screen.
8.RJ Calibration: This tab displays the graph plots of RJ calibration.
44
Operating basics
Figure 24: TP3 Calibration: RJ Calibration
Table 20: TP3 Calibration: RJ Calibration
ParameterDescription
RJ SettingDisplays the calibrated RJ setting corresponding to the nominal value.
StartClick Start to run the measurements.
Click to move to the next screen.
9.SJ Calibration: This tab displays the graph plots of SJ calibration.
PCIe5.0 (CEM) Receiver Test Application Help 45
Operating basics
Figure 25: TP3 Calibration: SJ Calibration
Table 21: TP3 Calibration: SJ Calibration
ParameterDescription
SJ SettingDisplays the calibrated SJ setting corresponding to the nominal target value.
StartClick Start to run the measurements.
Click to move to the next screen.
10. SJ@210 MHz Calibration: This tab displays the graph plots of SJ@210 MHz calibration.
11. Multi-tone SJ: This tab displays the graph plots of multi-tone SJ calibration.
Enable the multi-tone option in the settings panel to display the Multi-tone SJ calibration panel in the TP3 calibration
Note:
wizard window.
PCIe5.0 (CEM) Receiver Test Application Help 47
Operating basics
Figure 27: TP3 Calibration: Multi-tone SJ
Table 23: TP3 Calibration: Multi-tone SJ
ParameterDescription
StartClick Start to run the measurements.
12. Save Results: This tab allows you to save all the TP3 calibration results.
48
Operating basics
Figure 28: TP3 Calibration: Save Results
Table 24: TP3 Calibration: Save Results
ParameterDescription
Unique IDEnter the Unique ID of the calibrated equipment in the text box.
Generated ByEnter the user name in the text box.
Comments (Optional)Enter the required comments in the comment box.
SaveClick to save the results.
Click to complete the TP3 calibration and close the wizard.
Completion of the TP3 calibration process or in the event of cancellation of the process, the BERT data generator is turned
Note:
off automatically by the PCIe5.0 (CEM) TekRxTest application.
TP2 Calibration
The TP2 calibration panel allows you to manually perform calibration for the equipment and save the results. TP2 Calibration is carried
out for DMI, CMI, Physical channel loss, CTLE/Preset selection, and Stressed Eye. This procedure sets SJ, DMI, and Amplitude levels to
achieve target eye-opening.
You must perform TP3 calibration before you start performing the calibration for TP2.
The PCIe5.0 (CEM) TekRx test application calibrates the following at TP2:
1. DMI - The differential mode sinusoidal interference is required to be calibrated within 5 - 30 mV (pk-pk) by capturing the 2.1 GHz
sinusoidal output for a duration of at least 125 us.
2. CMI - The common-mode sinusoidal interference is required to be calibrated for a nominal voltage of 150 mV (pk-pk) by capturing the
120 MHz sinusoidal output for a duration of at least 125 us.
PCIe5.0 (CEM) Receiver Test Application Help 49
Operating basics
3. CTLE and Preset- Tx equalization presets P5, P6, P8, and P9 are used to find the optimal eye area with the optimal CTLE.
4. Stressed Eye calibration - As per the specification, various signal parameters and stress levels are computed to generate a signal that
meets the stressed eye targets.
TP2 Calibration procedure
Figure 29: TP2 Calibration
Click TP2 under the calibration tab to view the calibration results. Click
calibration wizard. This wizard will guide you through the sequential procedure to perform the calibration.
You must perform TP3 calibration before you start performing the calibration for TP2.
1.Description: This tab displays the description and allows you to select the DUT Type as Non-Root Complex or Root Complex.
at the right end corner of the application, to launch the TP2
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Operating basics
Figure 30: TP2 Calibration: Description
Table 25: TP2 Calibration: Description
ParameterDescription
DUT Type•Non-Root Complex / AIC Card
•Root Complex / System
Click to move to the next screen.
2.Connection Diagram: This tab displays the connection diagram for the DUT Type selected in description screen.
3.Calibration Selection: This tab allows you to select the TP3 Calibration file from the drop-down list and click Initialize Equipment.
Figure 33: TP2 Calibration: Calibration Selection
Table 26: TP2 Calibration: Calibration Selection
ParameterDescription
TP3 Calibration FileSelect the desired TP3 calibration file and initialize the equipment.
Click to move to the next screen.
4.IL for DMI/CMI: This module returns physical channel loss without package embedding for DMI and CMI calibration.
PCIe5.0 (CEM) Receiver Test Application Help 53
Operating basics
Figure 34: TP2 Calibration: IL for DMI/CMI
Table 27: TP2 Calibration: IL for DMI/CMI
ParameterDescription
#Scope acqsThe number of scope acquisitions that allows the algorithm to make multiple insertion
loss measurements and report the mean insertion loss. This way, any error in a
particular acquisition will get averaged out. The mean of scope noise is usually zero. If
we have a large number of samples and we average out those samples, then the noise
component in the averaged sample will be zero.
# avgsThe number of averages that will run the insertion loss measurement multiple times
and calculate the average value. This way, any error in a particular acquisition will get
averaged out.
StartClick Start to run the measurements.
Click to move to the next screen.
5.DMI Calibration: This tab displays the graph plots of DMI calibration.
54
Operating basics
Figure 35: TP2 Calibration: DMI Calibration
Table 28: TP2 Calibration: DMI Calibration
ParameterDescription
DMI SettingDisplays the calibrated DMI setting corresponding to nominal value.
StartClick Start to run the measurement.
Click to move to the next screen.
6.CMI Calibration: This tab displays the graph plots of CMI calibration.
PCIe5.0 (CEM) Receiver Test Application Help 55
Operating basics
Figure 36: TP2 Calibration: CMI Calibration
Table 29: TP2 Calibration: CMI Calibration
ParameterDescription
CMI SettingDisplays the calibrated CMI setting corresponding to nominal value.
StartClick Start to run the measurement.
Click to move to the next screen.
7.IL Measurement:
The Stressed Eye calibration including CTLE selection and optimal preset identification needs to be performed with a full physical
channel loss between 34 dB to 37 dB . This includes the package embedding loss.
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Operating basics
Figure 37: TP2 Calibration: IL Measurement
Table 30: TP2 Calibration: IL Measurement
ParameterDescription
Manual EntrySelect the manual entry option and enter the loss value in dB.
Measure LossSelect the measure loss option for the TekRxTest application to initiate measure loss
Settings
#Scope acqsThe number of scope acquisitions that allows the algorithm to make multiple insertion
loss measurements and report the mean insertion loss. This way, any error in a
particular acquisition will get averaged out. The mean of scope noise is usually zero. If
we have a large number of samples and we average out those samples, then the noise
component in the averaged sample will be zero.
# avgsThe number of averages that will run the insertion loss measurement multiple times
and calculate the average value. This way, any error in a particular acquisition will get
averaged out.
Loss ValueDisplays the final loss value after computing.
StartClick Start to run the measurements.
Click to move to the next screen.
8.CTLE and Preset
The PCIe Gen5 TekRxTest application provides the facility to automatically compute and present the total physical channel loss in the
TP2 set-up. Selection of optimum physical channel loss (obtained by means of changing the ISI pair), optimum CTLE, and Preset is
a prerequisite for to obtain the stressed eye as per the specification. While arriving at the optimum combination of the parameters,
PCIe5.0 (CEM) Receiver Test Application Help 57
Operating basics
the TekRxTest application guides you through the various steps in this process by means of pop-up messages in taking suitable
actions.
Figure 38: TP2 Calibration: CTLE and Preset
Table 31: TP2 Calibration: CTLE and Preset
ParameterDescription
# AcquisitionsEnter the number of waveforms to be acquired for CTLE and Preset.
PresetSelect the presets from which the optimum will be chosen for TP2 calibration.
CTLESelect the CTLEs from which the optimum will be chosen for TP2 calibration.
ConfigurationSelect to Configure the Preset and CTLE configuration.
OKSelect to apply the configuration for Preset and CTLE.
StartClick Start to run the measurements.
Click to move to the next screen.
9.Stressed Eye Cal:
TP2 calibration for stressed eye requires information from the TP3 calibration that is performed for the set-up under consideration or
from one of the saved TP3 results. The relevant TP3 calibration file can be chosen from the calibration selection page shown from a
drop-down button listing all the TP3 calibration files stored in the PCIe Gen5 TekRxTest application repository.
Manual Calibration RunSelect to manually enter the SJ, DMI and Amplitude values for Stressed Eye
calibration.
SJDiplays the SJ value at which Eye Width (EW) and Eye height (EH) needs to be
computed.
DMIDisplays the DMI value at which Eye Width (EW) and Eye height (EH) needs to be
computed.
AmplitudeDisplays the amplitude level at which Eye Width (EW) and Eye height (EH) needs to be
computed.
Exhaustive SweepSelect to run the stressed eye calibration for all combinations of Amplitude, SJ, and
DMI within the sweep range with defined step sizes.
# acqsEnter the number of waveforms used to obtain the average EW and EH.
ConfigurationSelect to configure initial settings, step size, sweep range.
•Initial Settings - Configure the Initial SJ / DMI / Amplitude value from which your
Linear Sweep should start (Not applicable for Exhaustive Sweep).
•Step Size - Configure the SJ / DMI / Amplitude step size value by which the
increment or decrement of your SJ / DMI / Amplitude values should happen for
Stressed Eye Calibration.
•Sweep Range - Configure the SJ / DMI / Amplitude min and max sweep range for
which the Stressed Eye Calibration is executed.
•Default - Select to apply the initial settings, step size and sweep range to the
default values.
•OK - Select to apply the configured values of initial settings, step size, sweep
range.
StartClick Start to run the measurements.
Click to move to the next screen.
10. Save Results: This tab allows you to save all the TP2 calibration results.
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Operating basics
Figure 41: TP2 Calibration: Save Results
Table 33: TP2 Calibration: Save Results
ParameterDescription
Unique IDEnter the Unique ID of the calibrated equipment in the text box.
Generated ByEnter the user name in the text box.
ISI PairEnter the ISI pair used during calibration.
Comments (Optional)Enter the required comments in the comment box.
SaveClick to save the results.
Click to complete the TP2 calibration and close the wizard.
Completion of the TP2 calibration process or in the event of cancellation of the process, the BERT data generator is turned
Note:
off automatically by the PCIe5.0 (CEM) Test Application.
Tests panel
Rx LEQ Test
Rx LEQ Test procedure
Click Rx LEQ Test under the Tests panel to view the measurement results. Click
the Rx LEQ test wizard. This wizard will guide you through the sequential procedure to perform the test.
PCIe5.0 (CEM) Receiver Test Application Help 61
at the right end corner of the application, to launch
Operating basics
1. Calibration Selection: This tab allows you to select the required DUT type, Clock Architecture, BERT Clock type and TP2 Calibration
file from the drop-down list. The drop-down lists all the TP2 calibration files available as per the choice made under DUT Type
selection.
Figure 42: Rx LEQ Test: Calibration Selection
Table 34: Rx LEQ Test: Calibration Selection
ParameterDescription
DUT TypeSelect the required DUT type.
•Non-Root Complex / AIC
•Root Complex / System
Clock ArchitectureSelect the desired clock architecture.
BERT Clock TypeSelect the required BERT clock type.
TP2 Calibration FileSelect the required TP2 calibration file.
Click to move to the next screen.
2. Connection Diagram: This tab displays the connection diagram for the Rx LEQ test. The connection diagram is the different for AIC
and System in case of Rx LEQ test.
Symbol LengthSelect the required symbol length from the drop-down list for the corresponding
Table continued…
Click to insert SKP OS while sending training sequence.
generation.
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ParameterDescription
Insert double SKP in Loopback.Active state Select the required option (ON/OFF) from the drop-down list for the corresponding
generation.
SKP Orderd Set intervalSelect the required interval value from the drop-down list for the corresponding
generation.
Filter/Remove the received SKP Order Set Select to enable the filter or remove the received SKP ordered set.
Click to move to the next screen.
5. Run Test: This tab allows you to configure the settings to run the test.
Operating basics
Figure 50: Rx LEQ Test: Run Test (Basic)
PCIe5.0 (CEM) Receiver Test Application Help 69
Operating basics
Figure 51: Rx LEQ Test: Run Test (Advanced Debug))
Table 39: Rx LEQ Test: Run Test (Basic)
ParameterDescription
Rx LEQ Test Information
Table continued…
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Operating basics
ParameterDescription
Loopback ModeSelect the required loopback mode from the drop-down list.
BERT Initial PresetSelect the Preset to be set on the BERT PPG during loopback from the drop-down list.
DUT Initial PresetSelect the Preset to be set on the DUT Tx during loopback from the drop-down list.
DUT Target PresetSelect the Preset to be set on the DUT Tx as the final preset during link training.
Stress TypeSelect the required Stress type from the drop-down list.
•Apply stress
•Inhibit stress during loopback
•Disable stress
Auto Search and Tune CDREnable to perform Auto Search and Tune CDR after Link Training:
•Automatic - Search and set the appropriate CTLE on the Error Detector.
•Manual – Sets the configured CTLE value on the Error Detector.
•BERT CTLE - Enable and enter the BERT CTLE value in dB
Error Detector Information
BERDisplays the BER information.
Error CountDisplays the error count information.
Total BitsDisplays the total number of bits.
Rx LEQ Test ResultDisplays the Rx LEQ test result.
StartClick to start the test execution.
Table 40: Rx LEQ Test: Run Test (Advanced Debug)
ParameterDescription
Stress ConfigurationSelect the stress configuration among Customized and Un-calibrated.
CMIClick to display the CMI value in mV. The stress on the waveform is defined by the
parameters of CMI.
DMIClick to display the DMI value in mV. The stress on the waveform is defined by the
parameters of DMI.
AmplitudeClick to display the amplitude value in mV. The stress on the waveform is defined by the
parameters of Amplitude.
RJClick to display the RJ value in ps. The stress on the waveform is defined by the
parameters of RJ.
SJClick to display the SJ value in ps. The stress on the waveform is defined by the
parameters of SJ.
BERT Tx EQSelect BERT Tx EQ among Customized and Un-calibrated
Tx EQ TypeSelect the Tx EQ type from the drop-down list.
PresetSelect the Preset from the drop-down list.
Test PatternSelect the required test pattern type from the drop-down list.
CompSelect the required Compliance pattern type from the drop-down list.
Table continued…
PCIe5.0 (CEM) Receiver Test Application Help 71
Operating basics
ParameterDescription
Auto Search and Tune CDR
Error CountDisplays the error count information.
Total BitsDisplays the total number of bits.
BERDisplays the BER information.
StatusDisplays the status information.
ExportClick to export the Advance debug settings.
ResetClick to reset the Advance debug settings.
Redo Link TrainingSelect to enable the redo link training in-case of sync or clock error.
•Auto Search mode - Select to enable the auto search mode from the drop-down list.
•Fine
•Coarse
•BERT CTLE Selection:
•Automatic - Search and set the appropriate CTLE on the Error Detector.
•Manual - Sets the configured CTLE value on the Error Detector.
•BERT CTLE - Enter the BERT CTLE value in dB.
•Auto Search - Click to enable Auto Search when the DUT is in loopback
•Tune CDR - Click to enable CDR Tune when the DUT is in loopback
•Export
•Reset
StartClick to start the text execution.
Click to move to the next screen.
6. Link Training: This tab displays the loopback steps with its status in a tabular form
72
Operating basics
Figure 52: Rx LEQ Test: Link Training
Table 41: Rx LEQ Test: Link Training
ParameterDescription
StepLists the different steps that are prerequisite for initiating link training
StatusIndicates the completion status of each activity
InitializeInitialize the BERT for performing link training
Set Preshoot and DeemphasisSets the preset as per BERT Initial Preset in Link Training Configuration wizard
It sets all the calibrated Presets on the BERT from P0-P9
Setting StressesSets stresses as per the user selection in Configure Test wizard
Configure JTOL TestSets the BERT, DUT initial and Target Presets, Loopback mode (Recovery, Config), Link and Lane
number
Link TrainingInitiates the link training process in MX 183000A
Click to move to the next screen.
7. Save Results: This tab allows you to save the Rx LEQ test results.
PCIe5.0 (CEM) Receiver Test Application Help 73
Operating basics
Figure 53: Rx LEQ Test: Save Results
Table 42: Rx LEQ Test: Save Results
ParameterDescription
Unique IDEnter the Unique ID of the calibrated equipment in the text box.
Generated ByEnter the user name in the text box.
Comments (Optional)Enter the required comments in the comment box.
SaveClick to save the results.
Click to complete the Rx LEQ Test and close the wizard.
Tx LEQ Test
Tx LEQ Test procedure
Click Tx LEQ Test under the Tests panel to view the measurement results. Click
the Tx LEQ test wizard. This wizard will guide you through the sequential procedure to perform the test.
1. Calibration Selection: This tab allows you to select required DUT type, BERT Clock type and TP3 Calibration file from the drop-down
list.
at the right end corner of the application, to launch
74
Operating basics
Figure 54: Tx LEQ Test: Calibration Selection
Table 43: Tx LEQ Test: Calibration Selection
ParameterDescription
TP3 Calibration FileSelect the required TP3 calibration file.
DUT TypeSelect the required DUT type.
•Non-Root Complex / AIC
•Root Complex / System
BERT Clock TypeSelect the required BERT clock type from the drop-down list.
AIC TestsSelect the required AIC test.
System TestSelect the required System test.
Click to move to the next screen.
2. Connection Diagram: This tab displays the connection diagram for the Tx LEQ test. The connection diagram is the different for AIC
and System in case of Tx LEQ test.
Figure 62: Tx LEQ Test: Run Test(AIC Response Time Test)
PCIe5.0 (CEM) Receiver Test Application Help 81
Operating basics
Table 46: Tx LEQ Test: Run Test
ParameterDescription
DUT IDEnter the DUT ID.
Clear AllUnchecks all the presets in the table.
Check AllChecks all the presets in the table.
StartClick to start the test execution.
Click to move to the next screen.
6. Link Training: This tab displays the loopback steps with its status in a tabular form.
Figure 63: Tx LEQ Test: Link Training
Click to move to the next screen.
7. Save Results: This tab allows you to save the Tx LEQ test results.
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Operating basics
Figure 64: Tx LEQ Test: Save Results
Table 47: Tx LEQ Test: Save Results
ParameterDescription
Unique IDEnter the Unique ID of the calibrated equipment in the text box.
Generated ByEnter the user name in the text box.
Comments (Optional)Enter the required comments in the comment box.
SaveClick to save the results.
Click to complete the Tx LEQ Test and close the wizard.
Options panel
JTOL Test
To test SJ at multiple frequencies for the JTOL test, you need to perform Multi-tone SJ calibration during TP3 Calibration. You can generate
30 KHz to 100 MHz with a maximum of 14 different frequencies.
The frequency settings table lists the frequencies calibrated during Multi-tone SJ calibration while performing TP3 calibration. If the newly
generated frequency doesn't match with the calibrated frequency, then nearby calibrated frequency data will be used for running the JTOL
test.
PCIe5.0 (CEM) Receiver Test Application Help 83
Operating basics
JTOL Test procedure
Figure 65: JTOL Test
Click JTOL Test under the Tests panel to view the measurement results. Click at the right end corner of the application, to launch
the JTOL test wizard. This wizard will guide you through the sequential procedure to perform the test.
1. Calibration Selection: This tab allows you to select the calibration file from the drop-down list. The drop-down lists all the TP2
calibration files available as per the choice made under DUT Type selection.
84
Operating basics
Figure 66: JTOL Test: Calibration Selection
Table 48: JTOL Test: Calibration Selection
ParameterDescription
DUT TypeSelect the required DUT type.
•Non-Root Complex / AIC
•Root Complex / System
Clock ArchitectureSelects the clock architecture between Common, SRIS and SRNS.
BERT Clock TypeSelect the required BERT clock type.
•100 MHz External
•Internal
TP2 Calibration FileSelect the required TP2 calibration file.
Click to move to the next screen.
2. Connection Diagram: This tab displays the connection diagram for the JTOL test. The connection diagram is the different for AIC and
System in case of JTOL test.
PCIe5.0 (CEM) Receiver Test Application Help 85
Operating basics
Figure 67: JTOL Test: Connection Diagram(AIC)
Figure 68: JTOL Test: Connection Diagram(System)
Click to move to the next screen.
86
3. Link Training Configuration: This tab allows you to configure the link training and forced loopback settings.
Operating basics
Figure 69: JTOL Test: Link Training Configuration (Link Training-External)
PCIe5.0 (CEM) Receiver Test Application Help 87
Operating basics
Figure 70: JTOL Test: Link Training Configuration (Link Training-CBB Controller)
88
Operating basics
Figure 71: JTOL Test: Link Training Configuration (Forced Loopback)
Table 49: JTOL Test: Link Training Configuration for Link Training
ParameterDescription
PCIe Slot TypeSelect the required PCIe slot from the drop-down list.
LaneSelect the lane to be tested from the drop-down list.
Loopback ModeSelect the required loopback mode from the drop-down list.
BERT Initial PresetSelect the Preset to be set on the BERT PPG during loopback from the drop-down list.
DUT Initial PresetSelect the Preset to be set on the DUT Tx during loopback from the drop-down list.
DUT Target PresetSelect the Preset to be set on the DUT Tx during loopback from the drop-down list.
Stress TypeSelect the required stress type from the drop-down list.
Link NumberEnter the link number value.
BERT CTLEEnable and enter the BERT Error Detector CTLE value in dB.
Keep DUT in loopback after test execution
is complete
DUT Power OptionsSelect the required DUT power options.
Table continued…
Select to enable the DUT in the loopback after test execution is complete.
•External
•CBB Controller
PCIe5.0 (CEM) Receiver Test Application Help 89
Operating basics
ParameterDescription
DUT Power ON TypeSelect the required DUT power ON type for External option.
•Manual
•Pause For Power Cycle
•Automatic
Script File LocationBrowse and navigate to the path and select the required script file. Enabled only when
Automatic is selected as DUT Power ON Type.
DelayEnter the delay time in seconds.
Auto ResetSelect the required CBB Controller and enter the values in seconds.
•Power Cycle
•Power Reset
•Waiting Time
Table 50: JTOL Test: Link Training Configuration for Forced Loopback
ParameterDiscription
BERT Preset Selection
PresetSelect the BERT Tx Preset setting from the drop-down list.
PreshootDisplays the preshoot value corresponding to the choice of preset.
Editable for P10 and Custom Preset selection.
De-emphasisDisplays the de-emphasis value corresponding to the choice of preset.
Editable for Custom Preset selection.
BERT CTLE Selection
Auto Search ModeSelect to Enable auto search and choose the mode from the drop-down list.
•Fine
•Coarse
AutomaticEnables automatic CTLE selection for back-channel equalization in the BERT Error
Detector.
ManualSelect to manually choose the BERT CTLE selection.
BERT CTLESelect to enable and enter the BERT Error Detector CTLE value in dB.
Click to move to the next screen.
4. Configure Test: This tab allows you to configure the test settings.
90
Operating basics
Figure 72: JTOL Test: Configure Test (Basic)
Figure 73: JTOL Test: Configure Test (SKP Ordered Set)
PCIe5.0 (CEM) Receiver Test Application Help 91
Operating basics
Table 51: JTOL Test: Configure Test (Basic)
ParameterDescription
BER Settings
•BER - Enter the number of bits in error that can be tolerated.
•Error Limit - Enter the required error limit. The default value is 1.
Test Length
Stress ConfigurationSelect the required stress configuration among calibrated, customized, un-calibrated.
Spread Spectrum Clocking (SSC)Enables SSC for both Data and Clock
CMIDisplays the CMI value in mV. The stress on the waveform is defined by the parameters
DMIDisplays the DMI value in mV. The stress on the waveform is defined by the parameters
AmplitudeDisplays the Amplitude value in mV. The stress on the waveform is defined by the
RJDisplays the RJ value in ps or UIp-p. The stress on the waveform is defined by the
SJDisplays the SJ value in ps or UIp-p. The stress on the waveform is defined by the
BER Measurement PatternSelect the required BER measurement pattern from the drop-down list.
•Duration - Enter the test length duration value.
•Confidence - Displays the test length confidence value.
of CMI.
of DMI.
parameters of Amplitude.
parameters of RJ.
parameters of SJ.
Table 52: JTOL Test: Configure Test (SKP Order Set)
ParameterDescription
SKP Ordered Set Settings
Insert SKP OS while sendingTraining SequenceClick to insert SKP OS while sending training sequence.
Symbol LengthSelect the required symbol length from the drop-down list for the
corresponding generation.
Insert double SKP in Loopback.Active stateSelect the required option (ON/OFF) from the drop-down list for
the corresponding generation.
SKP Orderd Set intervalSelect the required interval value from the drop-down list for the
corresponding generation.
Filter/Remove the received SKP Order SetSelect to enable the filter or remove the received SKP ordered
set.
Click to move to the next screen.
5. Configure JTOL Test: This tab allows you to configure the JTOL test settings.
92
Operating basics
Figure 74: JTOL Test: Configure JTOL Test
Table 53: JTOL Test: Configure JTOL Test
ParameterDescription
Frequency Settings
Frequency (MHz)Displays the table of frequencies in MHz for which JTOL test is to be performed.
Lower Amplitude Limit (UI p-p)Displays the table of lower amplitude limit values at which JTOL test starts for that
frequency.
Higher Amplitude Limit (UI p-p)Displays the table of higher amplitude limit values at which JTOL test ends for that
frequency.
Min FrequencyEnter the minimum frequency value.
Max FrequencyEnter the maximum frequency value.
# FrequenciesEnter the desired number of frequencies within the specified range.
GenerateClick to view the table populated with the frequencies.
DefaultClick to view the table populated with default list of frequencies.
JTOL Custom MaskSelect to enable the JTOL Custom mask.
On JTOL custom mask selection with the defined mask settings, mask will get generated
on the plot.
Table continued…
PCIe5.0 (CEM) Receiver Test Application Help 93
Operating basics
ParameterDescription
Mask Settings
Frequency (MHz)Displays the table of knee frequencies for the mask.
Amplitude (UI p-p)Displays the amplitude of SJ at each knee frequency.
Click to move to the next screen.
6. Configure Advanced JTOL Test: This tab allows you to configure the advanced JTOL test settings.
Figure 75: JTOL Test: Configure Advanced JTOL Test
Table 54: JTOL Test: Configure Advanced JTOL Test
ParameterDescription
Relaxation TimeEnter the amount of time BERT needs to relax before running BER for each amplitude
point.
Table continued…
94
Operating basics
ParameterDescription
Search AlgorithmsSelect the required search algorithm from the drop-down for JTOL test.
•Binary
•Downwards Linear
•Downwards Log
•Upwards Log
•Upwards Linear
•Binary + Linear
Jitter Steps
Jitter Freq RangeThe different frequency ranges can have different step size for SJ amplitude sweep.
•Freq <= 100 KHz
•100KHz < Freq <=1 MHz
•1 MHz < Freq <=10 MHz
•10 MHz <Freq <= 100 MHz
Step (UI p-p)Sets the SJ amplitude step size for different frequency ranges.
Sets the ratios for Downward and Upward-Log search algorithms.
No steps size is defined for Binary + Linear search algorithm.
Click to move to the next screen.
7. JTOL Test: This tab displays a graphical representation of JTOL test result. It includes the result table tab which displays the JTOL test
results in a tabular form.
PCIe5.0 (CEM) Receiver Test Application Help 95
Operating basics
Figure 76: JTOL Test: JTOL Chart
Table 55: JTOL Test: JTOL Chart
ParameterDescription
UnitsSelect the required unit from the drop-down list. The list contains the following elements:
•ps
•UI
p-p
StartClick Start to run the test.
Skip Link TrainingSelect if DUT is already in link.
96
Operating basics
Figure 77: JTOL Test (Result Table)
Table 56: JTOL Test (Results Table)
ParameterDescription
SJ Frequency (MHz)Displays the frequencies for which JTOL Test was performed.
SJ Setting (UI
Calibrated SJ (UI
#ErrorsDisplays the Error count reported by MX183000A.
Click to move to the next screen.
8. Link Training:This tab displays the loopback steps with its status in a tabular form.
/ ps)Displays the SJ Amplitude on the BERT.
p-p
/ ps)Displays the Calibrated SJ Amplitude.
p-p
PCIe5.0 (CEM) Receiver Test Application Help 97
Operating basics
Figure 78: JTOL Test: Link Training
Table 57: JTOL Test: Link Training
ParameterDescription
StepLists the different steps that are prerequisite for initiating link training
StatusIndicates the completion status of each activity
InitializeInitialize the BERT for performing link training
Set Preshoot and deemphasisSets the preset as per BERT Initial Preset in Link Training Configuration wizard
It sets all the calibrated Presets on the BERT from P0-P9
Setting StressesSets stresses as per the user selection in Configure Test wizard
Configure JTOL TestSets the BERT, DUT initial and Target Presets, Loopback mode (Recovery, Config),
Link and Lane number
Link TrainingInitiates the link training process in MX 183000A
Click to move to the next screen.
9. Save Results: This tab allows you to save the JTOL test results.
98
Operating basics
Figure 79: JTOL Test: Save Results
Table 58: JTOL Test: Save Results
ParameterDescription
Unique IDEnter the Unique ID of the calibrated equipment in the text box.
Generated ByEnter the user name in the text box.
Comments (Optional)Enter the required comments in the comment box.
SaveClick to save the results.
Click to complete the JTOL Test and close the wizard.
PCIe5.0 (CEM) Receiver Test Application Help 99
Programmatic interface commands
Programmatic interface commands
PREF:BERT:IP
This command sets or returns the IP address of the BERT used to connect with the PCIe5.0 (CEM) TekRxTest application.
Syntax
PREF:BERT:IP <IP address>
PREF:BERT:IP?
Inputs
<IP address> = <String>
Outputs
<String>
PREF:RTS:IP
This command sets or returns the IP address of the Real Time Oscilloscope used to connect with the PCIe5.0 (CEM) TekRxTest
application.
Syntax
PREF:RTS:IP <IP address>
PREF:RTS:IP?
Inputs
<IP address> = <String>
Outputs
<String>
CONN:BERT
This command sets or returns the connection status of the BERT with PCIe5.0 (CEM) TekRxTest application.
Syntax
CONN:BERT <0 | 1>
CONN:BERT?
Inputs
<0 | 1>
0 indicates to disconnect the BERT.
1 indicates to connect the BERT.
Outputs
<0 | 1>
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