Tektronix P7001 /IEEE 488 Instruction Manual

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INTERFACE

021

INSTRUCTION

-0206-00

Serial

MANUAL.

MANUAL

Number

INFORMATION

488

1978

First

Revised

Printing

JUL

DEC 1986

Copyright
Contents

form

without the

of

©

1978

this

Tektronix,

publication

written

permission

may

Inc.

not

All

be

reproduced

of

Tektronix,

rights

reserved.

in

any

Inc.

Products

by

TEKTRONIX,

registered

is

a

Printed
are

Each
or

designates

of
unique

United

of

Tektronix,

U.S.

and

foreign

TEK,

trademarks

USA.

trademark

Specification

registered

in

reserved.

INSTRUMENT

instrument

stamped

has

the chassis. The

on

the

country

the serial number

each instrument. Those

to

States

have

patents

SCOPE-MOBILE,

a

six

manufactureisidentified

Inc.

of

its

and

Tektronix,

of Tektronix

SERIAL NUMBERS

and/or

and

subsidiaries

pending

price

serial number

first

of

manufacture. The

are

assigned

unique

as

digits.

follows:

covered

are

patents.

and

lnc. TELEQUIPMENT

U.K.

Limited.

change

on

a panel

insert,

number

last

sequentially
manufactured

The

country

privileges

tag,

letter

or

five

digits

and

in

are

are
the

of

8000000

100000
200000
300000
700000

Tektronix,
Tektronix

Tektronix United

Inc.,

Guernsey,

Sony/Tektronix,

Tektronix
The

Holland.

Netherlands

Beaverton,

Ltd.,

Kingdom,

Japan

NV,

Heerenveen.

Oregon,

Channel

Ltd.,

USA

islands

London

TABLE

OF

CONTENTS

SECTION

SECTION

SECTION

THE

QUALIFIED

DO

NOT PERFORM
OPERATING

IN

DO

SO.

SECTION

SECTION

SECTION

APPENDIX

APPENDIX

APPENDIX

1

2

3

FOLLOWING

PERSONNEL

4

5

6 REPLACEABLE

A

B

C

GENERAL INFORMATION

INSTALLATION

PROGRAMMING INFORMATION

WARNING

SERVICING

ONLY.

ANV

SERVICING

INSTRUCTIONS

MAINTENANCE

DIAGRAMS

DATA

HP

9825

SUPPLEMENTAL INFORMATION

INSTRUCTIONS

TO

AVOID
OTHER

UNLESS

SHEETS

PROGRAMMING

YOU

PARTS

FOR

ARE

PERSONAL

THAN

THAT

ARE

QUALIFIED

INFORMATION

BV

USE

INJURV,

CONTAINED

TO

Figure

2—1

waI—‘DWN

WWWL‘ONNN

3—5

3—6

4—1

4—2A
4—2B

4—3

4—4

LIST

OF

Description

Device Address

The

Setting

P7001/IEEE

IEEE

Data

P7001

DPO

Location

Status

HSA

Basic

P7001
P7001

Funct

Component

Funct

Component

488

Transfer

4K

Card

(Timeslots)

Word

Status

Block

Bus
Bus

Block

Block

P123

488

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Memory

Address

Readout

of

and
Formats

Register

Diagram

Read

Write

Diag.,

Locator

Diag.,

Locator

LIST

ILLUSTRATIONS

Switch

Interface

Connector

Delimiters

Map

Map

Field

Operation

Operation

OF

SW412

Strap Option

Installation

Pin

Assignments

&

Terminators

Words

Bit

MPU/GPIB

and

0

Addresses

Assignments

PIA/P7001

TABLES

Characters

&

Bd

&

Bd

Page
2-1

2 2
2

3

2—4

3 5
3

8

3

9

3—12
3—14
3—15

4—2

4—9

4—9

4—11

4-12

Table

1—1

3—1

3—2

Description

P7001/IEEE

Setting

Query

Commands

Commands

488

Interface

Capability

Page

1-2

3—6

3—7

262531‘

P7001/IEEE

488

INTERFACE

P7001/IEEE

Interface

INTRODUCTION

manuaI

This

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Processing

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devices,

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GENERAL INFORMATION

both

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interconnect

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in

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Genera]

IEEE

488

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system

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data

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and

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and

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Processor

with

compatibIe

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a

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by

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information

021—0206-00.

No.

section

IEEE

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Standard

of

with

severaI

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as

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of

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(GPIB),

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the

Unit,

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by

referencing

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staIIed

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CAPABILITY

capabiIities

the

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CHARACTERISTICS

P7001/IEEE

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Source

Acceptor

Function

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Handshake(AH)

TaIker(T)

Listener(L)

Service

Remote—LocaI(RL)

ParaIIeI

Device

Device

Request(SR)

PoII(pP)

CIear(DC)

Trigger(DT)

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1—1

P7001/IEEE

IEEE

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488

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.11

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488

Interface

Section

CapabiIity

Interface

CompIete(SH1)

CompIete(AH1)

No

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None(DCQ)

None(DTg)

None(cg)

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(SR1)

Mode(T6)

Mode(L4)

1—2

P7001/IEEE

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INTRODUCTION

This

Tektronix

section

488

compatible

Address

section

P7001/IEEE

of

and

controllers.

INSTALLATION

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P7001/IEEE

sor

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option

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side for

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P7001/IEEE

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INTRODUCTION

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system

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Replacement

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improvements

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number.

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parts.

number.

part

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number

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the

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part

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the

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further

utilized

ACTR ACTUATOR
ASSY ASSEMBLY
CAP
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CKT CIRCUIT
COMP
CONN CONNECTOR
ELCTLT
ELEC

INCAND

LED

NONWlR

of

space

Item

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CAPACITOR
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COMPOSITION

ELECTROLYTIC
ELECTRICAL
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LIGHT

NON

an

limitations.

identification. the

EMITTING DIODE

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ITEM NAME

Name

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US

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PLSTC
QTZ
RECP
RES

RF

SEL
SEMICOND
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VAR
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XTAL

description

appear

by a

as incomplete.

Handbook

PLASTIC

QUARTZ
RECEPTACLE
RESISTOR
RADIO

FREQUENCY
SELECTED
SEMICONDUCTOR
SENSITIVE

VARIABLE

WIREWOUND
TRANSFORMER
CRYSTAL

H6—1

colon

can

(2),

For

be

6-1

Replaceable

Mfr.

Code

01121

01295

0A713
07263

27014
32159
3h630

50434
56289
59660

72982

80009

81073
90201

91418

Electrical

Parts—021-0206-00

Manufacturer

ALLEN-BRADLEY
TEXAS

INSTRUMENTS,

GROUP

MOTOROLA,
FAIRCHILD
FAIRCHILD
NATIONAL
WEST-CAP

TYCO

HEWLETT-PACKARD

SPRAGUE

TUSONIX

ERIE

TEKTRONIX,
GRAYHILL,

MALLORY

R.

P.

RADIO

MALLORY

INC.,

SEMICONDUCTOR,

CAMERA

SEMICONDUCTOR
ARIZONA

FILTERS

DIV.,

ELECTRIC

INC.

TECHNOLOGICAL

INC.

INC.

CAPACITOR

MALLORY

MATERIALS

AND

COMPANY,

CROSS

COMPANY

INDEX—MFR.

INC.,

SEMICONDUCTOR

AND

INSTRUMENT

CORP.

INC.

COMPANY

CO.

PRODUCTS,

DIV.

CO.,

AND

COMPANY,

CO.,

INC.

INC.

SEMICONDUCTOR

DIV.

PROD.

DIV.

OF

CORP.

A

INC.

OF

OF

DIV.

P.R.

CODE

NUMBER

Address

2ND

1201

BOX

P

0

EXPRESSWAY

5005

464

2900
2201
3940
640

87

2155
644

P

561

3029 E.

P.

4242

5012,

MCDOWELL

E

ELLIS

SEMICONDUCTOR

ELVIRA

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W.

MONTECITO

PAGE

MARSHALL

N

FORBES

W.

12TH

BOX

500

0

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WASHINGTON

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0.

W

BRYN

MANUFACTURER

TO

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SOUTH

13500

RD,P0

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ROAD

ROAD

MILL

ST.

BLVD

ST.

AVE.,

372

MAWR

N

CENTRAL

BOX

DR.

PO

STREET

BOX

20923

373

State,

City,

MILWAUKEE,

DALLAS,
PHOENIX,

MOUNTAIN

SANTA

TUCSON,
PHOENIX,

PALO

NORTH

TUCSON,

ERIE,

BEAVERTON,

LA

TX

CLARA,

AZ

ALTO,

ADAMS,

AZ

PA

GRANGE,

AZ

VIEW,

AZ

16512

INDIANAPOLIS,

CHICAGO,

IL

WI

75222

85036

CA

85706

85019

CA

MA

85705

OR

IL

60646

Zip

53204

CA

95051

94304

01247

97077

60525

IN

9A052

46206

REV

JUL

1982

Replaceable

Electrical Parts—021-0206-00

thNo.

A1

22

01
02
06
09
010
013

014
017
018
019
022

026

027
028
029
04o
041
042

043
044

0100

0111
0112
0113

0114
0115
0116
0117

c118

0119

c120

0123

c125

0209

0210

0211

0212
0213

0214

0215
0216
0219

0220

0225
0310
0311
0312
0313

0317
c321

c322

0323

c324

0325

Tektronix

No.

Pan

670-4882-03

670—4883-03

290—0296-00
283-0024—00

283-0024-00
283-0024-00

283-0000—00

283-0150-00

283-0024—00
283-0108—00
283—0000-00

283-0024-00
283-0024-00

283—0024-00

283—0024-00

283-0024-00

283-0024—00

283—0024—00

283-0024—00

283—0024—00

283-0024—00
283—0000-00
283-0024—00

283-0024-00
283-0024-00

283-0024—00

283—0024-00
283-0024—00
283-0024—00
283—0024-00
283—0024-00

283—0024—00

283-0024400
283-0024-00
283-0024-00
290-0296-00
283-0024-00

283-0024—00

283-0024-00

283-0024—00

283—0024—00
283—0024—00

283-0024-00
283-0024-00

283-0024-00

283-0024—00
283-0024—00

283-0024-00

283—0024-00
283-0024—00

283-0024—00

283-0024-00

283—0024-00
283—0024-00
283-0024—00
283—0024-00

Serial/Model

EH

No1

Dscont Name

BOARD

BOARD

ASSYzMPU/GPIB

ASSYzPIA/P7001

DI:0.1UF,+80-20%,50V
01:0.1UF,+8o—2oz,50v
DI:0.1UF,+80-20%,50V

01:0.oo1up,+100-oz,500v

DI:650PF,SZ,200V

DI:220PF,lOZ,200V
DI:0.00IUF,+100—OZ,500V
DI:O.1UF,+80=202,50V
DI:O.lUF,+80-202,50V

01:0.1UF,+80-2oz,50v

01:0.1UF,+80-2oz,5ov

DI:0.1UF,+80—202,50V

DI:0.1UF,+80—ZOZ,50V

01:0.1UF,+8o-2oz,50v
01:0.1UF,+80-2oz,50v
01:0.108,+80-2oz,50v

01:0.1UF,+8o-2oz,50v

DI:0.00IUF,+100-OZ,500V
DI:0.IUF,+80-ZOZ,50V
DI:0.1UF,+80-20%,50V

01:0.1UF,+8o-2oz,50v

DI:O.lUF,+80~ZOZ,50V

DI:0.IUF,+80-ZOZ,50V
DI:O.1UF,+80-ZOZ,50V

DI:0.1UF,+80—ZOZ,50V

DI:0.IUF,+80-ZOZ,50V
DI:O.1UF,+80-ZOZ,50V
DI:0.IUF,+80~20Z,50V

DI:0.1UF,+80—202,50V
DI:0.1UF,+80-20%,50V
DI:O.1UF,+80-20Z,SOV

DI:0.lUF,+80—2OZ,50V
DI:O.1UF,+80-2OZ,50V

DI:0.1UF,+80-202,50V
DI:0.1UF,+80-202,50V

01:0.1UF,+80—2oz,50v

DI:O.1UF,+80—202,SOV

DI:0.1UF,+80-202,50V

01:0.1UF,+80-2oz,50v

DI:0.1UF,+80-ZOZ,SOV
01:0.1ur,+8o—2oz,50v
DI:0.1UF,+80-202,50V

01:0.1UF,+8o—2oz,50v

DI:0.1UF,+80-202,50V
DI:0.1UF,+80-ZOZ,50V

DI:0.1UF,+BO-ZOZ,50V
DI:0.1UF,+80-202,50V

DI:0.1UF,+80—ZOZ,50V

DI:0.1UF,+80-202,50V
DI:0.1UF,+80-202,SOV

01:0.1UF,+80-2oz,50v

0x2
0x2

CAP.,FXD,ELCTLT:lOOUF,20%,20V
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER DI:0.1UF,+80—20%,SOV
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,ELCTLT:lOOUF,20Z,20V

CAP.,FXD,CER

CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

&

Descflpfion

Mfr

Code

80009
80009 670—4883-03

56289
72982
72982
72982
59660
59660

72982
56289
59660
72982
72982
72982

72982
72982
72982
72982
72982
72982

72982
59660
72982
72982 8121N08325U01042
72982
72982

72982
72982
72982 8121N083ZSU01042
72982
72982
72982

72982
72982
72982 8121N083Z5U01042
56289
72982
72982

72982
72982
72982
72982
72982
72982

72982
72982

72982

72982
72982 8121N083ZSU01042
72982

72982 8121N08325U01OAZ
72982
72982
72932
72982
72982

MfrPan

670—4882-03

150D107X0020S2

8121N0832500104z

8121N08325U01042

8121008325001042
831-519-Z5U-102P
835-5158651J

8121N0832500104z

272013

831-519-250-102P

8121N083ZSU01042

3121N0832500104z
8121808325001042

8121N08325U0104Z

8121808325001042

8121N08325U01042

8121N083zsuo1o4z
8121808325001042
8121808325001042

8121N0832500104z

831—519—250-1029

8121N0832500104z

8121N083Z5U01042

8121Nos3z500104z

8121N083ZSU01042

8121N083zsuo104z

8121N08325U01042

8121N083zsuo104z

8121N08325U01042

8121N083zsuo104z
8121N08325001o4z

1500107x002082
8121008325001042

8121N083ZSU01042

8121808325001042
8121N0832500104z
8121N083zsuo104z
8121808325001042

8121N083Z5UOIOAZ

8121008325001042

8121N083ZSU01042

8121808325001042
8121N0832500104z
8121N08325001042

8121N083Z5001042

8121008325001042
8121N0832500104z

8121808325001042
8121N08325001o4z
8121808325001042

Number

REV

JUL

1982

6-3

Replaceable

Electrical Pans—021-0206-00

Tektronix

No.

Part

No.

Ckl

0412

0413

041a

283-0203—00

283=0024~00

283m0052—OO

0415 283e0331-00

0415
0417

0420

0425

290—0536-00
283—0003-00

283~0203—00

283-0203-00

08310 152-0168-00

CRAIS

CR419

1315

020
021

813
R16
817
818
820
821

R22
824
828
838 315-0102—00
839

R42

800
8100
8120
8121
8122
8123

R124
R216

8220

8311

8313

8318

8319
R324
R325

8411.

R415

8418

814012

U1

U2

03

U4
U5
U6

U7
US
U9

152-0322-00

152-0322—00

108-0317-00

151-0190-00
151-0188-00

315—0181~00

315-0102-00

315—0181-00 RES.

315=0103-00

31590472—00

315=0102-00

315-0181-00

315-0102—00
315-0102—00

315—0102-00
315—0102-00

315—0103-00

315-0910-00

315—0102—00

315-0102—00

315-0102-00

315-0302-=00

315—0302—00

315-0102-00
315-0102-00

315-0102—00

315-0102-00
315-0620-00

315-0620-00

315—0102—00
315—0102—00

315-0821-00
315-0821-00
315-0103-00

260—1827-00

156-0145—00

156=0145=00

156—0145—00

156‘0145-00

156-0653-00

156-0653-00

156-0653-00

156-0653-00
156-01h5-00

Serial/Model

Eff

No.

Dscont

&

Name

CAP.

,FXD,CER
CAP.,FXD,CER
CAP.,FXD,CER

CAP,

,FXD,CER

CAP.

,FXD,ELCTLT:10UF,ZOZ,25V
CAP.,FXD,CER

CAP.,FX'D,CER
CAP.,FXD,CER

SEMICOND
SEMICOND
SEMICOND

COIL,RF:FIXED,15UH

TRANSISTOR:SILICON,NPN
IRANSISTOR:SILICON,PNP

DEVICE:ZENER,O.4W,12V,SZ
DEVICE:SILICON,15V,HOT
DEVICE:SILICON,15V,HOT

88s.,81m,c11888:180

RES.,FXD,CMPSN:1K

,FXDfiCMPSNdSO

888.

,FXD,CMPSN:10K
RES.,FXD,CMPSN:4.7K
RES.,FXD,CMPSN:1K

RES.,FX'.D,CMPSN:180
RES.,FXD,CMPSN:1K

888,880,08888118

RES.,FXD,CMPSN:1K

888.

,FXD,CMPSN:1K
RESD,FXD,CMPSN:1K

888.

,FXD,CMPSN:10K
RES.,FXD,CMPSN:91
RES.,FX.D,CMPSN:1K
RES.,FXD,CMPSN:1K
RES.

,FXD,CMPSN:1K

888.

,FXD,CMPSN:3K

888.

,FXD,CMPSN:3K
RES.,FXD,CMPSN:1K
RES.,FXD,CMPSN:IK
RES.,FXD,CMPSN:1K

888,,81m,08888:11<

RES.,FXD,CMPSN:62

RES.,FXD,CMPSN:62

RES.

,FXD,CMPSN:1K

RES.-,FXD,CMPSN:1K
RES.,FXD,CMPSN:820 OHM,SZ,O.25W
RES.,FXD,CMPSN:820 OHM,SZ,O.25W
RES.,FXD,CMPSN:1OK

SWITCH,ROCKER:5,SPST

MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD

MICROCKT,INTFC:QUAD
MICROCKT,INTFC:QUAD

MICROCKT,INTFC:QUAD
MICROCKT,INTFC:QUAD

MICROCIRCUIT,DI:QUAD

Descrlption

DI:0.47UF,ZOZ,50V

01:0.108,+80-207.,50v
01:10588,1z,500v
01:4398,2z,100v

DI:0.0lUF,+80—ZOZ,ISOV

DI:0.h7UF,202,50V

01:0.4708,202,5ov

0HM,52,0.25W

0HM,SZ,0.25W

01m,5z,0.25w

01m,5z,0.2sw

OHM,SZ,O.25W

0HM,52,0.25W

0118,5z,0.25w

01m,5z,0.2sw

OHM,52,0.25W

01m,5z,o.2sw

0HM,SZ,O.25W

01m,5z,0.25w

OHM,SZ,0.25W

088,5z,0.25w

0181,5z,0.258
01m,5z,0.25w

01m,5z,0.2sw

0m,5z,0.2sw

0HM,SZ,O.25W

0818,520258

Ol-lM,SZ,0.25W
OHM,SZ,0.25W
OHM,SZ,0.25W
OHM,SZ,O.25W

011M,sz,o.25w

OHH,SZ,0.25W

01m,5z,0.25w

01m,5z,0.2sw

2-INPUT

2-INPUT

2-INPUT

Z-INPUT
UNIFIED
UNIFIED

UNIFIED
UNIFIED

2-INPUT

BUS XCVR

BUS XCVR

BUS XCVR

BUS XCVR

Pos

POS
POS
POS

POS

CARRIER
CARRIER

NAND

NAND

NAND

NAND

NAND

BFR
BFR

BFR

BFR

BFR

Mfr

Code

72982
72982
72982
72982
90201
91418

72982
72982

04713
50434
50434

32159

07263
04713

01121
01121
01121
01121
01121
01121

01121
01121
01121
01121
01121
01121

01121
01121
01121
01121
01121
01121

01121
01121
01121
01121
01121
01121

01121
01121
01121
01121
01121
01121

81073

80009
80009

80009

80009
80009
80009

80009
80009
80009

Part

Number

Mfr

8131N075E474M

8121808325001042

OBAISAICOGOlOSOF
805—5051841306
'I‘DClOéMOZSFL

SP1032151=4R9

8131N075EA74M

8131807584748

SZG35009K4

5082-2672
5082-2672

715018

3032677
SPS6868K

081815
081025
081815
081035

084.725

081025

081815
081025
081025
081025
081025
081025

081035
089105
081025
081025
081025
083025

083025
081025
081025
081025
081025
086205

086205
081025

081025

088215
088215
081035

7683053

158—0145—00

156—0145=00

156=0145-00

156-0145—00

156-0653000
156-0653-00

156-0653-00
156-0653-00

156-0145—00

6-»4

REV

JUL 1982

Replaceable

Electrical

Parts—021-0206-00

thNo.

U10

U11
U12
U13
U14

01s

U16
U17
U18
U19

U20
021

022

U23

024
025

U26
U27

U28

029
040

U41

042

U43

U44

04s

0113

0114
0115

U116

U117
U118
U119
U120

U121

0122

U123
U125

0212

U213
U214

0215

0210
0217

U218

0219

U220
U225

0310

U311

U312
U313
U314
U315

U316

0317

U318

Tektronix

N0.

Pan

156-0058—00

156-0129-00
156-0030-00
156-0043-00

156—0041-00
156—0030-00

156-0041-00
156-0072-00
156-0043-00
156-0047-00
156-0058-00

156—0061—00

156-0058-00

156-0385-00

156-0222—00

156-0222-00

156-0222—00

156-0427-00

156—0427—00

156—0427-00
156-0716—00

156-0716-00
156-0716-00
156-0716-00

156-0145-00

156-0072—00
160—0180-00

160-0179-00

160—0178—00

156-0061-00

156-0916-00
156-0535-00
156-0531-00
156-0531-00
156-0427-00

156-0427—00

156-0427-00
156-0849-00

160—0177-00

160-0176-00
160-0175-00
160-0174-00

156-0078—00

156-0058-00
156-0385-00
156-0535-00
156-0426-00
156-0849-00

156—0402-00

156-0139-00

156-0285—00
156-0382—00
156—0382-00

156-0382-00

156-0464-00
156-0464-00

156—0535—00

Serial/Model

Efi

N0.

Dscont

&

Name

Descnpfion

MICROCIRCUIT,DI:HEX.INVERTER
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:DUAL
MICROCIRCUIT,DI:QUAD

MICROCIRCUIT,DI:DUAL

MICROCIRCUIT,DI:MONOSTAELE

MICROCIRCUIT,DI:QUAD
HICROCIRCUIT,DI:TPL
MICROCIRCUIT,DI:HEX.INVERTER
MICROCIRCUIT,DI:SGL,BCD

2-INPUT
2-INPUT
2-INPUT

D-TYPE

2—INPUT

D-TYPE

2—INPUT

3-INPUT

TO

MICROCIRCUIT,DI:HEX.INVERTER

MICROCIRCUIT,DI:HEX.INVERTER
MICROCIRCUIT,DI:HEX.LATCH
MICROCIRCUIT,DI:HEX.LATCH
MICROCIRCUIT,DI:HEX.LATCH
MICROCIRCUIT,DI:PERIPHERAL

MICROCIRCUIT,DI:PERIPHERAL
MICROCIRCUIT,DI:PERIPHERAL

8

MICROCIRCUIT,DI:RAM,128
MICROCIRCUIT,DI:RAM,128
MICROCIRCUIT,DI:RAM,128
MICROCIRCUIT,DI:RAM,128

MICROCIRCUIT,DI:QUAD

MICROCIRCUIT,DI:MONOSTAELE

MICROCIRCUIT,DI:1024
MICROCIRCUIT,DI:1024
MICROCIRCUIT,DI:1024
MICROCIRCUIT,DI:SGL,BCD

MICROCIRCUIT,DI:EIGHT
MICROCIRCUIT,DI:TRI-STATE
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD

x

8

X

a

x

X

8

2-INPUT

x

s

STATIC,PRGM

0

x

STATIC,PRGM

3

x

STATIC,PRGM

TO

2-INP

HEX

UNIFIED

UNIFIED
MICROCIRCUIT,DlzPERIPHERAL
MICROCIRCUIT,DI:PERIPHERAL

MICROCIRCUIT,DI:PERIPHERAL
MICROCIRCUIT,DI:QUAD

MICROCIRCUIT,DI:1024

MICROCIRCUIT,DI:1024

MICROCIRCUIT,DI:1024
MICROCIRCUIT,DI:1024

MICROCIRCUIT,DI:1

INTERFACE

x

X

X

X

16

0F

a

8
8
8

STATIC,PRGM
STATIC,PRGM
STATIC,PRGM
STATIC,PRGM

DECODER-DEMUX

MICROCIRCUIT,DI:HEX.INVERTER
HICROCIRCUIT,DI:HEX.INVERTER
MICROCIRCUIT,DI:TRI-STATE

MICROCIRCUIT,DI:MICROPROCESSOR

MICROCIRCUIT,DI:QUAD

HEX

INTERFACE

MICROCIRCUIT,LI:TIMER
MICROCIRCUIT,LI:DUAL
MICROCIRCUIT,LI:VOLTAGE
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD
MICROCIRCUIT,DI:QUAD

MICROCIRCUIT,DI:DUAL
MICROCIRCUIT,DI:DUAL
MICROCIRCUIT,DI:TRI-STATE

LINE DRIVER

REGULATOR

2-INPUT
2-INPUT

2—INPUT

4-INPUT

4-INPUT

HEX

GATE

GATE

NAND

POS

NOR

GATE

FLIP-FLOP

GATE

NAND

FLIP-FLOP

NOR GATE

NAND GATE

0000052

NAND

DECODER

BFR

BUS

XSVR

BUS

XSVR

GATE

GATE

DIP 01295

ADPTR

BFR

DIP

MV,TTL,14

P05

POS

050

INTERFACE ADPTR

INTERFACE
INTERFACE ADPTR

STATIC
STATIC
STATIC
STATIC

POS

MV,TTL,14

DEC

3-STATE

BUFF

BUS XCVR

BUS XCVR

INTERFACE ADPTR

INTERFACE ADPTR

INTERFACE ADPTR

BUFF

NAND GATE

NAND
NAND GATE

NAND

NAND GATE

BUFF

Mfr

Code

80009
80009
01295
80009
27014
01295

27014

MfrPan

156-0058-00
156-0129-00

SN7400(N

156-0043-00

DM7474N

SN7400(N

DM7474N

SN74121(N
80009
80009
80009
01295

80009

80009
30009

00009
80009

04713

04713

04713

04713
04713

04713

04713

80009
01295
80009
80009
30009
01295

80009
27014
27014
27014
04713

04713

04713
80009

156-0043—00

156-0047-00

156-0058-00

SN7442<N

156-0058—00

156-0385-00

156-0222-00

156-0222-00

156-0222—00

M06820(L

MC6820(L
MC6820(L

MCM68108
MCM68108
MCM68105
MCM6810$

156-0145-00

5N74121(N
160-0180—00

160-0179-00
160-0178-00

SN7442(N

156—0916-00

DM8097M
DM8833N
DM8833N

MC6820(L
MC6820<L

MC6820(L

156-0849-00
80009 160-0177-00
80009

80009
80009

80009

80009

80009
27014

04713
80009

27014

01295

27014 LM340T-12

01295
01295
01295

07263
07263 74L520PC
27014

160-0176-00

160-0175-00

160-0174-00

156—0078—00

156-0058-00
156-0385-00

DM8097M

MC6SOOS

156-0849-00

LMSSSCN

SN75150P

SN74LSOO(N
SN74LSOO(N
SN74LSOO(N

74LSZOPC

DM8097M

Number

OR

J)

OR

J)

OR

J)

on

J)

0R

P)

P)

00

OR

F)

OR

J)

OR

J)

0R

P)

OR

P)

OR

P)

OR

OR
OR

OR

DC

OR

00

J)
J)
J)

REV

JUL 1982

6-5

Replaceable

Electrical

Pans—02141206430

Tektronix

No.

W

0319

11320

U321
11322
11323

U324

U325

11413

U414
U418 156-0323—00

0420

Y416

No.

Part

156-0145—00

lseeoszs-oo

156°0138°00

156-0383—00
156»0480=OO

156°0849-00

156-0849-00
156-0041-00
156-0718-00

156—0206-00

158-0056-00

Serial/Model

N0.

&

Name

MICROCIRCUIT,DI:QUAD

mcxocmcuu,01:1111:5st

MICROCIRCUIT,LI:CORE
MICROCIRCUIT,DI:QUAD

mcaocmcuummmn

MICROCIRCUIT,DI:QUAD

MICROCIRCUIT,DI:QUAD

uxcxocmcumnnnuu

MICROCIRCUIT,DI:TRIPLE

mcaocmcuu,01:111:x.

MICROCIRCUIT,DI:DUAL

UNIT,QTZ:4MHZ,0.003Z,SEERIES

xm,

Description

2-INPUT

LINE

2-»111110'1

2—mpur

INTERFACE

INTERFACE

11-11111:

INVERTER

SCH/SINK

max

RECEIVER

FLIP-FLOP

3-INP

31211

11mm

905

11111-1?

NOR

cm

AND

am:

BUS XSVR

XSVR

BUS

PCS-NOR GATES

DRVR

MEM

PR

Mfr

Code

80009
27014
01295
80009
01295
80009

80009

27014
80009
01295
01295

34630

Mfr

Part

Number

156-0145-00

DM8097M
SN7SLSQN

156=0383-00

SNMLSOBW

156—0849-00

156-0849-00

01174741:

156-0718—00

5117450411

SN75325<N

150—6070

OR

OR

J)

J)

643

REV

JUL

1982

REPLACEABLE

Section

021-0205.oo

6-

PARTS

Replacement

Tektronix.

lnc.

Changes

accommodate

and to

give
developed
important.

when
information
number.

improved

serial

If

a

part

part,

representative

number.

Change

manual.

in

the

description

Name
Name
can

by

sometimes

may

identification.

utilized

be

FIGURE

in

Items

numbers

to

ORDERING

parts

Office

Field

Tektronix

to
improved

the benefit

you

in

our

engineering

ordering

in

your

number.

have

you

your

will

contact

information.

List.

Parts

colon

a

the

where

this

section

illustrations.

the

available

are

representative.

or

instruments

components

of

the

parts.

Part

order:

modification

and

has been

ordered

local Tektronix,

concerning

you

if

any,

NAME

ITEM

Item

an

Because

it).

as

appear

Federal

US.

possible.

INDEX

AND

referenced

are

MECHANICAL

INFORMATION

from

or

through

your

are

as they

circuit

latest

department.

include the

to

number.

number

replaced

lnc.

is

located at

is

Name

of

space

incomplete.

Cataloging

NUMBERS

sometimes

become

instrument

any

separated

limitations.

figure

by

available.

improvements

It is

therefore

following

if

applicable.

with

a new

Office

Field

change

the

rear

from

further

For

Handbook

and

made

type

in

of

an

local

part

this

the

Item

Item

HES-1

index

PARTS

INDENTATION

This

mechanical

in

the

2

Detail
Attaching

it

items

Followingisan

description

345

Part of

Parts
Attaching

mounts.

parts

relationships.
used

to

or

or
or

the

1

Assembly
Attaching

Attaching

item

lndented

indentation.

Attaching
specified.

parts

column.

and/or

Component

for

“"

Assembly

END

parts

Assembly

for

parts

END

""

of Detail Part

parts

END ATTACHING

Parts

always

while the

are

must

of.

part

be

purchased separately.

ATTACHING

Detail

ATTACHINGPARTS

for

detail

list

example

and/or

Parts

appear

included

and

SYSTEM

is

indented

of

Name

and/or

PARTS

Component

Part

Detail

0/

PARTS

in

the

are

parts

to

the

indentation

&

Description

Component

""

Part

indentation

same

indented

the

with.

unless otherwise

indicate item

system

the

to

right.

next

higher

as

a

ACTR
ADPTR ADAPTER
ALIGN ALIGNMENT

AL

ASSEM ASSEMBLED
ASSY
ATTEN
AWG AMERICAN WIRE
BD
BRKT BRACKET
BRS BRASS
BRZ BRONZE
BSHG
CAB CABINET
CAP CAPACITOR
CER CERAMIC
CHAS CHASSIS
CKT CIRCUIT
COMP COMPOSITION
CONN
COV COVER
CPLG
CRT
DEG DEGREE
DWR

INCH

SIZE

NUMBER
ACTUATOR

ALUMINUM

ASSEMBLY
ATTENUATOR

BOARD

BUSHING

CONNECTOR

COUPLING
CATHODE

DRAWER

RAY

GAGE

TUBE

ABBREVIATIONS

ELCTRN
ELEC
ELCTLT
ELEM
EPL ELECTRICAL
EOPT

EXT

FIL

FLEX

FLH
FLTR

FR

FSTNR
FT FOOT
FXD

GSKT

HDL

HEX
HEX
HEX

HLCPS HELICAL
HLEXT

HV

IC

ID

IDENT
IMPLR

ELECTRON
ELECTRICAL
ELECTROLVTIC

.

ELEMENT

EQUIPMENT
EXTERNAL
FILLISTER HEAD
FLEXIBLE
FLAT HEAD
FILTER
FRAMEorFRONT
FASTENER

FIXED
GASKET
HANDLE
HEXAGON
HEXAGONAL

HD

HEXAGONAL SOCKET

SOC

HELICAL
HIGH
INTEGRATED
INSIDE
IDENTIFICATION
IMPELLER

VOLTAGE

DIAMETER

PARTS LIST

HEAD

COMPRESSION
EXTENSION

CIRCUIT

IN

INCAND
INSUL

mm,

LPHLDR
MACH
MECH
MTG
NIP
NON

oeo

OD
OVH

BRZ

PH
pL
PLSTC
PN
PNH
PWR
RCPT
RES
RGD
RLF
RTNR
SCH
SCOPE
SCR

INCH
INCANDESCENT
INSULATOR
INTERNAL
LAMPHOLDER
MACHINE
MECHANICAL
MOUNTING SLFLKG

WIRE

NIPPLE
NOT
ORDER
OUTSIDE
OVAL
PHDSPHOR
PLAIN
PLASTIC
PART NUMBER
PAN
POWER

RECEPTACLE
RESISTOR
RIGID
RELIEF
RETAINER
SOCKET
OSCILLOSCOPE
SCREW

WIRE

HEAD

or

HEAD

ev

WOUND

DESCRIPTION

DIAMETER

BRONZE

PLATE

HEAD

SE
SECT
SEMICOND
SHLD
SHLDR
SKT
5L

SLVG
SPR

so

SST
STL

sw

T

TERM
THD
THK
TNSN
TPG
TRH

v

VAR

w

wSHR

XFMR
XSTR

END

SINGLE

SECTION
SEMICONDUCTOR
SHIELD
SHOULDERED
SOCKET
SLIDE
SELF-LOCKING
SLEEVING
SPRING
SQUARE
STAINLESS
STEEL
SWITCH
TUBE
TERMINAL
THREAD
THICK
TENSION
TAPPINC
TRUSS HEAD
VOLTAGE
VARIABLE
WITH
WASHER
TRANSFORMER
TRANSISTOR

STEEL

Repmceame
021-0206-00

hfifr.

Code

04919
05820
06540

08261
09922
22526

70868

77900

70189

00009

93907

TK0435

Manufacturer

COMPONENT

E0

NITE
OIV
SPECTRA-STRIP

BURNOY CORP

00
00

ONPHENOL

R

AN

SHOKEPROOF

OIV

ILLINOIS

SHAKEPRODF

TEXTRONIX

TEXTRON

CONCOR

LENIS

MechanMaIPans—

CROSS

MFG

SERVICE

G

AND

NOKEFIELO

ONATON ELECTRONIC

CORP

PONT E

I

PONT CONNECTOR SYSTEMS

OPEROTIONS

F

ALLIED

OF

SCREN

CO

ILLINOIS

TOOL

DIVISION

INC

INC

OIV

ENGINEERING

0N ELTRO CO

BE NENOURS

TOOL

NORKS

CO

INC

INDEX

INC

ONO

WORKS

-

HRRONORE

INC

CO

MFR.

Address

1

60

446

7100

RICHARDS

30

33

SOINT

ST

4900

P0BOX

600

4114

CODE

COMPONENT

RUOUBON

BLAKE ST

LflHPSON

OVE

HUNTER

FRONKLIN

E

CHARLES

CHARLES

H

S

GRIFFITH

500

OVE

18TH

S

PEORIO

NUMBER

PORK

R0

AVE

LONE

ST

R0

R000

OR

MANUFACTURER

TO

(fity.

NEST

NAKEFIELO

NEH HOVEN

GOROEN GROVE

NORNOLK CT

CAMP

OONBURY

ELGIN

ELGIN

BEAVERTON

ROCKFORD

CHICOGO

State.

BRIOGENOTER

NO

01880

CT

06515

CD

06852

PO

HILL

17011

CT

06810

60120

IL

60120

IL

OR

97077

61101

IL

60609

IL

Zip

(Made

MO

92642

02379

6-8

REV

DEC

1986

a

Fig.

Index
No.

1-1

-2

-3

-4

-5

-6

Tektronix

No.

Part

380-0499-00

211-0008-00

211—0504-00

134-0067-00

214-1573-00
380-0511-00

-7 210-0586-00

-8 211-0097-00

211-0009—00

-9

-1O

385-3778-00

-11

211-0101-00

198-3057-00

-12

~13

----------

~14

211-0115-00

129-0561-00

-15

386-3370—01

-16

131-0993—00

-17

131-0608-00

-18

136—0623-00

-19

—20

136-0260-02

—21

136-0289-02
136-0514-00

-22

~23

136-0252-07

214—0579—00

-24

-25

----------

—26

210—0586-00

-27 211-0097-00

214—1967-00

-28

136—0634-00

-29

136-0578-00

-30

-31 129-0466-00

211—0116-00

-32

-33 129-0662-00

-34

211-0116-00

-35

-------

—35

131—0608—00
136-0579—00

-37

136—0623—00

-38

136-0252-07

-39

-4O

136-0260-02

136—0269—02

-41

-42 214-0579-00

175-0830-00

-43

—44

352—0165—00

131-0707-00

-45

070-2623-00

012—0630—01

012—0630-03

Serial/Assembly

Effective

8010100
8010274

8010273

No.

Dscont

Qty 12345

1

H50

HALF,CONN:FRDNT,NYLON

(ATTACHING

8

SCREN,NACHINE:4-4O

4

SCREN,NACHINE:6-32

ATTACHINO

(END

1

BUTTON,PLUO:O.5

THUNOSCREN:6—32

2

1

“SO

HALF,CDNN:REAR,ALUNINUN

(ATTACHINO

2

NUT,PL,ASSEN

2

SCREN,NACHINE:4—4D

2

SCREN,NACHINE:4-40

ATTACHING

(END

1

SUPPORT,CKT

(ATTACHING

2

SCREN,NACHINE:4—4D

ATTACHING

(END

1

NIRE

1

2

2

1

1

54

4
13
14

2

3

5

1

1

1

13

2

2

4

4

1

42

4

3

6

8

20

2

AR

2

15

1

1

1

SET,ELEC:

EXT BOARD

(ATTACHING

SCR,ASSEN

SPACER,POST:1.213

Ex

ATTACHING

(END
.CKT BOARD ASSY

.PLATE,CONN HTG:REAR,N/HARDNARE

.BUS,CONDUCTDR:SHUNT

.TERNINAL,PIN:D.355

.SKT,PL—IN ELEK:CNPNT,4O
.SKT,PL—IN

.SKT,PL-IN
.SKT,PL-IN

.SDCKET,PIN
.TERN,TEST
.NICRDCIRCUIT:(SEE
.(ATTACHING PARTS)
.NUT,PL,ASSEN
.SCREN,NACHINE:4—40

ATTACHING

.(END

.HEAT

SINK,DIODE:(2)0.15

.SKT,PL-IN

.5XT,PL—IN

SPACER,POST:0.575

(ATTACHING

SCR,ASSEN

ATTACNINO

(END

SPACER,POST:1.188

X

(ATTACHING

SCR,ASSEN

ATTACHING

(END
CKT

BOARD

.TERNINAL,PIN:O.365

.SKT,PL—IN
.SKT,PL—IN ELEX:CNPNT,4O
.SOCKET,PIN

.SKT,PL-IN
.SKT,PL-IN

.TERR,TEST

CA8LE,SP,ELEC:7,26

HLDR,TERN

CONTACT,ELEC:22-25

STANDARD

NANUAL,TECH:INSTR
CA8LE,INTCON:2.0N
CA8LE,INTCON:2.0N

ACCESSORIES

8.

Name

PARTS)

PARTS)

HOLE,GRAY

X

PARTS)

HAz4—4O

PARTS)

80:0PIB

PARTS)

PARTS)

ASSY:NPU/OPIB(SEE

PARTS)

NSHRz4-4O

PARTS)

INCLUDES:

ELEK:NICRDCKT,16 OIP,LON
ELEK:MICROCIRCUIT,14
ELEK:NICROCIRCUIT,8

CONN:N/0

POINT:BRSCDPL

NAz4-4O

PARTS)

ELEK:NICROCIRCUIT,20
ELEK:NICROCIRCUIT,24

PARTS)

NSHRz4-4O

PARTS)

PARTS)

NSHRz4—4O

PARTS)

ASSY:PIA/7001(SEE

ELEK:NICRDCIRCUIT.24

CDNN:N/0 DINPLE
ELEK:NICROCKT,16
ELEK:NICROCIRCUIT,14

POINT:BRS

CONN18

NIRE,BLACK

Description

X

O.25,PNH,STL

X

O.250,PNH,STL

PLASTIC

0.25,STL

A1

0.025

DIP,LON

REPL)

0.25,STL

DIA

HOLES,AL

EA

END,AL,0.188

A2

0.025

DIP,LON

DIP,LDN

PL

OD,SST

CD

DEG,STL

REPL)

BRZ

OLD

PROFILE

DIP

DIP

CO

DIP

DIP,LON

REPL)

8RZ GLD

OIP,LDN

PROFILE

DIP

JKT,R8N

OLD

8E

PL

PL

CL

PL

00

PL

CL

PL

0.656,0.312

X

X

O.312,PNH,STL

X

O.25,PNH,STL

INTERFACE

X

0.25,FLH,100

X

O.312,PNH,BR5,NP,POZ

L,4-4O INT/EXT,AL,O.188

ASSEMBLY,8LACK

X

L

DINPLE

U312

X

X

0.312,PNH,STL

L,4-40,NYLON,0.375

X

0.312,PNH,8RS,NP,POZ

L,4-4O

X

O.312,PNH,BRS,NP,POZ

X

L

CD

ANG,STRD,PVC

ANG,8RS,CU

L

L

Repwceame
021-0206-00

Mfr.

Code

80009

93907

TKO435

80009
06540 6130—55-0632
80009

78189

TKO435

93907

80009

TKO435

80009

77900

H

80009 129-0661-00

,

80009
22526

22526 48293-036
09922
09922
09922 DILB14P-108T
09922
22526 75060-012
80009

78189

TXD435

05820 289-A8

PF

HE

PF

09922
09922
80009

77900

80009

77900

22526 48283-036
09922 OIL824P-108

09922

22526 75050-012

09922
09922 DILB14P-108T
80009 214-0579—00
08261 111-2699-972
80009
22525

80009 070—2623-00
04919 2024-2
74858

MechaMcm

Mfr.

Part

380-0499-00

BY

ORDER

BY

ORDER

134—0057-00

380-0511-00

211-041800-00

ORDER BY DESCR

ORDERBYDESCR

386-3778-00

ORDERBYDESCR

198—3057-00

BY

ORDER

386—3370-01

65474-005

DILB4OP-108
DILB15P~108T

DILBBP-108

214-0579-00

211-041800-00

ORDER BY DESCR

DILBZOP-108

DIL824P-108

129-0466—00

BY

ORDER

129-0662—00

ORDERBYDESCR

DILB4OP—108

DIL81SP-1OBT

352-0165—00

47439—000

AC30147-102

Pafls-

No.

DESCR

DESCR

OESCR

DESCR

REV

DEC

1986

Replaceable

021-0206-00

&

Fig.

Index
No.

1-

Tektronix

Part

012-0530-01

012—0630-03

Mechanical

No.

8010100

8100796

Parts-

Seria|lAssembly

Effective

Dscont

8100795

No.

12345

Qty

1

C118LE,INTCON:2.0H

[OPTION

1

CABLE,INTCON:2.0I

(OPTION

Name8.Description

31

31

L

ONLY)

L

ONLY)

Mfr,

Code

04919

74868

Mfr.

Part

2024—2

DC30147-102

No.

6—1

0

REV DEC

1986

IQ.

.—

mxvroumo

021

—0206-00

M06800

70°C;

L

or

(0

to

M668000

(—40

to

85°C;

L

Suffix

P

Suffix)

only)

MICROPROCESSING

MC6800

The

central control function

with

TTL,

+5.0-voIt

one

only

bus

interface.

The MC6800

its 16-bit

with

well
sing

3<state,

as

applications

Eight‘Bit

O

Bi-Directional

0

Sixteen-Bit

O

72

Instructions

Seven

0

Addressing

Extended,

Variable

0

O

Vectored

O

Maskable

0

Separate

In

Stack

0

Six Internal

Program

0

Direct

Memory

Capability

0

Clock

Rates

.

Halt

Bus

and

Simple

0

is

a

MC6800,

the

power

is

capable

address

making

realizable.

Parallel

Processing

Data

Address

—

Variable

Modes

Implied

Stack

Length

Restart

Interrupt

Non-Maskable

Registers

Counter,

Addressing

as

High

Interface

Instruction

Single

monolithic 8-bit

Motorola’s

for

all

with

as

of

addressing

The

memory

65K

and

8-bit data

Bytes

lines.

direct

Bus

Bus

supply,

—

Length

—

Direct, Relative,

and

Accumulator

Vector

Interrupt

—

Two

Stack

Accumulators,

Pointer

(DMA) and

1

MHz

as

.

Without

TTL

Execution

UNIT

(MPU)

microprocessor

M6800

M6800

no

addressing

of

family.

system

external

65K

bus

Addressing

Immediate,

—

Internal

and

Condition

Multiple

Capability

forming

Compatible

parts,

TTL devices

of

bytes

is

bidirectional

and

multiproces-

Registers

Index

Code

Processor

the

requires

for

memory

Indexed,

Saved

Register,

Register

MOS

(N-CHANNEL,SILICON-GATE)

as

MICROPROCESSOR

L

SUFHX

FACKAGE

CASE 715

NOT SHOWN:

PLAST'C

PSUFFIX

PACKAGE

711

CASE

CERAWC

M6800

MCBBOO

Microprocessor

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Data

Bus

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w€g€€g¢n:g;§a

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Control

,

MCBSOO

Data

'

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and

.

.

MICROPROCESSOR

BLOCK

DIAGRAM

Bus

t

.

“I

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,

‘

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i»

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Registers

and

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‘

'

II

II

Bus

'

f

MC6800

ELECTRICALCHARACTERISTICS

Characteristic

High Voltage

lnput

Low

Input

Clock

Input

Three—State

Output

Output

Power

Capacitance

Frequency

Clock

“Except

g(V’Capacitances

Voltage Logic

VCC

Input

—

Input

—

lnpm

=

max)

Current

V)

Overshoot/Undershoot

=

0.4

0

Current

5.25

to

5.25

(Off

2.4

to

State)

V,

V,Vcc=0.0

V,VCC=max)

Leakage

(Vin

(Vin=0to

(Vin

High Voltage

“Load
“Load
“Load

“Load

Low

=

—205

=

—145

=

~100

Voltage

=

1.6

uAdC,

uAdc,

,uAdc,

mAdc,

VCC
VCC

VCC

VCC

=

=

=
=

min)

min)
min)
min)

Dissipation

#

(Vin=0,TA=25°C,f=1.O

of

Operation

1)

(Figure

Timing

Time

Cycle

Pulse Width

Clock

(Measured

Total

Rise and

(Measured

Delay

(Measured

Overshoot

at

VCC

(212

(1)1

and

Up

Times

Fall

between

TimeorClock

at

VOV

Duration

IRQ and

NMI,
periodically

are

Time

MHZ)

V)

0.3

~

+

V53

Separation

=

V35

which

require
sampled

0.3Vand

+

0.5 V)

High
Low

3

rather

kn

=

(VCC

5.0

1

V

5%,

V55

=

Logic VIH

(1)192

$1,492

Level

Level

Logic‘

o1,<1>2

DO-D7

A0—A15,R/W

D0»D7

A0-A15,R/W,VMA

BA

(1)192

TSC
DBE

DO—D7

Logic

Inputs

A0—A15,R/W,VMA

$1

(1)2

(D1332

—

V)

0.3

VCC

pullup

than

FIGURE

load

100%

resistors

tested.

'—

1

for

CLOCK

wire-OR

0,

TA

Symbol

VIHC

VILC

V03

VOH

VOL

PW¢H

t4", t¢f

TIMlNG

=

70°C

0

to

VlL

'in

ITSl

PD

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cout

f

tcyc

tut

td

tog

capability

WAVEFORM

unless

Min

+

2.0

V55

Veg—0.3

—

0.3

V35

—0.1

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0.5

VCC

~

—

0.5

V55

—

—

—

~

+ 2.4

V53

+

2.4

V55

+ 2.4

V53

»

—

80

—

—

—

——

—

0.1

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MC6800

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two

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REGISTERS

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power

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FFF9

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that

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of

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two

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register

byte

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an

®

MOTOROLA

Semiconductor

11-8

Products

Inc-

MC6800

FIGURE

-—

11

PROGRAMMING

MODEL

OF

MICROPROCESSING UNIT

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7

ACCA

7

ACCB

15

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15

PC

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FIGURE 12~SAVING THE STATUS

Pointer

Codes (Also called

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A

Register,

Register,

Higher

Lower
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Order8Bits
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Lower

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the

8

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8

8

Processor

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Bits

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OF THE

m-2

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MICROPROCESSOR

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I

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IN

THE

STACK

m—9

m—8

m-7

m—6

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m-2

m-‘l

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After

MOTOROLA

Semiconductor Products

A-9

Inc.

M

06800

Condition

indicates
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and

COndition Code

for

the

interrupt

Code

Figure

status

results

the

(N),

half

conditional

mask

Register

12

within the

MPU

MC6800 has

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rotate,
interrupt
thru

are

load,

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6).

MPU

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M06800

address modes

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that

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coding

modes

7

along

is

I

of

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and

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time

quency

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except

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carry

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(I).

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b7)

order

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shows

stack.

INSTRUCTION

a

and decimal

binary

conditional

store,

stack

manipulation

ADDRESSING

eight-bit

that

within the

given

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be

can

a

function

for

a

particular

with the

in

machine

these

times would

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either

accumulator

are

one-byte

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of

the

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condition code

Arithmetic

Overflow

bit

are

3

used

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as

Carry

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testable

instructions.

of

unused

bits

are ones.

of

saving

the

SET

72

of

set

different

arithmetic,

unconditional

or

instructions

MODES

microprocessing

used

by

a

of

instruction.

associated instruction

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—

second

instruction.

programmer,

both the

instruction

cycles.

be

A

or

instructions.

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immediate

byte

the

operand

The MPU

type

A

summary

With

microseconds.

——

In

accumulator

of

register

Unit

operation:

from

bit

of-

the

conditions

is

Bit

4

the

the Condition

microprocessor

instructions.

logical,

shift,

branch,

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has

unit

of

can

seven

with

the

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be

found

execution

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clock

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addressing,

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in

the

instruction

second

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addresses

location

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for

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7

the

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address
zero

through

by

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is

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lowest

the

255.

in

data

be

random

a

twoorthree-byte

are

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—

direct

contained

addressing

256

bytes

Enhanced execution

these locations.

access

the

addressing,

in

the

allows

in

the

In

memory.

immediate

instructions.

the

second

the

user

machine

times

most

configurations,

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instruction

address

byte

to

directly

locations

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achieved

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two-byte

are

of

of

the

instructions.

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—

Extended

address
used

as

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third

eightbits

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2

address

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containedinthe

the index

to

carry
index

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modified

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two-byte

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the

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register,

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to

carry
allows

+129

byte

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the

of

higher

of

byte

address

the

in

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eight«bits

second

register's

is

then added

register.

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address

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there

no change

instructions.

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in

the

second

user

to

of

counter's

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the

program

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the

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to

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the

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address

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are

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indexed

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lowest

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the

to

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of

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the

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in

bits

order

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eight

address

used

temporary

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implied
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stack

instructions.

addressing,

the

instruction

bits

eight

the

high

a

range

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instruction

the

as

instructions.

the

address

pointer,

plus

eight

operand.

lower

the

is

abso-

an

address

the

is

MPU.

bits

of

memory.

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address

the

is

added

two.

bits.

of

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are

the

is

added

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the

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are

mode

index

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to

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ADC Add with

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AND
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ASR

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BCS
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BGE Branch
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BIT Bil

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.

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if

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if

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if

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if

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if

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if

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If

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or

if

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if

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Always

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to

if

Overflow

if

Overflow

Accumulators

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TABLE

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—

2

Zero

Zero

Equal

or

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Equal

Same

or

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to

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Clear
Set

MOTOROLA

MICROPROCESSOR

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CLV

CMP
COM
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DAA

DEC
DES

DEX

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INC

INS
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JSR

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LDS

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PSH

Clear
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Compare
Complement
Compare

.

DeCImal

Decrement
Decrement Stack
Decrement

Excluswe OR

Increment

Increment
Increment

Jump
Jump

Load
Load
Load
Logical

Negate

No

Operation

Inclusive OR

Push Data

Semiconductor

INSTRUCTION

Overflow

Index

.

Adjust

Index

.

Stack

Index

SUbrOUI'ne

to

Accumulator

Pointer

Stack

Index

Register

shift

Right

Accumulator

A-lO

.

Register

Pointer

Register

Pointer

,

Register

.

SET

—

ALPHABETIC

PUL

ROL
ROR

RTI

RTS

SBA
SBC

sec

SEI

SEV
STA

STS

STX
SUB
SWI

TAB

TAP
TBA
TPA
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TSX

TXS

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Products

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Pull

Data

Left

Rotate
Rotate

Return from
Return from

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Subtract
88,
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Set
Store
Store
Store

Right

Carry

,

Interrupt
Overflow

Accumulator

Stack

Index

-

Accumulators
with

Subtract

Software

Transfer
Transfer
Transfer
Transfer

Accumulators

Accumulatorsto

Accumulators

Condition

Test
Transfer

Transfer

Wait

for

Stack

Index

Interrupt

Interrupt

Subroutine

Carry

Mask

Re ister

g‘

Register

Interrupt

PointertoIndex

Register

Inc-

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Code

Condition

to

Reg.

to

Stack

Code

Reg.

Accumulator

Register

POinter

MC6800

Cycles;

Bytes;

addressrng

MNEMONIC OF

ADDA

AODB

ABA 18

AOCA

ADCB

ANDB C4

EITA

SITE

CLR 5F

CLRA

CLRB

CMPA 8I

CMPB

COM 53

COMA

COMB

NEG

NmA

NEGB

OAA

DEC

DECA

DECB

EORA

EORB

INC

ch

mm

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LDAB C6

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ORAB

PSHA

PSHB

PULA

PULB

ROL

ROLB

RORA

RORB

ASL

ASLA

ASLB

MR

ASRA

ASRB

LSR

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LSFIB

STAA

STAB

SUBA

SUBB

SBA

SBCA 82

8803

TAB

TBA

TST

TSTA

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mode

IIISIIUCIIOIIS

OPERATIONS

Add

AddAcmltrs

Addwith

Carry

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Clear

Compare

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Compare

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Complement,2‘s

lmwm

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Load Acmltr

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Pull

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Rotate LeII

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LEGEND:

DP

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7

TABLE 3

IMMED DIRECT INDEX EXTND IMPLIED

88

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N

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98

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2 2

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for IMPLIED

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BOOLEAN/ARITHMETIC

(Allregisterlabels

A+M6A

B

B+NI

A+B~A
A+M+C~A
B+M+C~B
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MOTOROLA

Semiconductor

A-ll

Products

Inc.

MC6800

POINTER OPERATIONS MNEMONIC

Index

Index

Stack Pntr

Reg

Reg

Pntr

Reg‘+Stack

Pntr-Hndx

Reg

Reg

Pntr

Beg

Pntr

Reg

Compare

Decrementlndex

DecrementStack

Increment

Increment

Load Index

LoadStack Pntr

Store Index

StoreStack

lndx
Stack

TABLE

4—-INDEX REGISTER AND STACK MANIPULATION INSTRUCTIONS

IMMED DIRECT INDEX EXTND IMPLIED

OP

“'

#

3

3

BC

CPX

DEX

DES

INX

INS

LOX CE

LDS

STX DF

STS

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TSX

BE 3

3 3

3

CDND. CODE REG.

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BOOLEAN/ARITHMETIC

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XH

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Always

If

Branch

Branch

Branch

Branch

Branch

Branch

Branch

BranchIfLowerDrSame

Branch

BranchIfMinus

Branch

Branch

Branch

Branch

Branch

Jump

Jump

No

Operation
Return

Return

Soltmre

Waitlor

‘WAI

puts

Clear

Carry

If

Set

Carry

II =

Zero BED

If>Zero

If

>Zero

II

Higher

If

<Zero

If

<Zero

If

No!

Equal

If

Overflow

II

Overflow

If

Plus

To

Subroutine

To Subroutine

From

Interrupt

Subroutine

From

Interrupt

Interrupt”

Address

Bus,

MNEMONIC

Zero ENE

Clear

Set

Data Bus

and

RM,

BRANCH

AND

OP

~

4

~

7E

BD 9

#

3

3

3

#

2

2

RELATIVE INDEX EXTND

OP

BRA

800

808

BGE

BGT

BHI

BLE

BLS

BLT

BMI

BVC 28

BVS

BPL

BSR SD 8

JMP

JSH

20

24

25

27

2C

2E 4

22 4

2F

23

20

28

26

29

2A 4

TABLE

~

4

4

4

4

4 2

4 2

4

4

4

4

4

4

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DP

#

2

2

2

2

2

2

2

2

2

2

2

2

2

2

GE

AD 8

N0?

RTI 38

RTS

SW1

WAI

in

the

mode while VMAisheld low.

threestate

INSTRUCTIONS

IMPLIED

OP

~

#

I

2

01

I

ID

I

39

I

12

3F

1

SE

BRANCH TEST

None

C

(J

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Z =1

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N

0

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V =

0

V

=1

N

D

=

See

Special

Advances

Progt

See

Special

0

=1

Operations

Cntr.

Operations

Only

COND. CODE REG.

Z

3

5

4

I

H

N Z V

0

o o o o 3

o

o

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0

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0 o o o o

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o

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0
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0
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0
9
0

.

o

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0

o

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o

o

MOTOROLA

Semiconductor Products

21-12

Inc.

MC6800

SPECIAL

an,

INDXD

EXTND

BSR,

JMP,

INDXD

RTS,

RTI,

OPERATIONS

TO

JUMP

JUMP:

RETURN FROM SUBROUTINE:

RETURN

SUBROUTINE:

E

0

n+1

n+2

l

'K

PC

7

n+I

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80

i

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=

Main

SE=JMP

K

Next Instruction

39

Interrupt

38=RTI

Program

=

JSR

Offset'

Main Instr.

B-Bit

Unsigned

Program

=

m

Instr.

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=

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=

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Value;

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alue

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in

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3

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SP+I

2

+

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H

L

[n+2]

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H

Execution

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L

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Code

8

A

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Register

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Form

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and

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Subroutine

1st Subr.

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IstSubr.

Main

Program

=

JMP

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=

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KH

KL=Next

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Instruction

Main

Program

Next Main

Main

Program

Main

Next

Instr.

SL)

Instr.

Address

Instr.

Instr.

—

6

TABLE

OPERATIONS MNEMONIC

Clear

Carry

Clear

Interrupt
Overflow

Clear

Set

Carry

Set

Interrupt

Set Overflow

CONDITION

Mask

Mask

AcmltrA4CCR

COR—*AcmltrA TPA

CONDITION CODE REGISTER NOTES:

1

V)

(Bit

(Bit

(Bit

(Bit

(Bit

(Bi!

C)

C)

V)

V)

V)

Test:

Test:

Test: Decimal

(Not

Test:

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Test: Set

2

3

4

5

6

=

10000000?

Result
Result=00000000?

cleared

Operand

Operand

if

equal to

of

value

previously

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I I

=

01

result

most

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of

significant

to

prior

to

prior

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execution?

execution?

MOTOROLA

SEV 08
TAP

Character

occurred.

has

CODE

REGISTER

IMPLIED

N

OF

CLC

CLI

CLV

SEC 00

SEI

greater

2

00

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2

0A

2

2

0F

2

2

US

2 l

07

nine? 9

than

Semiconductor

MANIPULATION INSTRUCTIONS

COND. CODE REG.

5

cleared otherwise)

and

N)

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V)

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Load Condition

I)

Set

Interrupt

Set

H

O O

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Result

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I

I

I

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7

8

10

11

12

OPERATION

->

0

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4

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bit of

most

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the

to

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Z

V

0

I

0

o 0

R

0

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O

0

I

o

s

I'i'l

significant

overflow

zero?

Register

occurs.

exit the

contents

0

C

R

0

S

0
o

o

(MS)

from

I5

(Bit

I

from

If

previously

wait

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set,

state.

I?

:

of

MS

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NonMaskabIe

a

A.

bytes?

A-l3

M

C6800

TABLE

7

—

INSTRUCTION

ADDRESSING MODES

(TimesinMachine

AND

Cycles)

ASSOCIATED

EXECUTION TIMES

ABA
ADC
ADD
AND
ASL
ASFI

BCC

BCS

BEA
BGE
BGT
BHI
BIT
BLE
BLS
BLT

BMI

BNE
BPL
BRA
BSR
BVC
BVS

CBA
CLC
CLI
CLR

CLV

CMP

COM

CPX

DAA

DEC

DES

DEX

EOFI

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(Dual

xx

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INC
INS

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SBC

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A0

A1

A2

I

A3

A4

A5

A6

A7

A8

A9

A10

A11

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05
05

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A14

A13

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39

38

37

36

35

34

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28

27

26

25

24

23,

22

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12

being

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4

I

of

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2471..

1

1111111101

SNEATIN-G

MILLIMETEHS INCHES

MAX

MIN

a

50.29 51.31 1.980

14.88 15.82

2.54

4.19

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1.40 0.030 0.055

0.76

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.

.

2

I

,

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0.585

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0.013

0.575

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100

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L

NOTE:

PACKAGE

See
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CASE

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165 for

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~

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~

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.

WITHIN

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®

MOTOROLA

Semiconductor

A-l4

Products

Inc.

MC6800

Table

tion

present

Address

each

This

Address

and

cycle

information

results

ing

pected

IMMEDIATE

ADC EOR

(13%:

233

BIT SBC

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DIRECT

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the

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is

useful

during debug

Mode Cycle

Instructions

Cycles

Bus,

the

in

of

2

3

3

4

4

5

4

5

6

SUMMARY

description

Data

Bus,

Read/Write

comparing

both software

VMA

Line

#

1

1

1

2

1

1

1

2

1

3

1

1

1

2

1

3

1 1

1

2

1

3

1

4

1

1

1

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0

3

1

4

1

1

1

2

3

0

1

4

1

5

1

1

1

2

0

3

0

4

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1

1

2

0

3

0

4

1

5

1

1

1

2

0

3

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4

1

5

1

6

CYCLE BY

OF

informa-

of

the

Valid

Memory

line

(R/W)

with

actual

and hard-

TABLE

8——OPERATION SUMMARY

Code Address

Op

Code Address

Op

Code Address

Op

Code Address

Op

Code Address

Op

Code Address

Op

Code

Op

Address

Op

Op

Address

Operand

Address

of

Code

Address

Code Address

of

Address

OpCodeAddmg

Code

Op

Destination

Destination

Op

Op

Address of

Address of

Address

Op

Op

Index

Index

Op

on

Index

Index

Index

0p

Op
Index

Index

Index

Address

Code Address

Code

Address

of

Code Address

Code

Address

Register

Register

Code

Address

Code Address

Register

Register

Register
Code Address

Code Address

Register

Register

Register

Register

dur-

ex-

Address

+

+

+

4-

Operand

+

Operand

+

+

Address

Address

+

Operand

Operand

Operand

+

Plus

+

Plus Offset Iw/o

Plus Offset

+

Plus

Offset

Plus

Plus Offset

Bus

1

1

2

1

1

1

1

1

1

+

1

Offset

1

1

Offset

CYCLE

ware

as

is

categorized

Number

with

the

execute
the

table.)

(w/o

Carry)

Carry)

(w/o

Carry)

1

+

OPERATION

the control

in

Cycles

same

the

groups

per

Addressing

same

R/W
Line

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

1

1

1

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

of

in

program

according

instruction.

Mode

manner;

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Op

Operand

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Code

Operand

Operand

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Op

Address of

Operand

Code

Op

Address of

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Operand

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Destination

Irrelevant

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from

Code

Op

Address of

Irrelevant

Register

Register

Code

Op

Offset

Irrelevant

Irrelevant

Code

Op

Offset

Irrelevant

Irrelevant

Operand

Code

Op

Offset

Irrelevant

Irrelevant Data

Operand

Operand

is

executed.

to

Addressing

(In

and

exceptions

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Data

Data

(High

Data (Low

Operand

Data

Operand

Data

(High

Data (Low

Address

(Note

Data

Accumulator

Operand

Data (Note

Data

(High

Data (Low

Data (Note

(Note

Data

Data (Note

Data (Note

Data

(Note

Data

(Note

Data

(High

Data (Low

The

general,

Number of

are

Bus

Order

Order

Order

Order

1)

1)

Order

Byte)

Order

Byte)

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1)

1)

1)

1)

1)

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Order

information

Mode

and

instructions

Cycles

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Byte)

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Byte)

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in

M

®

MOTOROLA

Semiconductor

A-l5

Products

Inc.

MC6800

Address

and

INDEXED

STA

ASL

LSR

REE

SE:

Egg/I

$815

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STS
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EXTENDED

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Instructions

(Continued)

Cycles

6

7

7

8

3

4

5

5

6

Cycle

#

1

2

3

4

5

6

1

2

3

4

5

6

7

1

2

3

4

5

6

7

2

3

4

5

6

8

TABLE 8—OPERATION

VMA

Line

1

1

0

0

0

1

1

1

0

0

1

0

1/0

(Note

3)

1

1

0

0

0

1

1

1

1

1

0

1

1

0

7

0

0

1

1

1

2

1

3

1

1

1

2

1

3

1

4

1

1

1

2

1

3

1

4

1

5

1

1

1

2

1

3

0

4

1

5

1

1

1

2

1

3

1

4

0

5

1/0

6

(Note

3)

Code Address

Op

Code

Op

Index

Index

Index

Index

Code

Op

Code

Op

Index

Index

Index

Index

Index

Op

Op

Index

Index

Indgx

Index

Index

Op

Op

Index

Stack

Stack

Stack

Index

Index

Op

Op

Op

Op

Op

Op

Address

Op

Op

Op

Address

Address of

Op

Op

Op

Operand

Operand

Op

Op

Op

Address

Address

Address of

Address

Address

Register

Register

Register

Register

Plus

Plus Offset

Plus

Address

Address

Register

Register

Register

Register

Register

Plus

Plus

Plus Offset

Plus

Code Address

Code Address

Register

Register

Register

Register

Register

Code

Plus Offset (w/o Carry)

Plus

Plus Offset

Plus Offset

Address

Code Address

Register

Pointer

—~

Pointer

—

Pointer

Register

Register

Code

Plus Offset

Address

Code Address +

Code Address

Address

Code

Code Address

Code Address

of

Operand

Address

Code

Code Address

Code Address

of

Operand
Operand

Code Address

Address

Code

Code Address

Destination Address

Destination

Address

Code

Address

Code

Address

Code

of

Operand

of

Operand

Operand

SUMMARY

Bus

1

+

Offset (w/o

Offset

1

+

Offset

Offset

Offset

1

+

Offset

1

+

1

2

1

+

2

1

+

+ 2

1

+

+

2

+

1

+

+ 2

Address

1

+

2

+

(Continued)

R/W
Line

1

1

1

1

1

O

1

1

1

1

1

1

(w/o

Carry)

Carry)

0

1

1

1

1

1

0

1

+

0

1

1

1

0

0

1

1

(w/o

Carry)

1

1

1

1

1

1

1

1

‘l

1

1

1

1

1

1

1

1

1

0

1

1

1

1

1

0

Code

Op

Offset

Irrelevant

Irrelevant

Irrelevant Data (Note

Operand

Code

Op

Offset

Irrelevant

Irrelevant Data (Note

Current

Irrelevant

New

Code

Op

Offset

Irrelevant

Irrelevant Data

Irrelevant Data

Operand

Operand

Code

Op

Offset

Irrelevant

Return
Return

Irrelevant Data

Irrelevant

Irrelevant Data

Op

Jump
Jump

Op

Address of

Address

Operand

Op

Address of

Address of

Operand

Operand

Op

Destination

Destination

Irrelevant

Data

Op
Address of

Address

Current

Irrelevant

New

Data Bus

Data (Note

Data (Note

Data

(Note

Data

Data

Data

'

Data

(Note

Operand

Operand

Data (Note

(Note

(Note

Data

(High

(LOW

Data

(Note

Data

Address

Address

(Low

(High

(Note

Data

(Note

(Note

Code

Address

Address

(High

(Low Order

Code

Operand

of

Operand

Data

Code

Operand

Operand

Data

(High

(Low Order

Data

Code

Address

Address (Low

(Note

Data

from Accumulator

Code

Operand

of

Operand

Data

Data

(Note

Data

Operand

Operand

1)

1)

1)

1)

1)

1)

(Note

1)

1)

1)

Order

Order

1)

Order

Order

I)

1)

1)

Order

(High

(Low

(High

(Low

Order

(High

1)

(High

(Low

1)

(Note

3)

Byte)

Byte)

Byte)

Byte)

Order

Order

Order

Order

Byte)

Byte)

Order

Order

Order

Order

3)

Byte)

Byte)

Byte)

Byte)

Byte)

Byte)

Byte)

Byte)

Byte)

Byte)

A—l6

MC68OO

Address

and

Instructions

EXTENDED

STS
STX

(Continued)

JSR

INHERENT

ABA DAA SEC
ASL DEC
ASR
CBA LSR
CLC NEG
CLI
CLR ROL TPA
CLV ROR

COM

sen

INC

SEV
TAB
TAP

NOP TBA

TST

SBA

DES

PNESX

INX

PSH

PUL

TSX

TXS

HTS

Mode Cycle

Cycles

#

1

2

3

6

4

5

6

1

2

3

4

5

9

6

7

8

9

1

2

2

1

4

2

3

4 0

1

4

2

3

4

1 1

2

4

3

4

1

2

4

3

4

1

2

4

3

4

1

2

3

5

4

TABLE 8

VMA

Line Address

1

1

1

0

1

1

1

1

1

1

1

1

0

0

1

1

1

1

1

0

1

1

1

O

1

0

1

1

1

0

0

1

1

0

0

1

1

0

1

—

OPERATION

Code Address

Op

Code Address

Op

Code Address

Op

Address

Address

Address

Code Address

Op

Code

Op

Code

Op

Subroutine

Stack

Pointer

Stack

Pointer

Stack

Pointer

Code Address

Op

Code

Op

Code Address

Op

Code Address

Op

Code Address

Op

Code

Op

Previous

New

Register

Code

Op

Code Address

Op

Pointer

Stack

Stack

Pointer

Code Address

Op

Code

Op

Stack

Pointer

Stack

Pointer

Code Address

Op

Code Address

Op

Pointer

Stack

New

Index

Code Address

Op

Code Address

Op

Index

Register

New Stack

Code

Op

Code Address

Op

Stack

Pointer

Stack

Pointer

Stack

Pointer

of

Operand

of

Operand

of

Operand

Address

Address

Starting

Address

Address

Register

Address

Address

Register

Pointer

Address

—

—

Contents

—

+

+

+ 2

SUMMARY (Continued)

Bus

1

+

2

+

1

+

1 1

+

+ 2

Line

Address

1

2

+ 2

2

+

+1

1

+

Contents

1 1

+

1 1

1

+

1 1

1 1

+

1

+

1

+

1

R/W

1

Op

1

Address of

1

Address

1

Irrelevant

O

Operand

O

Operand

1

Op
Address of

1

Address

1

Op

0

Return

0

Return

1

Irrelevant

1

Irrelevant

1

Address of

1

Op

1

Op

1

Op

1

Op

1

Irrelevant

1

Irrelevant

1

Op

Op

0

Accumulator
Accumulator

1

Op

1

Op

1

Irrelevant Data (Note

Operand

1

Op

Op

1

Irrelevant Data

1

Irrelevant

1

Op

1

Op

1

Irrelevant

1

Irrelevant

1

Op

1

Irrelevant

1

Irrelevant

1

Address of Next
Order

Address of
Order

Code

Operand

of

Operand

Data

Data

Data

Code

Subroutine

of

Subroutine

CodeofNext

Address (Low

Address

Data

Data

Subroutine

Code

Code

of

Next Instruction

Code

Code

of Next

Data

Data

Code

Code

of Next

Code

Code

of Next

Data

Code

Code

of Next

Data

Code

Code

of Next

Data

Data

Code

Data

Data (Note

Byte)

Next

Byte)

Data Bus

(High

(Low

(Note

Order

(High

(Low Order

Instruction

(High

(Note

(Note

Instruction

(Note

(Note

Instruction

Data

Data

Instruction

from Stack

Instruction

(Note

(Note

Instruction

(Note

Instruction

Instruction

1)

(High

(LOW

Order

Order

1)

1)

(Low

1)

1)

1)

1)

1)

2)

1)

Order
Order

Byte)

Byte)

.

Order

Order

Byte)

Byte)

Order

(High

(Low

Byte)

Byte)

Byte)

Byte)

Byte)

-——-—————_~

®

MOTOROLA

Semiconductor

A—l7

Products

Inc.

MC6800

Address

and

INHERENT

WAI

RTI

SWI

RELATIVE

\BHI

BCC

SE?)

at:

BGE

BLT

BM)

BGT

BSR

1.

Note

2.

Note
Note 3.

4. While

Note

Mode

Instructions

(Continued)

BNE

3;:

BVC
BVS

If

device

Depending

is

Data

ignored

For

TST,

the

Address

low;

which

bus

on

VMA=0

MPU

Bus,

Cycles

9 5

1O

12

4

8

is

addressed

capacitance,

MPU.

the

by

and

is

waiting

R/W,

Cycle

#

_1

2

3

4

6

7

8

9

1

2

3

4

5

6

7

8

9

1O

1 .1

2

3

4

5

6

7

8

9

10

11

12

1

2

3

4

1

2

3

4

5

6

7

8

during

Operand

for the

and Data

TABLE

VMA

Line

1

1

1

1

1

1

1

1

1

1

1

O

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

1

1

1

1

0

0 Branch

1

1

0

1

1

0

0

0

this

data from

does

data
interrupt,

Bus

are

——

8

OPERATION SUMMARY

Address

Code

Code

Code

Code

Address

Address

Pointer
Pointer

Pointer

Pointer
Pointer

Pointer

Address

Address

1

-

—-

2

—

3

—

4

5

—

—

6

Op

Op

Stack

Stack

Stack

Stack

Stack

Stack Pointer

Stack

Op

Op

Bus

1

+

(Note 4)

1

+

(Continued)

Stack Pointer

Pointer

Pointer
Pointer

+

+ 2

+

3

Stack

Stack

Stack

1 1

Stack Pointer+4

Stack Pointer

Stack

Stack

Code

Op

Code

Op
Stack

Stack

Stack

Stack Pointer

Stack

Stack Pointer

Stack

Stack

Vector

Vector

Code

Op

Code

Op

Code

Op

+

5

Pointer+6

7

+

Pointer

Address

1

+

Address

Pointer

~

—

—

—

#

—

Address

Address

Address

1

2

3

5

6

7

(Hex)

FFFA

FFFB (Hex)

1

+

+ 2

Pointer

Pointer

Pointer~4 0

Pointer
Pointer

Address

Address

Address

Code

Code

Address of

Address

Address

1 1

+

Main

Program

Op

Op

Return

Stack Pointer 0

Address

VMA,

high

1

~

2

—

of Main

then the

may

will

impedance

Program

Data

be retained

high indicating

go

state.

Bus will

go

the

on

the

Stack

Stack

Return
Subroutine

cycle

uses

the

previous cycle

not

Bus

all in

Pointer

Pointer

Address

change.

Available

the

R/W
Line

1

Code

Op

1

Code

Op

0

Return

0

Return

0 Index

Index

0

0

Contents

0

Contents

1

Contents

1

Op

1

Irrelevant

1

Irrelevant

Contents

Stack

of Next

Address (Low

Address

Register

Register

of

of

of

Code

Data (Note

Data (Note

of

Contents of

1

Contents

1

Index
Byte)

1

Index

Byte)

1

Next

(High

1

Next

(Low

1

Op

1

Irrelevant Data (Note

0

Return

0

Return

Index

0

Index

0

of

Register

Register

Instruction

Order

Instruction

Order

Code

Address

Address

Register

Register

ContentsofAccumulator

0

Contents

0

Contents

1

Irrelevant Data (Note

1

Address

Byte)

1

Address

Byte)

1

Op

1

Branch

1

Irrelevant

1

Irrelevant Data

1

Op

Branch

1

Irrelevant

Return

0

Return

1

Irrelevant Data (Note

1

Irrelevant

1

Irrelevant

the

high impedance

to

Data

Bus.

following

of

of

of

of Subroutine

Code

Offset

Data

Code

Offset

Data (Note

Address

Address

Data

Data (Note

states

Bus

Data

Instruction

Order

Order

(High

(Low

Order

Byte)

Order

(High

Accumulator
Accumulator

Cond. Code

Byte)

A

B

Register

2)

1)

Cond.

Code

Register

AccumulatorBfrom
Accumulator

from

from

Address

Byte)

Address

Byte)

(Low

(High

(Low

(High

Accumulator

Cond. Code

Subroutine

(Note

(Note

(Low

(High

(Note

three-state

of

the

A

from

Stack

(High

Stack (Low Order

from

from

1)

Order

Order

Order

Byte)

Order

Byte)

A

B

Register

1)

(High

(Low

1)

1)

1)

Order

Order

1)

1)

1)

condition.

control lines:

Byte)

Byte)

Stack

Stack

Byte)

Byte)

Order

Order

Byte)

Byte)

from

Stack

Stack

Order

VMA

is

®

MOTOROLA

Semiconductor

A-l8

Products

Inc-

M06820

(0

to

70°C;

L

or

M068200

L

{-40

to

85°C;

Suffix only)

P

Suffix)

PERIPHERAL

MC6820

The

of

means
processing

peripherals

to

and

most

The

MPU

can

four
control
operation

8—Bit

Two Bidirectional

Two

Two

Four

0

Handshake

O

High-Impedance

0

Program

CMOS

interfacing

Unit

control

four

peripheral

functional

during

be

programmed

control/interrupt

modes.

of

Bidirectional

Programmable
Programmable

Individually-Controlled

Peripheral

as

Operation

Lines

Controlled

Drive

Peripheral

(MPU).

through

lines. No

devices.

system

This

the

interface.

Control

Capability

INTERFACE ADAPTER

Interface

peripheral

This device

8—bit

two

external

configuration

initialization.

to

as

act

lines

Data

8—Bit

may

a

high

Bus

Buses

allows

Control

Data Direction

Control

Logic

3-State

Outputs

for

and

Interrupt

Side

on

Adapter

equipment

is

capable

bidirectional

logic

the PIA

of

Each

an

input

be

programmed

degree

for

Communication

for Interface

Registers

Registers

Interrupt

and

Input

Direct

and

Interrupt

A

Peripheral

provides

to

of

peripheral

is

required

is

of

the

peripheral

or

output,

of

flexibility

to

Input

Output

Transistor

Disable

Lines

(PIA)

the

MC6800

the
interfacing

programmed

for

Peripherals

Lines;

for

interfacing to

each

and

one

in

the

with

the

Two Usable

Peripheral

Drive

Capability

data

data

of

Peripheral

universal

Micro‘

MPU

the

buses

the

by

lines

of the

several

over-all

MPU

M

OS

(NCHANNEL,SILICON-GATE)

PERIPHERAL

ADAPTER

NOT SHOWN:

PSUFFIX

PLASTIC

CASE

INTERFACE

L

SUFFIX

CERAMIC

PACKAGE

CASE 715

PACKAGE

711

M6800

MCGBOO

Microprocessor

II

Address

Bus

Data

Bus

MICROCOMPUTER

BLOCK

I

it

DIAGRAM

Read

Memory

Random

Access

Memory

MC6820

Interface

,

Adapter

Interface

Adapter

Only

FAMILY

‘

Modem

Data

Memory
Address

and

Control

Interru

Bus

9

MC6820

<—>

—>

(

PERIPHERAL

BLOCK

i

..

'

i

'

Data

»

A

Bus

Buffers

.

.

,

L

Selection

'and

.<

"

Control

v

-

INTERFACE

DIAGRAM

_

ADAPTER

V.

A

Buffets.

and

Data

Register

AV

B

Buffers.‘

..

and

.

'='<—>

_

,V.

‘1‘»

-

Pegzhfal

‘

PerEIJpheraI

ata

M06820

ELECTRICAL

High Voltage

lnput

Low

Input

Leakage

Input

=

0

(Vin

Three-State

=

0.4to2.4

(Vin

High

Input

Input

Output

Output

Output

Output

Output

Power

lnput

Output

Peripheral

Delay Time,

Delay Time,

Rise

Delay Time,

Delay

(VlH

Low

(VIL

High

“Load
“Load

Low

“Load

High

(VOH

=

(V0

Darlington

Low

(VOL

Leakage

(VOH

Dissipation

Capacitance

=

(v;n

Capacitance

=

(Vin

(Figure 2,

(Figure

and

Time

Delay

(Figure

(Figures 4,

Time,

(VCC

Time,

Delay

(Figure 6,

Time,

Delay

(Figure

Time,

Delay

(Figure

and

Rise

Delay

Time,

(Figure

Interrupt

Reset Low

=

2.4 Vdc)

=

0.4 Vdc)

=

=

=

=

1.5

=

=

0,

0,

Data

Fall

—

Fall

Release

CHARACTERISTICS

Voltage

Current

Vdc)

5.25

to

(Off

State)

Input

Vdc)

Current

Current

Voltage

-205

—100

Voltage

1.6

mAdc,

Current

Vdc)

2.4

Vdc,

Base)

Current

0.4 Vdc)

2.4 Vdc)

TA

TA

Setup

Enable

3)

Enable

2)

Times

from

3)

Enable

5)

Enable

30%

Enable

7)

Peripheral

5)

Enable

6)

Time

CBi

7)

pAdc,

pAdc,

(Sourcing)

the

(Sinking)

Current

=

25°C,

=

25°C,

negative

negative

for

CA1

negative

negative

VCC,

positive

positive

for

active

Enable
Enable

Enable

current

(Off

=

f

‘R/W,

=

f

Time

CA1

active

Figure

Data

C81 and C82

transition

Timem

Time*

(Figure

9)

Characteristic

R/waFet,

R80,

Current

Width<25

Pulse
Pulse Width

Pulse Width<25

for

State)

1.0 MHz)

__

Reset,

1.0 MHz)

(Figure

transition

transition

CA2

and

transition

transition

transition

4; Figure

transition

valid

driving

R80,

1)

CB2

to

other

CA2

to

CA2

to

input

CA2

to

Peripheral

to

Peripheral

to

12 Load

CB2

to

negative

transitionto082

input

CB2

positive

to

Fifi—ET

and

(Figure

=

(VCC

R81,

<25

than

PAO-PA7,

CSO,

R81,

negative

positive

signals

positive

C)

negative

positive

signals

V

5.0

cso,

DO—D7,

MS)

us)

us)

TTL,

PBO-PB_7,

CS1,

(Figure

Data

CMOS

transition

transition

(Figure

transition

8)

i5%,

V55

Other

Other

C31,E§§,

CBl,

PBO-PB7,

PAO-PA7,

PAO~PA7,

Other

Other

e.g.,

PBO-PB7,

W,

CS2, CA1,

WERTQB

transition

transition

3)

transition

valid

Data

PAO—PA7,VCA2

transition

7)

=

Enable

Inputs

Enable

Inputs

CA1,

Enable

DO—D7

Outputs

00—07

Outputs

W

Enable

00.07

CA2,

PBO-PB7

Valid

0,

CB2

CA2

CA2

CB2

C82

CB1

TA

= O

Symbol

VIH

VlL

ITSl

llH

VOH

VOL

'OH

lOL

'LOH

an

Com

tPDSU

tCA2

TRSl

tr,tf

iRS2

tpDW

tCMOS

tCBZ

tDC

tRSl

tr,tf

tRSZ

th

tRL

to

lin

'IL

PD

70°C

unless

otherwise

Min

+

2.4

V55

+

2.0

V53

—0.3

V55

-0.3

V53

—

—~

—100 —250

—

+

2.4

V53

+

2.4

V55

—~

—205

-1OO

—1.0

1.6

—

— —

—

—

—

—

~

— —

200

— —

—

~

H

~

— —

—

20

—

*

—

«

2.0

noted.)

Typ

—

—-

—

—

1.0 2.5

2.0

—1.0 —1.6

—

— —

-

—

—

~2.5

—

1.0

Max

VCC
VCC

V55
V55

V53

2

—

—

~

—

e

—

#

—

—

*

—

F

——

—

—

—

10

—

—

~
~

—10

—

10

650

20

12.5

10

7.5

5.0
10

—

1.0

1.0

1.0

2.0

1.0

2.0

1.0

—

1.0

1.0

2.0

16

—

Unit

Vdc

+

0.4

+

0.8

Vdc

pAdc

“Ada

pAdC

mAdc

Vdc

+

0.4

Vdc

uAdc

uAdc

mAdc

mAdc

pAdc

mW

pF

pF

ns

us

us

us

ps

us

us

its

ns

#5

us

ps

us

us

*The Reset

line

must

be

high

minimum

a

MOTOROLA

of

1.0

before

us

addressing

Semiconductor

the

PIA.

Products

Inc.

A—20

MC6820

MAXIMUM

Supply Voltage

Voltage

lnput

Operating

Storage
Thermal

BUS

READ

Enable

Enable

Enable

Setup

Data

Data

Address

Rise and

WRITE

Enable

Enable Pulse

Enable

Setup
Data

Data Hold

Address

Rise

Temperature

Temperature

Resistance

TIMING

(Figures

Cycle
Pulse

Pulse

Time,

Time

Delay
Hold

Time

Hold

Fall

(Figures

Cycle

Pulse

Time,

Setup

Time

Hold

Fall

and

FIGURE

RATINGS

Rating

Range

Range

CHARACTERISTICS

10

12)

and

Time

High

Width,

Low

Width,

Address and

Time

Time

11

Time

Width,

Width,

Address and

Time

Time

Time for

for

Enable

12)

and

High
Low

Enable

1

—

PERIPHERAL

R/W

R/W

(Read

Characteristic

validtoEnable

input

valid

Enable

to

input

DATA

Mode)

positive

positive

SETUP

Symbol

VCC

Vin

TA

Tstg

GJA

transition

transition

TIME

Value

«0.3

N03

0to+70

——55

82.5

Unit

+7.0

to

+7.0

to

+150

to

Vdc

Vdc

0C

0C

OC/W

Symbol

tcch

PWEH

PWEL

tAS

tDDR

tH

tAH

tEf

tEr,

tcch

PWEH

PWEL

tAS

tDSW

tH

(AH

tErI

tEf

(Read

device

This

inputs

ages

normal

tion

voltages

Min

1.0

against
electric

or

precautions

of

any

to

contains

voltage

this

Typ

0.45

0.43

160

——

1O

10

~

1.0

0.45

0.43

160

195

1O

10

—

FIGURE 2—-CA2

CRA-S=CRA-3

Mode,-

—

—

—

~

—

circuitry

fields;

high

due

however,

be

higher

impedance

damage

—

-

-—

~

-

—

-—

-

—

—

—

DELAY TIME

=1,

to

taken

than

Max

~

25

—

—

320

~

—

25

—

25

——

-

—

~

—-

25

ORA-4=0)

to

high

is

it

avond

to

maxi

circmt.

protect

static

advised

applica~

um

the

volt-

that

rated

Unit

#5

us

us

ns

ns

ns

ns

ns

#3

us

us

ns

ns

ns

n5

ns

FAO~PA7
PBO-PB7

Enable

2.0

0.8

r

*tPDSU

V

v

V

2.4

(Read

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1-1-22

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MC6820

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MOTOROLA

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M06820

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MOTOROLA

Semiconductor

A—24

Products

Inc-

MC6820

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data

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®

MOTOROLA

Semiconductor Products

A-25

Inc.

MC6820

INTERNAL CONTROLS

are

data

six

locations

bus:

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two

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the four

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lines

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the

by

select

The

FORMAT

2

1

2

and

and

Register

register

and

active

inputs.

Data

Data

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B)

allow

the

peripheral

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they

monitor

5

of

the

MPU when

signals

read

are

only

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formatofthe

1

I

0

Control

I

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CR

B-2)

-

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the

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bits

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Bus

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CR

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NOieSI

TABLE

CRA-O

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1 1

4,

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MOTOROLA

3 -—CONTROL OF INTERRUPT

Interrupt Input

CA1

(CB1)

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positive

negative

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cleared

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(IRQB)

flag

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IActive

IActive

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transition

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ORA—7

an

when

after

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(high

is

MPU

an

Set

Set

Set

to

to

cleared

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interrupt

CRA—O

high)

Semiconductor

A-26

INPUTS

Interrupt Flag

ORA-7

(one-7)

high

on

(CB1)

on

high

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on I

high

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high

on

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an

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CA1

of

I

of CA1

I

of CA1

CA1

T

of

MPU

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written

Read

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Request

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low

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flag

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interrupt

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of

disabled)

a

"one".

to

the

A

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Products

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when

bit

high

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when the

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re—

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re-

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MC6820

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of

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the

control

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CAT

CA1 and C81

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CR

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0

0

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used

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2.

3 The

4.

to

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cleared

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Lines

lowest

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negative

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MPU

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T

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low

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bits

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Active

Active

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high)

to

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transition

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CBZ AS

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Set

high

Set

high

Set

high

low)

MPU

an

Register.

occurs

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enable the

to

of

Bits

the

CRA-l

3).

INTERRUPT INPUTS

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CA2

on

i

(CBZ)

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CA2

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(CB2)

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to

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MPU

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interrupt

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ORB—5 ORB—4

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Low

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WriteinControl

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Semiconductor

A-27

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ORB-3

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CB2

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changes

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High

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Control

set

081

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ORB-3

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positive

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Products

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MC6820

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output

ASSIGNMENT

CA2

CRA~5,

5

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O

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when the

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Register”A".

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40 SEE PAGE 165 FOR

39

37

35

35

34

33

32

30

29

28

27

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.

DIMENSIONS

715-02

(CERAMIC)

LEADSTRUE

25mm

0.

(0.

010)

AT

PLANE)

CONDITION

In

Data

Note:

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MAXIMUM

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..,.Y.:,..,_;

165

Page

Package

MILLIMETERS

MIN

29.97 30.99 1.180

14.88

3.05

0.38

0.76

2.54

0.78

0.20

2.54

14.88

—

0.51

..

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for

dimensions;

MAX

15.82 0.585 0.615

4.19 0.120 0.165

0.53 0.015

1.40 0.030

830

1.78 0.030

0.30 0.008

4.19 0.100

15.37
100

1.52

write

coincident

or

for

time

high

..

INCHES

MIN

0.021

0.055

0.100

880

0.070

0.012

0.165

0.585 0.805

—

0,060

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MAX

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